anv/apply_pipeline_layout: Apply dynamic offsets in load_ssbo_descriptor
This function has exactly two call sites. The first is where we had these calculations before. The second only cares about the size of the SSBO so all the extra code we emit will be dead. However, NIR should easily clean that up and this lets us consolidate things a bit better. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8635>
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@ -490,6 +490,7 @@ lower_res_reindex_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
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nir_ssa_def *new_index;
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switch (desc_addr_format(desc_type, state)) {
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case nir_address_format_64bit_global_32bit_offset:
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case nir_address_format_64bit_bounded_global:
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/* See also lower_res_index_intrinsic() */
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assert(intrin->dest.ssa.num_components == 4);
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@ -520,9 +521,9 @@ lower_res_reindex_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
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}
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static nir_ssa_def *
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build_ssbo_descriptor_load(nir_builder *b, const VkDescriptorType desc_type,
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nir_ssa_def *index,
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struct apply_pipeline_layout_state *state)
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build_buffer_descriptor_load(nir_builder *b, const VkDescriptorType desc_type,
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nir_ssa_def *index,
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struct apply_pipeline_layout_state *state)
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{
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ASSERTED nir_address_format addr_format = desc_addr_format(desc_type, state);
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assert(addr_format == nir_address_format_64bit_global_32bit_offset ||
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@ -533,6 +534,8 @@ build_ssbo_descriptor_load(nir_builder *b, const VkDescriptorType desc_type,
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nir_ssa_def *array_index = nir_umin(b, nir_channel(b, index, 2),
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nir_channel(b, index, 3));
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nir_ssa_def *dyn_offset_base =
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nir_extract_u16(b, packed, nir_imm_int(b, 0));
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nir_ssa_def *desc_buffer_index =
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nir_extract_u16(b, packed, nir_imm_int(b, 1));
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@ -542,20 +545,52 @@ build_ssbo_descriptor_load(nir_builder *b, const VkDescriptorType desc_type,
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nir_ssa_def *desc_offset =
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nir_iadd(b, desc_offset_base, nir_imul_imm(b, array_index, stride));
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nir_ssa_def *desc_load =
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nir_ssa_def *desc =
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nir_load_ubo(b, 4, 32, desc_buffer_index, desc_offset,
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.align_mul = 8,
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.align_offset = 0,
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.range_base = 0,
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.range = ~0);
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if (state->has_dynamic_buffers) {
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/* This shader has dynamic offsets and we have no way of knowing
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* (save from the dynamic offset base index) if this buffer has a
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* dynamic offset.
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*/
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nir_ssa_def *dyn_offset_idx = nir_iadd(b, dyn_offset_base, array_index);
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if (state->add_bounds_checks) {
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dyn_offset_idx = nir_umin(b, dyn_offset_idx,
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nir_imm_int(b, MAX_DYNAMIC_BUFFERS));
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}
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nir_ssa_def *dyn_load =
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nir_load_push_constant(b, 1, 32, nir_imul_imm(b, dyn_offset_idx, 4),
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.base = offsetof(struct anv_push_constants, dynamic_offsets),
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.range = MAX_DYNAMIC_BUFFERS * 4);
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nir_ssa_def *dynamic_offset =
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nir_bcsel(b, nir_ieq_imm(b, dyn_offset_base, 0xff),
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nir_imm_int(b, 0), dyn_load);
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/* The dynamic offset gets added to the base pointer so that we
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* have a sliding window range.
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*/
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nir_ssa_def *base_ptr =
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nir_pack_64_2x32(b, nir_channels(b, desc, 0x3));
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base_ptr = nir_iadd(b, base_ptr, nir_u2u64(b, dynamic_offset));
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desc = nir_vec4(b, nir_unpack_64_2x32_split_x(b, base_ptr),
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nir_unpack_64_2x32_split_y(b, base_ptr),
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nir_channel(b, desc, 2),
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nir_channel(b, desc, 3));
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}
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/* The last element of the vec4 is always zero.
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*
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* See also struct anv_address_range_descriptor
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*/
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return nir_vec4(b, nir_channel(b, desc_load, 0),
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nir_channel(b, desc_load, 1),
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nir_channel(b, desc_load, 2),
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return nir_vec4(b, nir_channel(b, desc, 0),
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nir_channel(b, desc, 1),
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nir_channel(b, desc, 2),
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nir_imm_int(b, 0));
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}
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@ -599,49 +634,9 @@ lower_load_vulkan_descriptor(nir_builder *b, nir_intrinsic_instr *intrin,
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nir_address_format addr_format = desc_addr_format(desc_type, state);
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switch (addr_format) {
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case nir_address_format_64bit_global_32bit_offset:
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case nir_address_format_64bit_bounded_global: {
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desc = build_ssbo_descriptor_load(b,desc_type, index, state);
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if (state->has_dynamic_buffers) {
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/* This shader has dynamic offsets and we have no way of knowing
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* (save from the dynamic offset base index) if this buffer has a
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* dynamic offset.
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*/
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nir_ssa_def *packed = nir_channel(b, index, 0);
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nir_ssa_def *array_index = nir_umin(b, nir_channel(b, index, 2),
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nir_channel(b, index, 3));
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nir_ssa_def *dyn_offset_base =
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nir_extract_u16(b, packed, nir_imm_int(b, 0));
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nir_ssa_def *dyn_offset_idx =
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nir_iadd(b, dyn_offset_base, array_index);
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if (state->add_bounds_checks) {
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dyn_offset_idx = nir_umin(b, dyn_offset_idx,
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nir_imm_int(b, MAX_DYNAMIC_BUFFERS));
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}
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nir_ssa_def *dyn_load =
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nir_load_push_constant(b, 1, 32, nir_imul_imm(b, dyn_offset_idx, 4),
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.base = offsetof(struct anv_push_constants, dynamic_offsets),
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.range = MAX_DYNAMIC_BUFFERS * 4);
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nir_ssa_def *dynamic_offset =
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nir_bcsel(b, nir_ieq_imm(b, dyn_offset_base, 0xff),
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nir_imm_int(b, 0), dyn_load);
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/* The dynamic offset gets added to the base pointer so that we
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* have a sliding window range.
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*/
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nir_ssa_def *base_ptr =
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nir_pack_64_2x32(b, nir_channels(b, desc, 0x3));
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base_ptr = nir_iadd(b, base_ptr, nir_u2u64(b, dynamic_offset));
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desc = nir_vec4(b, nir_unpack_64_2x32_split_x(b, base_ptr),
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nir_unpack_64_2x32_split_y(b, base_ptr),
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nir_channel(b, desc, 2),
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nir_channel(b, desc, 3));
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}
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case nir_address_format_64bit_bounded_global:
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desc = build_buffer_descriptor_load(b, desc_type, index, state);
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break;
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}
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case nir_address_format_32bit_index_offset: {
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nir_ssa_def *array_index = nir_channel(b, index, 0);
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@ -683,7 +678,8 @@ lower_get_ssbo_size(nir_builder *b, nir_intrinsic_instr *intrin,
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nir_ssa_def *index = intrin->src[0].ssa;
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if (state->pdevice->has_a64_buffer_access) {
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nir_ssa_def *desc = build_ssbo_descriptor_load(b, desc_type, index, state);
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nir_ssa_def *desc =
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build_buffer_descriptor_load(b, desc_type, index, state);
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nir_ssa_def *size = nir_channel(b, desc, 2);
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, size);
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nir_instr_remove(&intrin->instr);
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