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intel/compiler: Don't create vec4 reg-set for gen8+ 

After 60e1d0f028, we know that vec4 will never be used for gen >= 8.

Ref: 60e1d0f028 ("intel/compiler: Remove INTEL_SCALAR_... env variables")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17437>
This commit is contained in:
Jordan Justen 2022-07-08 11:27:13 -07:00 committed by Marge Bot
parent 67c9ca2319
commit 4246a1ff47
2 changed files with 6 additions and 1 deletions
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3
src/intel/compiler/brw_compiler.c
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@ -110,7 +110,8 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo)
brw_init_isa_info(&compiler->isa, devinfo);
brw_fs_alloc_reg_sets(compiler);
brw_vec4_alloc_reg_set(compiler);
if (devinfo->ver < 8)
brw_vec4_alloc_reg_set(compiler);
compiler->precise_trig = env_var_as_boolean("INTEL_PRECISE_TRIG", false);

4
src/intel/compiler/brw_vec4_reg_allocate.cpp
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@ -94,6 +94,8 @@ brw_vec4_alloc_reg_set(struct brw_compiler *compiler)
int base_reg_count =
compiler->devinfo->ver >= 7 ? GFX7_MRF_HACK_START : BRW_MAX_GRF;
assert(compiler->devinfo->ver < 8);
/* After running split_virtual_grfs(), almost all VGRFs will be of size 1.
* SEND-from-GRF sources cannot be split, so we also need classes for each
* potential message length.
@ -163,6 +165,8 @@ vec4_visitor::reg_allocate()
if (0)
return reg_allocate_trivial();
assert(devinfo->ver < 8);
const vec4_live_variables &live = live_analysis.require();
int node_count = alloc.count;
int first_payload_node = node_count;