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radeonsi: align scratch and ring buffer allocations for faster memory access 

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
This commit is contained in:
Marek Olšák 2019-08-19 13:06:47 -04:00
parent d8f27552f4
commit 40e5ac45ae
3 changed files with 11 additions and 7 deletions
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3
src/gallium/drivers/radeonsi/si_compute.c
View File

@ -422,7 +422,8 @@ static bool si_setup_compute_scratch_buffer(struct si_context *sctx,
si_aligned_buffer_create(&sctx->screen->b,
SI_RESOURCE_FLAG_UNMAPPABLE,
PIPE_USAGE_DEFAULT,
scratch_needed, 256);
scratch_needed,
sctx->screen->info.pte_fragment_size);
if (!sctx->compute_scratch_buffer)
return false;

2
src/gallium/drivers/radeonsi/si_compute_prim_discard.c
View File

@ -977,7 +977,7 @@ static bool si_initialize_prim_discard_cmdbuf(struct si_context *sctx)
SI_RESOURCE_FLAG_UNMAPPABLE,
PIPE_USAGE_DEFAULT,
sctx->index_ring_size_per_ib * 2,
2 * 1024 * 1024);
sctx->screen->info.pte_fragment_size);
if (!sctx->index_ring)
return false;
}

13
src/gallium/drivers/radeonsi/si_state_shaders.c
View File

@ -3487,7 +3487,8 @@ static bool si_update_gs_ring_buffers(struct si_context *sctx)
pipe_aligned_buffer_create(sctx->b.screen,
SI_RESOURCE_FLAG_UNMAPPABLE,
PIPE_USAGE_DEFAULT,
esgs_ring_size, alignment);
esgs_ring_size,
sctx->screen->info.pte_fragment_size);
if (!sctx->esgs_ring)
return false;
}
@ -3498,7 +3499,8 @@ static bool si_update_gs_ring_buffers(struct si_context *sctx)
pipe_aligned_buffer_create(sctx->b.screen,
SI_RESOURCE_FLAG_UNMAPPABLE,
PIPE_USAGE_DEFAULT,
gsvs_ring_size, alignment);
gsvs_ring_size,
sctx->screen->info.pte_fragment_size);
if (!sctx->gsvs_ring)
return false;
}
@ -3735,9 +3737,10 @@ static bool si_update_spi_tmpring_size(struct si_context *sctx)
sctx->scratch_buffer =
si_aligned_buffer_create(&sctx->screen->b,
SI_RESOURCE_FLAG_UNMAPPABLE,
PIPE_USAGE_DEFAULT,
scratch_needed_size, 256);
SI_RESOURCE_FLAG_UNMAPPABLE,
PIPE_USAGE_DEFAULT,
scratch_needed_size,
sctx->screen->info.pte_fragment_size);
if (!sctx->scratch_buffer)
return false;