r300: working trivial/clear for r5xx
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@ -290,8 +290,8 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
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OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1);
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OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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/* XXX this should not be so rigid and it still doesn't work right */
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OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE |
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R300_COLOR_FORMAT_ARGB8888);
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debug_printf("Buffer width (stride): %d\n", dest->stride);
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OUT_CS_REG(R300_RB3D_COLORPITCH0, (dest->stride >> 2) | R300_COLOR_FORMAT_ARGB8888);
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OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
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/* XXX Packet3 */
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OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, 8));
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@ -44,11 +44,11 @@ static void r300_setup_miptree(struct r300_texture* tex)
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/* Radeons enjoy things in multiples of 32. */
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/* XXX NPOT -> 64, not 32 */
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stride = (base->nblocksx[i] * base->block.size + 31) & ~31;
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stride = (base->nblocksx[i] * base->block.size + 63) & ~63;
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size = stride * base->nblocksy[i] * base->depth[i];
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/* XXX 64 for NPOT */
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tex->offset[i] = (tex->size + 31) & ~31;
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tex->offset[i] = (tex->size + 63) & ~63;
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tex->size = tex->offset[i] + size;
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}
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}
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@ -72,7 +72,7 @@ static struct pipe_texture*
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r300_setup_miptree(tex);
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tex->buffer = screen->buffer_create(screen, 32,
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tex->buffer = screen->buffer_create(screen, 63,
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PIPE_BUFFER_USAGE_PIXEL,
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tex->size);
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@ -130,7 +130,7 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen,
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surface->nblocksy = texture->nblocksy[level];
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/* XXX save the actual stride instead plz kthnxbai */
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surface->stride =
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(texture->nblocksx[level] * texture->block.size + 31) & ~31;
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(texture->nblocksx[level] * texture->block.size + 63) & ~63;
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surface->offset = offset;
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surface->usage = flags;
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surface->status = PIPE_SURFACE_STATUS_DEFINED;
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