nir_to_tgsi: Set the TGSI Precise flag for exact ALU instructions.

This flag is used by the nv50, r600, and svga backends for instruction
exactness.  It was easier to plumb it in as an override in tgsi_ureg than
to make all of ALU instruction emit do it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14201>
This commit is contained in:
Emma Anholt 2021-12-14 15:51:13 -08:00 committed by Marge Bot
parent af4d277ccc
commit 3ffd6f3fa6
3 changed files with 13 additions and 1 deletions

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@ -863,6 +863,8 @@ ntt_emit_alu(struct ntt_compile *c, nir_alu_instr *instr)
int src_64 = nir_src_bit_size(instr->src[0].src) == 64;
int num_srcs = nir_op_infos[instr->op].num_inputs;
ureg_set_precise(c->ureg, instr->exact);
assert(num_srcs <= ARRAY_SIZE(src));
for (i = 0; i < num_srcs; i++)
src[i] = ntt_get_alu_src(c, instr, i);
@ -1262,6 +1264,8 @@ ntt_emit_alu(struct ntt_compile *c, nir_alu_instr *instr)
}
ureg_release_temporary(c->ureg, dst);
}
ureg_set_precise(c->ureg, false);
}
static struct ureg_src

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@ -205,6 +205,8 @@ struct ureg_program
struct ureg_tokens domain[2];
bool use_memory[TGSI_MEMORY_TYPE_COUNT];
bool precise;
};
static union tgsi_any_token error_tokens[32];
@ -1267,7 +1269,7 @@ ureg_emit_insn(struct ureg_program *ureg,
out[0].insn = tgsi_default_instruction();
out[0].insn.Opcode = opcode;
out[0].insn.Saturate = saturate;
out[0].insn.Precise = precise;
out[0].insn.Precise = precise || ureg->precise;
out[0].insn.NumDstRegs = num_dst;
out[0].insn.NumSrcRegs = num_src;
@ -2437,3 +2439,8 @@ void ureg_destroy( struct ureg_program *ureg )
FREE(ureg);
}
void ureg_set_precise( struct ureg_program *ureg, bool precise )
{
ureg->precise = precise;
}

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@ -137,6 +137,7 @@ void ureg_free_tokens( const struct tgsi_token *tokens );
void
ureg_destroy( struct ureg_program * );
void ureg_set_precise( struct ureg_program *ureg, bool precise );
/***********************************************************************
* Convenience routine: