nir_to_tgsi: Set the TGSI Precise flag for exact ALU instructions.
This flag is used by the nv50, r600, and svga backends for instruction exactness. It was easier to plumb it in as an override in tgsi_ureg than to make all of ALU instruction emit do it. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14201>
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@ -863,6 +863,8 @@ ntt_emit_alu(struct ntt_compile *c, nir_alu_instr *instr)
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int src_64 = nir_src_bit_size(instr->src[0].src) == 64;
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int num_srcs = nir_op_infos[instr->op].num_inputs;
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ureg_set_precise(c->ureg, instr->exact);
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assert(num_srcs <= ARRAY_SIZE(src));
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for (i = 0; i < num_srcs; i++)
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src[i] = ntt_get_alu_src(c, instr, i);
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@ -1262,6 +1264,8 @@ ntt_emit_alu(struct ntt_compile *c, nir_alu_instr *instr)
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}
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ureg_release_temporary(c->ureg, dst);
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}
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ureg_set_precise(c->ureg, false);
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}
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static struct ureg_src
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@ -205,6 +205,8 @@ struct ureg_program
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struct ureg_tokens domain[2];
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bool use_memory[TGSI_MEMORY_TYPE_COUNT];
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bool precise;
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};
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static union tgsi_any_token error_tokens[32];
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@ -1267,7 +1269,7 @@ ureg_emit_insn(struct ureg_program *ureg,
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out[0].insn = tgsi_default_instruction();
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out[0].insn.Opcode = opcode;
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out[0].insn.Saturate = saturate;
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out[0].insn.Precise = precise;
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out[0].insn.Precise = precise || ureg->precise;
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out[0].insn.NumDstRegs = num_dst;
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out[0].insn.NumSrcRegs = num_src;
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@ -2437,3 +2439,8 @@ void ureg_destroy( struct ureg_program *ureg )
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FREE(ureg);
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}
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void ureg_set_precise( struct ureg_program *ureg, bool precise )
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{
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ureg->precise = precise;
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}
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@ -137,6 +137,7 @@ void ureg_free_tokens( const struct tgsi_token *tokens );
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void
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ureg_destroy( struct ureg_program * );
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void ureg_set_precise( struct ureg_program *ureg, bool precise );
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/***********************************************************************
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* Convenience routine:
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