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radeon/llvm: Lower RETFLAG DAG Node to S_ENDPGM on SI

This commit is contained in:
Tom Stellard 2012-08-17 19:07:37 +00:00
parent e30b4644b6
commit 3f9b6aa0f4
3 changed files with 12 additions and 8 deletions
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7
src/gallium/drivers/radeon/AMDILInstrInfo.td
View File

@ -223,13 +223,6 @@ let isTerminator = 1, usesCustomInserter = 1 in {
[(br bb:$target)]>;
defm BRANCH_COND : BranchConditional<IL_brcond>;
}
//===---------------------------------------------------------------------===//
// return instructions
//===---------------------------------------------------------------------===//
let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in {
def RETURN : ILFormat<(outs), (ins variable_ops),
"RETURN", [(IL_retflag)]>;
}
//===---------------------------------------------------------------------===//
// Flow and Program control Instructions

8
src/gallium/drivers/radeon/R600Instructions.td
View File

@ -1213,6 +1213,14 @@ def MASK_WRITE : AMDGPUShaderInst <
} // End usesCustomInserter = 1
//===---------------------------------------------------------------------===//
// return instruction
//===---------------------------------------------------------------------===//
let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in {
def RETURN : ILFormat<(outs), (ins variable_ops),
"RETURN", [(IL_retflag)]>;
}
//===----------------------------------------------------------------------===//
// ISel Patterns
//===----------------------------------------------------------------------===//

5
src/gallium/drivers/radeon/SIInstructions.td
View File

@ -595,8 +595,11 @@ def V_INTERP_MOV_F32 : VINTRP <
let isTerminator = 1 in {
def S_ENDPGM : SOPP <0x00000001, (ins), "S_ENDPGM", []> {
def S_ENDPGM : SOPP <0x00000001, (ins), "S_ENDPGM",
[(IL_retflag)]> {
let SIMM16 = 0;
let isBarrier = 1;
let hasCtrlDep = 1;
}
let isBranch = 1 in {