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radeon/UVD: fix the decoding target pitch calculation 

The firmware expects the value in pixel not bytes. Didn't made a difference
so far because we only used 8bpp surfaces.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Mark Thompson <sw@jkqxz.net>
This commit is contained in:
Christian König 2017-03-08 12:51:13 +01:00
parent cee591a224
commit 3e1e441aa0
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/radeon/radeon_uvd.c
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@ -1354,7 +1354,7 @@ static unsigned bank_wh(unsigned bankwh)
void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
struct radeon_surf *chroma)
{
msg->body.decode.dt_pitch = luma->level[0].nblk_x * luma->bpe;
msg->body.decode.dt_pitch = luma->level[0].nblk_x;
switch (luma->level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;