radv: make sure CP DMA is idle before executing secondary command buffers
Buffer copies with CP DMA aren't synced.
Fix dEQP-VK.memory.pipeline_barrier.transfer_src_transfer_dst.65536
flakes on GFX10+.
Fixes: e870796113
("radv: prefer CP DMA for GTT buffer copies/clears on dGPUs due to slow PCIe")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10427>
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@ -4743,6 +4743,9 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
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/* Emit pending flushes on primary prior to executing secondary */
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si_emit_cache_flush(primary);
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/* Make sure CP DMA is idle on primary prior to executing secondary. */
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si_cp_dma_wait_for_idle(primary);
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for (uint32_t i = 0; i < commandBufferCount; i++) {
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RADV_FROM_HANDLE(radv_cmd_buffer, secondary, pCmdBuffers[i]);
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