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radeonsi: enable DCC with MSAA for VI 

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-11-24 00:41:47 +01:00
parent 373f4a48ae
commit 3c4d871ca2
5 changed files with 15 additions and 2 deletions
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2
src/gallium/drivers/radeon/r600_pipe_common.c
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@ -629,6 +629,8 @@ static const struct debug_named_value common_debug_options[] = {
{ "mono", DBG(MONOLITHIC_SHADERS), "Use old-style monolithic shaders compiled on demand" },
{ "unsafemath", DBG(UNSAFE_MATH), "Enable unsafe math shader optimizations" },
{ "nodccfb", DBG(NO_DCC_FB), "Disable separate DCC on the main framebuffer" },
{ "nodccmsaa", DBG(NO_DCC_MSAA), "Disable DCC for MSAA" },
{ "dccmsaa", DBG(DCC_MSAA), "Enable DCC for MSAA" },
{ "nodpbb", DBG(NO_DPBB), "Disable DPBB." },
{ "nodfsm", DBG(NO_DFSM), "Disable DFSM." },
{ "dpbb", DBG(DPBB), "Enable DPBB." },

3
src/gallium/drivers/radeon/r600_pipe_common.h
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@ -119,6 +119,8 @@ enum {
DBG_NO_DCC,
DBG_NO_DCC_CLEAR,
DBG_NO_DCC_FB,
DBG_NO_DCC_MSAA,
DBG_DCC_MSAA,
/* Tests: */
DBG_TEST_DMA,
@ -393,6 +395,7 @@ struct r600_common_screen {
uint64_t debug_flags;
bool has_rbplus; /* if RB+ registers exist */
bool rbplus_allowed; /* if RB+ is allowed */
bool dcc_msaa_allowed;
struct disk_cache *disk_shader_cache;

4
src/gallium/drivers/radeon/r600_texture.c
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@ -267,7 +267,9 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
if (rscreen->chip_class >= VI &&
(ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC ||
ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT ||
ptex->nr_samples >= 2))
/* DCC MSAA array textures are disallowed due to incomplete clear impl. */
(ptex->nr_samples >= 2 &&
(!rscreen->dcc_msaa_allowed || ptex->array_size > 1))))
flags |= RADEON_SURF_DISABLE_DCC;
if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {

5
src/gallium/drivers/radeonsi/si_pipe.c
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@ -1127,6 +1127,11 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
sscreen->b.family == CHIP_RAVEN);
}
sscreen->b.dcc_msaa_allowed =
!(sscreen->b.debug_flags & DBG(NO_DCC_MSAA)) &&
(sscreen->b.debug_flags & DBG(DCC_MSAA) ||
sscreen->b.chip_class == VI);
(void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain);
sscreen->use_monolithic_shaders =
(sscreen->b.debug_flags & DBG(MONOLITHIC_SHADERS)) != 0;

3
src/gallium/drivers/radeonsi/si_state.c
View File

@ -676,7 +676,8 @@ static void si_bind_blend_state(struct pipe_context *ctx, void *state)
old_blend->cb_target_mask != blend->cb_target_mask ||
old_blend->dual_src_blend != blend->dual_src_blend ||
(old_blend->blend_enable_4bit != blend->blend_enable_4bit &&
sctx->framebuffer.nr_samples >= 2))
sctx->framebuffer.nr_samples >= 2 &&
sctx->screen->b.dcc_msaa_allowed))
si_mark_atom_dirty(sctx, &sctx->cb_render_state);
if (!old_blend ||