radv: replace == GFX10 with >= GFX10 where it's needed
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5389>
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@ -98,7 +98,7 @@ radv_use_tc_compat_htile_for_image(struct radv_device *device,
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if (pCreateInfo->samples >= 2 &&
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(format == VK_FORMAT_D32_SFLOAT_S8_UINT ||
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(format == VK_FORMAT_D32_SFLOAT &&
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device->physical_device->rad_info.chip_class == GFX10)))
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device->physical_device->rad_info.chip_class >= GFX10)))
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return false;
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/* GFX9 supports both 32-bit and 16-bit depth surfaces, while GFX8 only
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@ -1271,7 +1271,7 @@ handle_vs_input_decl(struct radv_shader_context *ctx,
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* access are detected. Only GFX6 and GFX10 are affected.
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*/
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bool unaligned_vertex_fetches = false;
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if ((ctx->ac.chip_class == GFX6 || ctx->ac.chip_class == GFX10) &&
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if ((ctx->ac.chip_class == GFX6 || ctx->ac.chip_class >= GFX10) &&
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vtx_info->chan_format != data_format &&
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((attrib_offset % vtx_info->element_size) ||
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(attrib_stride % vtx_info->element_size)))
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@ -1282,7 +1282,7 @@ handle_vs_input_decl(struct radv_shader_context *ctx,
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LLVMValueRef values[4];
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assert(ctx->ac.chip_class == GFX6 ||
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ctx->ac.chip_class == GFX10);
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ctx->ac.chip_class >= GFX10);
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for (unsigned chan = 0; chan < num_channels; chan++) {
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unsigned chan_offset = attrib_offset + chan * vtx_info->chan_byte_size;
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