pan/va: Handle uniforms from page 1
Like Bifrost, Valhall can access 2x as many fast acess uniforms as previously thought. However, on Valhall this requires using the pagination mechanism. Support this in the dis/assembler. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15364>
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@ -111,9 +111,9 @@ def encode_source(op, fau):
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elif op[0] == 'r':
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return parse_int(op[1:], 0, 63)
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elif op[0] == 'u':
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val = parse_int(op[1:], 0, 63)
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val = parse_int(op[1:], 0, 127)
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fau.set_page(val >> 6)
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return val | 0x80
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return (val & 0x3F) | 0x80
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elif op[0] == 'i':
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return int(op[3:]) | 0xC0
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elif op in enums['thread_storage_pointers'].bare_values:
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@ -102,7 +102,7 @@ va_print_src(FILE *fp, uint8_t src, unsigned imm_mode)
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fprintf(fp, "0x%X", va_immediates[value]);
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}
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} else if (type == VA_SRC_UNIFORM_TYPE) {
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fprintf(fp, "u%u", value);
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fprintf(fp, "u%u", value | (imm_mode << 6));
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} else {
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bool discard = (type & 1);
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fprintf(fp, "%sr%u", discard ? "`" : "", value);
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@ -214,3 +214,5 @@ f0 00 3c 32 08 40 7f 78 BLEND.slot0.v4.f32.return @r0:r1:r2:r3, blend_descrip
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c0 00 00 00 00 f6 10 01 IADD_IMM.i32 r54, 0x0, #0x0
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c0 f1 00 00 10 c1 2f 08 BRANCHZI.eq.absolute.wait0 0x0, blend_descriptor_0_y
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80 00 c0 17 34 7c 25 01 TEX_FETCH.slot0.f.32.2d @r0:r1:r2:r3, @r60:r61, u0
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80 00 00 00 00 c1 91 02 MOV.i32 r1, u64
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81 00 00 00 00 c1 91 02 MOV.i32 r1, u65
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