gallivm: nir->tgsi info convertor (v2)
This is a port of the old radeonsi code to be used for llvmpipe NIR support. Once we remove TGSI support from llvmpipe (I can dream? :-), then we should be able to refine most of this down and remove it. v2: port to later radeonsi code for vertex inputs and sampler/io parsing. Acked-by: Roland Scheidegger <sroland@vmware.com>
This commit is contained in:
parent
c879efec09
commit
3b9950098b
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@ -317,7 +317,9 @@ C_SOURCES := \
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NIR_SOURCES := \
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nir/tgsi_to_nir.c \
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nir/tgsi_to_nir.h
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nir/tgsi_to_nir.h \
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nir/nir_to_tgsi_info.c \
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nir/nir_to_tgsi_info.h
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VL_SOURCES := \
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vl/vl_bicubic_filter.c \
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@ -6,6 +6,8 @@ env.Append(CPPPATH = [
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'#src',
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'indices',
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'util',
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'#src/compiler/nir',
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'../../compiler/nir',
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])
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env = env.Clone()
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@ -34,6 +36,7 @@ source = env.ParseSourceList('Makefile.sources', [
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if env['llvm']:
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source += env.ParseSourceList('Makefile.sources', [
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'NIR_SOURCES',
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'GALLIVM_SOURCES',
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])
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@ -417,6 +417,8 @@ if with_llvm
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'draw/draw_llvm_sample.c',
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'draw/draw_pt_fetch_shade_pipeline_llvm.c',
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'draw/draw_vs_llvm.c',
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'nir/nir_to_tgsi_info.c',
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'nir/nir_to_tgsi_info.h',
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)
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endif
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@ -0,0 +1,766 @@
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/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* This is ported mostly out of radeonsi, if we can drop TGSI, we can likely
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* make a lot this go away.
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*/
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#include "nir_to_tgsi_info.h"
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#include "util/u_math.h"
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#include "nir.h"
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#include "nir_deref.h"
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#include "tgsi/tgsi_scan.h"
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#include "tgsi/tgsi_from_mesa.h"
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static nir_variable* tex_get_texture_var(nir_tex_instr *instr)
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{
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for (unsigned i = 0; i < instr->num_srcs; i++) {
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switch (instr->src[i].src_type) {
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case nir_tex_src_texture_deref:
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return nir_deref_instr_get_variable(nir_src_as_deref(instr->src[i].src));
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default:
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break;
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}
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}
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return NULL;
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}
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static nir_variable* intrinsic_get_var(nir_intrinsic_instr *instr)
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{
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return nir_deref_instr_get_variable(nir_src_as_deref(instr->src[0]));
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}
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static void gather_usage_helper(const nir_deref_instr **deref_ptr,
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unsigned location,
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uint8_t mask,
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uint8_t *usage_mask)
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{
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for (; *deref_ptr; deref_ptr++) {
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const nir_deref_instr *deref = *deref_ptr;
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switch (deref->deref_type) {
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case nir_deref_type_array: {
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unsigned elem_size =
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glsl_count_attribute_slots(deref->type, false);
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if (nir_src_is_const(deref->arr.index)) {
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location += elem_size * nir_src_as_uint(deref->arr.index);
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} else {
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unsigned array_elems =
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glsl_get_length(deref_ptr[-1]->type);
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for (unsigned i = 0; i < array_elems; i++) {
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gather_usage_helper(deref_ptr + 1,
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location + elem_size * i,
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mask, usage_mask);
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}
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return;
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}
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break;
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}
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case nir_deref_type_struct: {
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const struct glsl_type *parent_type =
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deref_ptr[-1]->type;
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unsigned index = deref->strct.index;
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for (unsigned i = 0; i < index; i++) {
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const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
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location += glsl_count_attribute_slots(ft, false);
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}
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break;
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}
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default:
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unreachable("Unhandled deref type in gather_components_used_helper");
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}
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}
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usage_mask[location] |= mask & 0xf;
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if (mask & 0xf0)
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usage_mask[location + 1] |= (mask >> 4) & 0xf;
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}
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static void gather_usage(const nir_deref_instr *deref,
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uint8_t mask,
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uint8_t *usage_mask)
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{
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nir_deref_path path;
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nir_deref_path_init(&path, (nir_deref_instr *)deref, NULL);
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unsigned location_frac = path.path[0]->var->data.location_frac;
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if (glsl_type_is_64bit(deref->type)) {
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uint8_t new_mask = 0;
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for (unsigned i = 0; i < 4; i++) {
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if (mask & (1 << i))
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new_mask |= 0x3 << (2 * i);
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}
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mask = new_mask << location_frac;
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} else {
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mask <<= location_frac;
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mask &= 0xf;
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}
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gather_usage_helper((const nir_deref_instr **)&path.path[1],
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path.path[0]->var->data.driver_location,
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mask, usage_mask);
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nir_deref_path_finish(&path);
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}
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static void gather_intrinsic_load_deref_info(const nir_shader *nir,
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const nir_intrinsic_instr *instr,
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const nir_deref_instr *deref,
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bool need_texcoord,
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nir_variable *var,
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struct tgsi_shader_info *info)
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{
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assert(var && var->data.mode == nir_var_shader_in);
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gather_usage(deref, nir_ssa_def_components_read(&instr->dest.ssa),
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info->input_usage_mask);
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switch (nir->info.stage) {
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case MESA_SHADER_VERTEX: {
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break;
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}
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default: {
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unsigned semantic_name, semantic_index;
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tgsi_get_gl_varying_semantic(var->data.location, need_texcoord,
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&semantic_name, &semantic_index);
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if (semantic_name == TGSI_SEMANTIC_COLOR) {
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uint8_t mask = nir_ssa_def_components_read(&instr->dest.ssa);
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info->colors_read |= mask << (semantic_index * 4);
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}
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if (semantic_name == TGSI_SEMANTIC_FACE) {
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info->uses_frontface = true;
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}
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break;
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}
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}
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}
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static void scan_instruction(const struct nir_shader *nir,
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bool need_texcoord,
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struct tgsi_shader_info *info,
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nir_instr *instr)
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{
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if (instr->type == nir_instr_type_alu) {
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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switch (alu->op) {
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case nir_op_fddx:
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case nir_op_fddy:
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case nir_op_fddx_fine:
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case nir_op_fddy_fine:
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case nir_op_fddx_coarse:
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case nir_op_fddy_coarse:
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info->uses_derivatives = true;
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break;
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default:
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break;
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}
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} else if (instr->type == nir_instr_type_tex) {
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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nir_variable *texture = tex_get_texture_var(tex);
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if (!texture) {
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info->samplers_declared |=
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u_bit_consecutive(tex->sampler_index, 1);
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} else {
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if (texture->data.bindless)
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info->uses_bindless_samplers = true;
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}
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switch (tex->op) {
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case nir_texop_tex:
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case nir_texop_txb:
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case nir_texop_lod:
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info->uses_derivatives = true;
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break;
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default:
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break;
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}
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} else if (instr->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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switch (intr->intrinsic) {
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case nir_intrinsic_load_front_face:
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info->uses_frontface = 1;
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break;
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case nir_intrinsic_load_instance_id:
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info->uses_instanceid = 1;
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break;
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case nir_intrinsic_load_invocation_id:
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info->uses_invocationid = true;
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break;
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case nir_intrinsic_load_num_work_groups:
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info->uses_grid_size = true;
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break;
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case nir_intrinsic_load_local_group_size:
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/* The block size is translated to IMM with a fixed block size. */
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if (info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)
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info->uses_block_size = true;
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break;
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case nir_intrinsic_load_local_invocation_id:
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case nir_intrinsic_load_work_group_id: {
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unsigned mask = nir_ssa_def_components_read(&intr->dest.ssa);
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while (mask) {
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unsigned i = u_bit_scan(&mask);
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if (intr->intrinsic == nir_intrinsic_load_work_group_id)
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info->uses_block_id[i] = true;
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else
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info->uses_thread_id[i] = true;
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}
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break;
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}
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case nir_intrinsic_load_vertex_id:
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info->uses_vertexid = 1;
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break;
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case nir_intrinsic_load_vertex_id_zero_base:
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info->uses_vertexid_nobase = 1;
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break;
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case nir_intrinsic_load_base_vertex:
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info->uses_basevertex = 1;
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break;
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case nir_intrinsic_load_draw_id:
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info->uses_drawid = 1;
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break;
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case nir_intrinsic_load_primitive_id:
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info->uses_primid = 1;
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break;
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case nir_intrinsic_load_sample_mask_in:
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info->reads_samplemask = true;
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break;
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case nir_intrinsic_load_tess_level_inner:
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case nir_intrinsic_load_tess_level_outer:
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info->reads_tess_factors = true;
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break;
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case nir_intrinsic_bindless_image_load:
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info->uses_bindless_images = true;
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if (nir_intrinsic_image_dim(intr) == GLSL_SAMPLER_DIM_BUF)
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info->uses_bindless_buffer_load = true;
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else
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info->uses_bindless_image_load = true;
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break;
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case nir_intrinsic_bindless_image_size:
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case nir_intrinsic_bindless_image_samples:
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info->uses_bindless_images = true;
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break;
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case nir_intrinsic_bindless_image_store:
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info->uses_bindless_images = true;
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if (nir_intrinsic_image_dim(intr) == GLSL_SAMPLER_DIM_BUF)
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info->uses_bindless_buffer_store = true;
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else
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info->uses_bindless_image_store = true;
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info->writes_memory = true;
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break;
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case nir_intrinsic_image_deref_store:
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info->writes_memory = true;
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break;
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case nir_intrinsic_bindless_image_atomic_add:
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case nir_intrinsic_bindless_image_atomic_imin:
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case nir_intrinsic_bindless_image_atomic_imax:
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case nir_intrinsic_bindless_image_atomic_umin:
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case nir_intrinsic_bindless_image_atomic_umax:
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case nir_intrinsic_bindless_image_atomic_and:
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case nir_intrinsic_bindless_image_atomic_or:
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case nir_intrinsic_bindless_image_atomic_xor:
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case nir_intrinsic_bindless_image_atomic_exchange:
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case nir_intrinsic_bindless_image_atomic_comp_swap:
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info->uses_bindless_images = true;
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if (nir_intrinsic_image_dim(intr) == GLSL_SAMPLER_DIM_BUF)
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info->uses_bindless_buffer_atomic = true;
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else
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info->uses_bindless_image_atomic = true;
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info->writes_memory = true;
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break;
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case nir_intrinsic_image_deref_atomic_add:
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case nir_intrinsic_image_deref_atomic_imin:
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case nir_intrinsic_image_deref_atomic_imax:
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case nir_intrinsic_image_deref_atomic_umin:
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case nir_intrinsic_image_deref_atomic_umax:
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case nir_intrinsic_image_deref_atomic_and:
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case nir_intrinsic_image_deref_atomic_or:
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case nir_intrinsic_image_deref_atomic_xor:
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case nir_intrinsic_image_deref_atomic_exchange:
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case nir_intrinsic_image_deref_atomic_comp_swap:
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info->writes_memory = true;
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break;
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_ssbo_atomic_add:
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case nir_intrinsic_ssbo_atomic_imin:
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case nir_intrinsic_ssbo_atomic_umin:
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case nir_intrinsic_ssbo_atomic_imax:
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_ssbo_atomic_and:
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case nir_intrinsic_ssbo_atomic_or:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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info->writes_memory = true;
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break;
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case nir_intrinsic_load_deref: {
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nir_variable *var = intrinsic_get_var(intr);
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nir_variable_mode mode = var->data.mode;
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nir_deref_instr *const deref = nir_src_as_deref(intr->src[0]);
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enum glsl_base_type base_type =
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glsl_get_base_type(glsl_without_array(var->type));
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if (nir_deref_instr_has_indirect(deref)) {
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if (mode == nir_var_shader_in)
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info->indirect_files |= (1 << TGSI_FILE_INPUT);
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}
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if (mode == nir_var_shader_in) {
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gather_intrinsic_load_deref_info(nir, intr, deref, need_texcoord, var, info);
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switch (var->data.interpolation) {
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case INTERP_MODE_NONE:
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if (glsl_base_type_is_integer(base_type))
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break;
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/* fall-through */
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case INTERP_MODE_SMOOTH:
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if (var->data.sample)
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info->uses_persp_sample = true;
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else if (var->data.centroid)
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info->uses_persp_centroid = true;
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else
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info->uses_persp_center = true;
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break;
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case INTERP_MODE_NOPERSPECTIVE:
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if (var->data.sample)
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info->uses_linear_sample = true;
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else if (var->data.centroid)
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info->uses_linear_centroid = true;
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else
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info->uses_linear_center = true;
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break;
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}
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}
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break;
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}
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case nir_intrinsic_interp_deref_at_centroid:
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case nir_intrinsic_interp_deref_at_sample:
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case nir_intrinsic_interp_deref_at_offset: {
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enum glsl_interp_mode interp = intrinsic_get_var(intr)->data.interpolation;
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switch (interp) {
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case INTERP_MODE_SMOOTH:
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case INTERP_MODE_NONE:
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if (intr->intrinsic == nir_intrinsic_interp_deref_at_centroid)
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info->uses_persp_opcode_interp_centroid = true;
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else if (intr->intrinsic == nir_intrinsic_interp_deref_at_sample)
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info->uses_persp_opcode_interp_sample = true;
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else
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info->uses_persp_opcode_interp_offset = true;
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break;
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case INTERP_MODE_NOPERSPECTIVE:
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if (intr->intrinsic == nir_intrinsic_interp_deref_at_centroid)
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info->uses_linear_opcode_interp_centroid = true;
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else if (intr->intrinsic == nir_intrinsic_interp_deref_at_sample)
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info->uses_linear_opcode_interp_sample = true;
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else
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info->uses_linear_opcode_interp_offset = true;
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break;
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case INTERP_MODE_FLAT:
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break;
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default:
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unreachable("Unsupported interpoation type");
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||||
}
|
||||
break;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void nir_tgsi_scan_shader(const struct nir_shader *nir,
|
||||
struct tgsi_shader_info *info,
|
||||
bool need_texcoord)
|
||||
{
|
||||
nir_function *func;
|
||||
unsigned i;
|
||||
|
||||
info->processor = pipe_shader_type_from_mesa(nir->info.stage);
|
||||
info->num_tokens = 2; /* indicate that the shader is non-empty */
|
||||
info->num_instructions = 2;
|
||||
|
||||
info->properties[TGSI_PROPERTY_NEXT_SHADER] =
|
||||
pipe_shader_type_from_mesa(nir->info.next_stage);
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_VERTEX) {
|
||||
info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION] =
|
||||
nir->info.vs.window_space_position;
|
||||
}
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
|
||||
info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT] =
|
||||
nir->info.tess.tcs_vertices_out;
|
||||
}
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
|
||||
if (nir->info.tess.primitive_mode == GL_ISOLINES)
|
||||
info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = PIPE_PRIM_LINES;
|
||||
else
|
||||
info->properties[TGSI_PROPERTY_TES_PRIM_MODE] = nir->info.tess.primitive_mode;
|
||||
|
||||
STATIC_ASSERT((TESS_SPACING_EQUAL + 1) % 3 == PIPE_TESS_SPACING_EQUAL);
|
||||
STATIC_ASSERT((TESS_SPACING_FRACTIONAL_ODD + 1) % 3 ==
|
||||
PIPE_TESS_SPACING_FRACTIONAL_ODD);
|
||||
STATIC_ASSERT((TESS_SPACING_FRACTIONAL_EVEN + 1) % 3 ==
|
||||
PIPE_TESS_SPACING_FRACTIONAL_EVEN);
|
||||
|
||||
info->properties[TGSI_PROPERTY_TES_SPACING] = (nir->info.tess.spacing + 1) % 3;
|
||||
info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW] = !nir->info.tess.ccw;
|
||||
info->properties[TGSI_PROPERTY_TES_POINT_MODE] = nir->info.tess.point_mode;
|
||||
}
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_GEOMETRY) {
|
||||
info->properties[TGSI_PROPERTY_GS_INPUT_PRIM] = nir->info.gs.input_primitive;
|
||||
info->properties[TGSI_PROPERTY_GS_OUTPUT_PRIM] = nir->info.gs.output_primitive;
|
||||
info->properties[TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES] = nir->info.gs.vertices_out;
|
||||
info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = nir->info.gs.invocations;
|
||||
}
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
|
||||
info->properties[TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL] =
|
||||
nir->info.fs.early_fragment_tests | nir->info.fs.post_depth_coverage;
|
||||
info->properties[TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE] = nir->info.fs.post_depth_coverage;
|
||||
|
||||
if (nir->info.fs.pixel_center_integer) {
|
||||
info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] =
|
||||
TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
|
||||
}
|
||||
|
||||
if (nir->info.fs.depth_layout != FRAG_DEPTH_LAYOUT_NONE) {
|
||||
switch (nir->info.fs.depth_layout) {
|
||||
case FRAG_DEPTH_LAYOUT_ANY:
|
||||
info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_ANY;
|
||||
break;
|
||||
case FRAG_DEPTH_LAYOUT_GREATER:
|
||||
info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_GREATER;
|
||||
break;
|
||||
case FRAG_DEPTH_LAYOUT_LESS:
|
||||
info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_LESS;
|
||||
break;
|
||||
case FRAG_DEPTH_LAYOUT_UNCHANGED:
|
||||
info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_UNCHANGED;
|
||||
break;
|
||||
default:
|
||||
unreachable("Unknow depth layout");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (gl_shader_stage_is_compute(nir->info.stage)) {
|
||||
info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] = nir->info.cs.local_size[0];
|
||||
info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] = nir->info.cs.local_size[1];
|
||||
info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH] = nir->info.cs.local_size[2];
|
||||
}
|
||||
|
||||
i = 0;
|
||||
uint64_t processed_inputs = 0;
|
||||
nir_foreach_variable(variable, &nir->inputs) {
|
||||
unsigned semantic_name, semantic_index;
|
||||
|
||||
const struct glsl_type *type = variable->type;
|
||||
if (nir_is_per_vertex_io(variable, nir->info.stage)) {
|
||||
assert(glsl_type_is_array(type));
|
||||
type = glsl_get_array_element(type);
|
||||
}
|
||||
|
||||
unsigned attrib_count = glsl_count_attribute_slots(type,
|
||||
nir->info.stage == MESA_SHADER_VERTEX);
|
||||
|
||||
i = variable->data.driver_location;
|
||||
|
||||
/* Vertex shader inputs don't have semantics. The state
|
||||
* tracker has already mapped them to attributes via
|
||||
* variable->data.driver_location.
|
||||
*/
|
||||
if (nir->info.stage == MESA_SHADER_VERTEX) {
|
||||
continue;
|
||||
}
|
||||
|
||||
for (unsigned j = 0; j < attrib_count; j++, i++) {
|
||||
|
||||
if (processed_inputs & ((uint64_t)1 << i))
|
||||
continue;
|
||||
|
||||
processed_inputs |= ((uint64_t)1 << i);
|
||||
|
||||
tgsi_get_gl_varying_semantic(variable->data.location + j, need_texcoord,
|
||||
&semantic_name, &semantic_index);
|
||||
|
||||
info->input_semantic_name[i] = semantic_name;
|
||||
info->input_semantic_index[i] = semantic_index;
|
||||
|
||||
if (semantic_name == TGSI_SEMANTIC_PRIMID)
|
||||
info->uses_primid = true;
|
||||
|
||||
enum glsl_base_type base_type =
|
||||
glsl_get_base_type(glsl_without_array(variable->type));
|
||||
|
||||
switch (variable->data.interpolation) {
|
||||
case INTERP_MODE_NONE:
|
||||
if (glsl_base_type_is_integer(base_type)) {
|
||||
info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
|
||||
break;
|
||||
}
|
||||
|
||||
if (semantic_name == TGSI_SEMANTIC_COLOR) {
|
||||
info->input_interpolate[i] = TGSI_INTERPOLATE_COLOR;
|
||||
break;
|
||||
}
|
||||
/* fall-through */
|
||||
|
||||
case INTERP_MODE_SMOOTH:
|
||||
assert(!glsl_base_type_is_integer(base_type));
|
||||
|
||||
info->input_interpolate[i] = TGSI_INTERPOLATE_PERSPECTIVE;
|
||||
break;
|
||||
|
||||
case INTERP_MODE_NOPERSPECTIVE:
|
||||
assert(!glsl_base_type_is_integer(base_type));
|
||||
|
||||
info->input_interpolate[i] = TGSI_INTERPOLATE_LINEAR;
|
||||
break;
|
||||
|
||||
case INTERP_MODE_FLAT:
|
||||
info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
info->num_inputs = nir->num_inputs;
|
||||
info->file_max[TGSI_FILE_INPUT] = nir->num_inputs - 1;
|
||||
|
||||
i = 0;
|
||||
uint64_t processed_outputs = 0;
|
||||
unsigned num_outputs = 0;
|
||||
nir_foreach_variable(variable, &nir->outputs) {
|
||||
unsigned semantic_name, semantic_index;
|
||||
|
||||
i = variable->data.driver_location;
|
||||
|
||||
const struct glsl_type *type = variable->type;
|
||||
if (nir_is_per_vertex_io(variable, nir->info.stage)) {
|
||||
assert(glsl_type_is_array(type));
|
||||
type = glsl_get_array_element(type);
|
||||
}
|
||||
|
||||
unsigned attrib_count = glsl_count_attribute_slots(type, false);
|
||||
for (unsigned k = 0; k < attrib_count; k++, i++) {
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
|
||||
tgsi_get_gl_frag_result_semantic(variable->data.location + k,
|
||||
&semantic_name, &semantic_index);
|
||||
|
||||
/* Adjust for dual source blending */
|
||||
if (variable->data.index > 0) {
|
||||
semantic_index++;
|
||||
}
|
||||
} else {
|
||||
tgsi_get_gl_varying_semantic(variable->data.location + k, need_texcoord,
|
||||
&semantic_name, &semantic_index);
|
||||
}
|
||||
|
||||
unsigned num_components = 4;
|
||||
unsigned vector_elements = glsl_get_vector_elements(glsl_without_array(variable->type));
|
||||
if (vector_elements)
|
||||
num_components = vector_elements;
|
||||
|
||||
unsigned component = variable->data.location_frac;
|
||||
if (glsl_type_is_64bit(glsl_without_array(variable->type))) {
|
||||
if (glsl_type_is_dual_slot(glsl_without_array(variable->type)) && k % 2) {
|
||||
num_components = (num_components * 2) - 4;
|
||||
component = 0;
|
||||
} else {
|
||||
num_components = MIN2(num_components * 2, 4);
|
||||
}
|
||||
}
|
||||
|
||||
ubyte usagemask = 0;
|
||||
for (unsigned j = component; j < num_components + component; j++) {
|
||||
switch (j) {
|
||||
case 0:
|
||||
usagemask |= TGSI_WRITEMASK_X;
|
||||
break;
|
||||
case 1:
|
||||
usagemask |= TGSI_WRITEMASK_Y;
|
||||
break;
|
||||
case 2:
|
||||
usagemask |= TGSI_WRITEMASK_Z;
|
||||
break;
|
||||
case 3:
|
||||
usagemask |= TGSI_WRITEMASK_W;
|
||||
break;
|
||||
default:
|
||||
unreachable("error calculating component index");
|
||||
}
|
||||
}
|
||||
|
||||
unsigned gs_out_streams;
|
||||
if (variable->data.stream & NIR_STREAM_PACKED) {
|
||||
gs_out_streams = variable->data.stream & ~NIR_STREAM_PACKED;
|
||||
} else {
|
||||
assert(variable->data.stream < 4);
|
||||
gs_out_streams = 0;
|
||||
for (unsigned j = 0; j < num_components; ++j)
|
||||
gs_out_streams |= variable->data.stream << (2 * (component + j));
|
||||
}
|
||||
|
||||
unsigned streamx = gs_out_streams & 3;
|
||||
unsigned streamy = (gs_out_streams >> 2) & 3;
|
||||
unsigned streamz = (gs_out_streams >> 4) & 3;
|
||||
unsigned streamw = (gs_out_streams >> 6) & 3;
|
||||
|
||||
if (usagemask & TGSI_WRITEMASK_X) {
|
||||
info->output_usagemask[i] |= TGSI_WRITEMASK_X;
|
||||
info->output_streams[i] |= streamx;
|
||||
info->num_stream_output_components[streamx]++;
|
||||
}
|
||||
if (usagemask & TGSI_WRITEMASK_Y) {
|
||||
info->output_usagemask[i] |= TGSI_WRITEMASK_Y;
|
||||
info->output_streams[i] |= streamy << 2;
|
||||
info->num_stream_output_components[streamy]++;
|
||||
}
|
||||
if (usagemask & TGSI_WRITEMASK_Z) {
|
||||
info->output_usagemask[i] |= TGSI_WRITEMASK_Z;
|
||||
info->output_streams[i] |= streamz << 4;
|
||||
info->num_stream_output_components[streamz]++;
|
||||
}
|
||||
if (usagemask & TGSI_WRITEMASK_W) {
|
||||
info->output_usagemask[i] |= TGSI_WRITEMASK_W;
|
||||
info->output_streams[i] |= streamw << 6;
|
||||
info->num_stream_output_components[streamw]++;
|
||||
}
|
||||
|
||||
/* make sure we only count this location once against
|
||||
* the num_outputs counter.
|
||||
*/
|
||||
if (processed_outputs & ((uint64_t)1 << i))
|
||||
continue;
|
||||
|
||||
processed_outputs |= ((uint64_t)1 << i);
|
||||
num_outputs++;
|
||||
|
||||
info->output_semantic_name[i] = semantic_name;
|
||||
info->output_semantic_index[i] = semantic_index;
|
||||
|
||||
switch (semantic_name) {
|
||||
case TGSI_SEMANTIC_PRIMID:
|
||||
info->writes_primid = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_VIEWPORT_INDEX:
|
||||
info->writes_viewport_index = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_LAYER:
|
||||
info->writes_layer = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_PSIZE:
|
||||
info->writes_psize = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_CLIPVERTEX:
|
||||
info->writes_clipvertex = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_COLOR:
|
||||
info->colors_written |= 1 << semantic_index;
|
||||
break;
|
||||
case TGSI_SEMANTIC_STENCIL:
|
||||
info->writes_stencil = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_SAMPLEMASK:
|
||||
info->writes_samplemask = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_EDGEFLAG:
|
||||
info->writes_edgeflag = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_POSITION:
|
||||
if (info->processor == PIPE_SHADER_FRAGMENT)
|
||||
info->writes_z = true;
|
||||
else
|
||||
info->writes_position = true;
|
||||
break;
|
||||
}
|
||||
|
||||
if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
|
||||
switch (semantic_name) {
|
||||
case TGSI_SEMANTIC_PATCH:
|
||||
info->reads_perpatch_outputs = true;
|
||||
break;
|
||||
case TGSI_SEMANTIC_TESSINNER:
|
||||
case TGSI_SEMANTIC_TESSOUTER:
|
||||
info->reads_tessfactor_outputs = true;
|
||||
break;
|
||||
default:
|
||||
info->reads_pervertex_outputs = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
unsigned loc = variable->data.location;
|
||||
if (nir->info.stage == MESA_SHADER_FRAGMENT &&
|
||||
loc == FRAG_RESULT_COLOR &&
|
||||
nir->info.outputs_written & (1ull << loc)) {
|
||||
assert(attrib_count == 1);
|
||||
info->properties[TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS] = true;
|
||||
}
|
||||
}
|
||||
|
||||
info->num_outputs = num_outputs;
|
||||
|
||||
info->const_file_max[0] = nir->num_uniforms - 1;
|
||||
info->const_buffers_declared = u_bit_consecutive(1, nir->info.num_ubos);
|
||||
if (nir->num_uniforms > 0)
|
||||
info->const_buffers_declared |= 1;
|
||||
info->images_declared = u_bit_consecutive(0, nir->info.num_images);
|
||||
info->samplers_declared = nir->info.textures_used;
|
||||
|
||||
info->file_max[TGSI_FILE_SAMPLER] = util_last_bit(info->samplers_declared) - 1;
|
||||
info->file_max[TGSI_FILE_SAMPLER_VIEW] = info->file_max[TGSI_FILE_SAMPLER];
|
||||
info->file_mask[TGSI_FILE_SAMPLER] = info->file_mask[TGSI_FILE_SAMPLER_VIEW] = info->samplers_declared;
|
||||
info->file_max[TGSI_FILE_IMAGE] = util_last_bit(info->images_declared) - 1;
|
||||
info->file_mask[TGSI_FILE_IMAGE] = info->images_declared;
|
||||
|
||||
info->num_written_clipdistance = nir->info.clip_distance_array_size;
|
||||
info->num_written_culldistance = nir->info.cull_distance_array_size;
|
||||
info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
|
||||
info->culldist_writemask = u_bit_consecutive(0, info->num_written_culldistance);
|
||||
|
||||
if (info->processor == PIPE_SHADER_FRAGMENT)
|
||||
info->uses_kill = nir->info.fs.uses_discard;
|
||||
|
||||
func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
|
||||
nir_foreach_block(block, func->impl) {
|
||||
nir_foreach_instr(instr, block)
|
||||
scan_instruction(nir, need_texcoord, info, instr);
|
||||
}
|
||||
}
|
|
@ -0,0 +1,42 @@
|
|||
/*
|
||||
* Copyright 2019 Red Hat
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* on the rights to use, copy, modify, merge, publish, distribute, sub
|
||||
* license, and/or sell copies of the Software, and to permit persons to whom
|
||||
* the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
|
||||
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
||||
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
|
||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
#ifndef _NIR_TO_TGSI_INFO_H_
|
||||
#define _NIR_TO_TGSI_INFO_H_
|
||||
|
||||
#include <stdbool.h>
|
||||
struct nir_shader;
|
||||
struct tgsi_shader_info;
|
||||
|
||||
/* only llvmpipe uses this path, so handle draw not using llvm */
|
||||
#ifdef LLVM_AVAILABLE
|
||||
void nir_tgsi_scan_shader(const struct nir_shader *nir,
|
||||
struct tgsi_shader_info *info,
|
||||
bool need_texcoord);
|
||||
#else
|
||||
static inline void nir_tgsi_scan_shader(const struct nir_shader *nir,
|
||||
struct tgsi_shader_info *info,
|
||||
bool need_texcoord) {}
|
||||
#endif
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue