radeonsi: add debug flags that disable DCC and DCC fast clear
For debugging, bug reports, etc. This is not in the radeonsi directory, but it is about radeonsi. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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235d38584c
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@ -360,6 +360,8 @@ static const struct debug_named_value common_debug_options[] = {
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{ "precompile", DBG_PRECOMPILE, "Compile one shader variant at shader creation." },
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{ "nowc", DBG_NO_WC, "Disable GTT write combining" },
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{ "check_vm", DBG_CHECK_VM, "Check VM faults and dump debug info." },
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{ "nodcc", DBG_NO_DCC, "Disable DCC." },
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{ "nodccclear", DBG_NO_DCC_CLEAR, "Disable DCC fast clear." },
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DEBUG_NAMED_VALUE_END /* must be last */
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};
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@ -99,6 +99,8 @@
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#define DBG_INFO (1llu << 40)
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#define DBG_NO_WC (1llu << 41)
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#define DBG_CHECK_VM (1llu << 42)
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#define DBG_NO_DCC (1llu << 43)
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#define DBG_NO_DCC_CLEAR (1llu << 44)
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#define R600_MAP_BUFFER_ALIGNMENT 64
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@ -486,6 +486,9 @@ static void r600_texture_alloc_cmask_separate(struct r600_common_screen *rscreen
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static void vi_texture_alloc_dcc_separate(struct r600_common_screen *rscreen,
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struct r600_texture *rtex)
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{
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if (rscreen->debug_flags & DBG_NO_DCC)
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return;
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rtex->dcc_buffer = (struct r600_resource *)
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r600_aligned_buffer_create(&rscreen->b, PIPE_BIND_CUSTOM,
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PIPE_USAGE_DEFAULT, rtex->surface.dcc_size, rtex->surface.dcc_alignment);
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@ -1371,6 +1374,9 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
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uint32_t reset_value;
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bool clear_words_needed;
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if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR)
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continue;
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vi_get_fast_clear_parameters(fb->cbufs[i]->format, color, &reset_value, &clear_words_needed);
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rctx->clear_buffer(&rctx->b, &tex->dcc_buffer->b.b,
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