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radeonsi: move si_draw_rectangle into si_state_draw.c 

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-10-05 01:48:51 +02:00
parent de810f8b84
commit 387590accb
4 changed files with 85 additions and 88 deletions
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83
src/gallium/drivers/radeon/r600_pipe_common.c
View File

@ -202,89 +202,6 @@ void si_gfx_wait_fence(struct r600_common_context *ctx,
radeon_emit(cs, 4); /* poll interval */
}
void si_draw_rectangle(struct blitter_context *blitter,
int x1, int y1, int x2, int y2,
float depth, unsigned num_instances,
enum blitter_attrib_type type,
const union blitter_attrib *attrib)
{
struct r600_common_context *rctx =
(struct r600_common_context*)util_blitter_get_pipe(blitter);
struct pipe_viewport_state viewport;
struct pipe_resource *buf = NULL;
unsigned offset = 0;
float *vb;
/* Some operations (like color resolve on r6xx) don't work
* with the conventional primitive types.
* One that works is PT_RECTLIST, which we use here. */
/* setup viewport */
viewport.scale[0] = 1.0f;
viewport.scale[1] = 1.0f;
viewport.scale[2] = 1.0f;
viewport.translate[0] = 0.0f;
viewport.translate[1] = 0.0f;
viewport.translate[2] = 0.0f;
rctx->b.set_viewport_states(&rctx->b, 0, 1, &viewport);
/* Upload vertices. The hw rectangle has only 3 vertices,
* The 4th one is derived from the first 3.
* The vertex specification should match u_blitter's vertex element state. */
u_upload_alloc(rctx->b.stream_uploader, 0, sizeof(float) * 24,
rctx->screen->info.tcc_cache_line_size,
&offset, &buf, (void**)&vb);
if (!buf)
return;
vb[0] = x1;
vb[1] = y1;
vb[2] = depth;
vb[3] = 1;
vb[8] = x1;
vb[9] = y2;
vb[10] = depth;
vb[11] = 1;
vb[16] = x2;
vb[17] = y1;
vb[18] = depth;
vb[19] = 1;
switch (type) {
case UTIL_BLITTER_ATTRIB_COLOR:
memcpy(vb+4, attrib->color, sizeof(float)*4);
memcpy(vb+12, attrib->color, sizeof(float)*4);
memcpy(vb+20, attrib->color, sizeof(float)*4);
break;
case UTIL_BLITTER_ATTRIB_TEXCOORD_XYZW:
case UTIL_BLITTER_ATTRIB_TEXCOORD_XY:
vb[6] = vb[14] = vb[22] = attrib->texcoord.z;
vb[7] = vb[15] = vb[23] = attrib->texcoord.w;
/* fall through */
vb[4] = attrib->texcoord.x1;
vb[5] = attrib->texcoord.y1;
vb[12] = attrib->texcoord.x1;
vb[13] = attrib->texcoord.y2;
vb[20] = attrib->texcoord.x2;
vb[21] = attrib->texcoord.y1;
break;
default:; /* Nothing to do. */
}
/* draw */
struct pipe_vertex_buffer vbuffer = {};
vbuffer.buffer.resource = buf;
vbuffer.stride = 2 * 4 * sizeof(float); /* vertex size */
vbuffer.buffer_offset = offset;
rctx->b.set_vertex_buffers(&rctx->b, blitter->vb_slot, 1, &vbuffer);
util_draw_arrays_instanced(&rctx->b, R600_PRIM_RECTANGLE_LIST, 0, 3,
0, num_instances);
pipe_resource_reference(&buf, NULL);
}
static void r600_dma_emit_wait_idle(struct r600_common_context *rctx)
{
struct radeon_winsys_cs *cs = rctx->dma.cs;

5
src/gallium/drivers/radeon/r600_pipe_common.h
View File

@ -736,11 +736,6 @@ void si_gfx_write_event_eop(struct r600_common_context *ctx,
unsigned si_gfx_write_fence_dwords(struct r600_common_screen *screen);
void si_gfx_wait_fence(struct r600_common_context *ctx,
uint64_t va, uint32_t ref, uint32_t mask);
void si_draw_rectangle(struct blitter_context *blitter,
int x1, int y1, int x2, int y2,
float depth, unsigned num_instances,
enum blitter_attrib_type type,
const union blitter_attrib *attrib);
bool si_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws);
void si_destroy_common_screen(struct r600_common_screen *rscreen);

5
src/gallium/drivers/radeonsi/si_state.h
View File

@ -407,6 +407,11 @@ void si_get_active_slot_masks(const struct tgsi_shader_info *info,
void si_init_ia_multi_vgt_param_table(struct si_context *sctx);
void si_emit_cache_flush(struct si_context *sctx);
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
void si_draw_rectangle(struct blitter_context *blitter,
int x1, int y1, int x2, int y2,
float depth, unsigned num_instances,
enum blitter_attrib_type type,
const union blitter_attrib *attrib);
void si_trace_emit(struct si_context *sctx);

80
src/gallium/drivers/radeonsi/si_state_draw.c
View File

@ -29,6 +29,7 @@
#include "sid.h"
#include "gfx9d.h"
#include "util/u_draw.h"
#include "util/u_index_modify.h"
#include "util/u_log.h"
#include "util/u_upload_mgr.h"
@ -1490,6 +1491,85 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
pipe_resource_reference(&indexbuf, NULL);
}
void si_draw_rectangle(struct blitter_context *blitter,
int x1, int y1, int x2, int y2,
float depth, unsigned num_instances,
enum blitter_attrib_type type,
const union blitter_attrib *attrib)
{
struct pipe_context *pipe = util_blitter_get_pipe(blitter);
struct si_context *sctx = (struct si_context*)pipe;
struct pipe_viewport_state viewport;
struct pipe_resource *buf = NULL;
unsigned offset = 0;
float *vb;
/* setup viewport */
viewport.scale[0] = 1.0f;
viewport.scale[1] = 1.0f;
viewport.scale[2] = 1.0f;
viewport.translate[0] = 0.0f;
viewport.translate[1] = 0.0f;
viewport.translate[2] = 0.0f;
pipe->set_viewport_states(pipe, 0, 1, &viewport);
/* Upload vertices. The hw rectangle has only 3 vertices,
* The 4th one is derived from the first 3.
* The vertex specification should match u_blitter's vertex element state. */
u_upload_alloc(pipe->stream_uploader, 0, sizeof(float) * 24,
sctx->screen->b.info.tcc_cache_line_size,
&offset, &buf, (void**)&vb);
if (!buf)
return;
vb[0] = x1;
vb[1] = y1;
vb[2] = depth;
vb[3] = 1;
vb[8] = x1;
vb[9] = y2;
vb[10] = depth;
vb[11] = 1;
vb[16] = x2;
vb[17] = y1;
vb[18] = depth;
vb[19] = 1;
switch (type) {
case UTIL_BLITTER_ATTRIB_COLOR:
memcpy(vb+4, attrib->color, sizeof(float)*4);
memcpy(vb+12, attrib->color, sizeof(float)*4);
memcpy(vb+20, attrib->color, sizeof(float)*4);
break;
case UTIL_BLITTER_ATTRIB_TEXCOORD_XYZW:
case UTIL_BLITTER_ATTRIB_TEXCOORD_XY:
vb[6] = vb[14] = vb[22] = attrib->texcoord.z;
vb[7] = vb[15] = vb[23] = attrib->texcoord.w;
/* fall through */
vb[4] = attrib->texcoord.x1;
vb[5] = attrib->texcoord.y1;
vb[12] = attrib->texcoord.x1;
vb[13] = attrib->texcoord.y2;
vb[20] = attrib->texcoord.x2;
vb[21] = attrib->texcoord.y1;
break;
default:; /* Nothing to do. */
}
/* draw */
struct pipe_vertex_buffer vbuffer = {};
vbuffer.buffer.resource = buf;
vbuffer.stride = 2 * 4 * sizeof(float); /* vertex size */
vbuffer.buffer_offset = offset;
pipe->set_vertex_buffers(pipe, blitter->vb_slot, 1, &vbuffer);
util_draw_arrays_instanced(pipe, R600_PRIM_RECTANGLE_LIST, 0, 3,
0, num_instances);
pipe_resource_reference(&buf, NULL);
}
void si_trace_emit(struct si_context *sctx)
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;