From 3825c7202b52e1fa2718f4e9ec8a941cc6f49ad1 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 18 May 2022 10:32:48 +0200 Subject: [PATCH] radv: constify radv_pipeline in more radv_pipeline_generate_XXX() helpers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These functions should only emit registers and not change the pipeline. Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/vulkan/radv_pipeline.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 770f9724b3c..b9450713a4a 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -6273,7 +6273,7 @@ radv_compute_db_shader_control(const struct radv_device *device, static void radv_pipeline_generate_fragment_shader(struct radeon_cmdbuf *ctx_cs, struct radeon_cmdbuf *cs, - struct radv_pipeline *pipeline) + const struct radv_pipeline *pipeline) { struct radv_shader *ps; bool param_gen; @@ -6437,7 +6437,7 @@ radv_pipeline_generate_cliprect_rule(struct radeon_cmdbuf *ctx_cs, } static void -gfx10_pipeline_generate_ge_cntl(struct radeon_cmdbuf *ctx_cs, struct radv_pipeline *pipeline) +gfx10_pipeline_generate_ge_cntl(struct radeon_cmdbuf *ctx_cs, const struct radv_pipeline *pipeline) { bool break_wave_at_eoi = false; unsigned primgroup_size;