freedreno/ir3: remove bogus tg4 -> tex lowering pass
It can't be done. This just provides bad results. The blob had a comparable approach where they fixed up coordinates, but that also can't work with a separate texture definition with nearest filtering. By then, might as well provide a unswizzled variant instead, and using native functionality. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14670>
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@ -297,8 +297,6 @@ ir3_finalize_nir(struct ir3_compiler *compiler, nir_shader *s)
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OPT_V(s, nir_lower_tex, &tex_options);
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OPT_V(s, nir_lower_load_const_to_scalar);
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if (compiler->gen < 5)
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OPT_V(s, ir3_nir_lower_tg4_to_tex);
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ir3_optimize_loop(compiler, s);
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@ -35,7 +35,6 @@
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bool ir3_nir_apply_trig_workarounds(nir_shader *shader);
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bool ir3_nir_lower_imul(nir_shader *shader);
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bool ir3_nir_lower_tg4_to_tex(nir_shader *shader);
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bool ir3_nir_lower_io_offsets(nir_shader *shader);
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bool ir3_nir_lower_load_barycentric_at_sample(nir_shader *shader);
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bool ir3_nir_lower_load_barycentric_at_offset(nir_shader *shader);
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@ -1,99 +0,0 @@
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/*
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* Copyright © 2017 Ilia Mirkin
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "compiler/nir/nir_builder.h"
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#include "ir3_nir.h"
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/* A4XX has a broken GATHER4 operation. It performs the texture swizzle on the
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* gather results, rather than before. As a result, it must be emulated with
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* direct texture calls.
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*/
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static nir_ssa_def *
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ir3_nir_lower_tg4_to_tex_instr(nir_builder *b, nir_instr *instr, void *data)
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{
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nir_tex_instr *tg4 = nir_instr_as_tex(instr);
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static const int offsets[3][2] = {{0, 1}, {1, 1}, {1, 0}};
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nir_ssa_def *results[4];
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int offset_index = nir_tex_instr_src_index(tg4, nir_tex_src_offset);
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for (int i = 0; i < 4; i++) {
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int num_srcs = tg4->num_srcs + 1 /* lod */;
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if (offset_index < 0 && i < 3)
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num_srcs++;
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nir_tex_instr *tex = nir_tex_instr_create(b->shader, num_srcs);
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tex->op = nir_texop_txl;
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tex->sampler_dim = tg4->sampler_dim;
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tex->coord_components = tg4->coord_components;
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tex->is_array = tg4->is_array;
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tex->is_shadow = tg4->is_shadow;
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tex->is_new_style_shadow = tg4->is_new_style_shadow;
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tex->texture_index = tg4->texture_index;
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tex->sampler_index = tg4->sampler_index;
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tex->dest_type = tg4->dest_type;
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for (int j = 0; j < tg4->num_srcs; j++) {
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nir_src_copy(&tex->src[j].src, &tg4->src[j].src);
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tex->src[j].src_type = tg4->src[j].src_type;
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}
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if (i != 3) {
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nir_ssa_def *offset = nir_vec2(b, nir_imm_int(b, offsets[i][0]),
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nir_imm_int(b, offsets[i][1]));
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if (offset_index < 0) {
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tex->src[tg4->num_srcs].src = nir_src_for_ssa(offset);
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tex->src[tg4->num_srcs].src_type = nir_tex_src_offset;
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} else {
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assert(nir_tex_instr_src_size(tex, offset_index) == 2);
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nir_ssa_def *orig =
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nir_ssa_for_src(b, tex->src[offset_index].src, 2);
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tex->src[offset_index].src =
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nir_src_for_ssa(nir_iadd(b, orig, offset));
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}
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}
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tex->src[num_srcs - 1].src = nir_src_for_ssa(nir_imm_float(b, 0));
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tex->src[num_srcs - 1].src_type = nir_tex_src_lod;
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nir_ssa_dest_init(&tex->instr, &tex->dest, nir_tex_instr_dest_size(tex),
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32, NULL);
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nir_builder_instr_insert(b, &tex->instr);
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results[i] = nir_channel(b, &tex->dest.ssa, tg4->component);
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}
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return nir_vec(b, results, 4);
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}
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static bool
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ir3_nir_lower_tg4_to_tex_filter(const nir_instr *instr, const void *data)
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{
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return (instr->type == nir_instr_type_tex &&
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nir_instr_as_tex(instr)->op == nir_texop_tg4);
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}
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bool
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ir3_nir_lower_tg4_to_tex(nir_shader *shader)
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{
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return nir_shader_lower_instructions(shader, ir3_nir_lower_tg4_to_tex_filter,
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ir3_nir_lower_tg4_to_tex_instr, NULL);
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}
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@ -100,7 +100,6 @@ libfreedreno_ir3_files = files(
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'ir3_nir_lower_io_offsets.c',
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'ir3_nir_lower_tess.c',
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'ir3_nir_lower_tex_prefetch.c',
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'ir3_nir_lower_tg4_to_tex.c',
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'ir3_nir_lower_wide_load_store.c',
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'ir3_nir_move_varying_inputs.c',
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'ir3_postsched.c',
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