intel/compiler: Add code for compiling CL-style SPIR-V kernels
v2: simplify INTEL_DEBUG expressions (Marcin) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13171>
This commit is contained in:
Jason Ekstrand
Marge Bot
parent
8c11912582
commit
346a7f14fb
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@ -25,6 +25,7 @@
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#define BRW_COMPILER_H
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#include <stdio.h>
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#include "c11/threads.h"
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#include "dev/intel_device_info.h"
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#include "main/config.h"
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#include "util/ralloc.h"
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@ -45,6 +46,11 @@ typedef struct nir_shader nir_shader;
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struct brw_compiler {
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const struct intel_device_info *devinfo;
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/* This lock must be taken if the compiler is to be modified in any way,
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* including adding something to the ralloc child list.
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*/
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mtx_t mutex;
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struct {
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struct ra_regs *regs;
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@ -109,6 +115,8 @@ struct brw_compiler {
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* constant or data cache, UBOs must use VK_FORMAT_RAW.
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*/
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bool indirect_ubos_use_sampler;
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struct nir_shader *clc_shader;
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};
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#define brw_shader_debug_log(compiler, data, fmt, ... ) do { \
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@ -0,0 +1,362 @@
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/*
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* Copyright © 2020 Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_kernel.h"
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#include "brw_nir.h"
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#include "compiler/nir/nir_builder.h"
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#include "compiler/spirv/nir_spirv.h"
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#include "dev/intel_debug.h"
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#include "util/u_atomic.h"
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static const nir_shader *
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load_clc_shader(struct brw_compiler *compiler, struct disk_cache *disk_cache,
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const nir_shader_compiler_options *nir_options,
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const struct spirv_to_nir_options *spirv_options)
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{
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if (compiler->clc_shader)
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return compiler->clc_shader;
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nir_shader *nir = nir_load_libclc_shader(64, disk_cache,
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spirv_options, nir_options);
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if (nir == NULL)
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return NULL;
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const nir_shader *old_nir =
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p_atomic_cmpxchg(&compiler->clc_shader, NULL, nir);
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if (old_nir == NULL) {
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/* We won the race */
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return nir;
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} else {
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/* Someone else built the shader first */
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ralloc_free(nir);
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return old_nir;
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}
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}
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static void
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builder_init_new_impl(nir_builder *b, nir_function *func)
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{
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nir_function_impl *impl = nir_function_impl_create(func);
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nir_builder_init(b, impl);
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b->cursor = nir_before_cf_list(&impl->body);
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}
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static bool
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lower_kernel_intrinsics(nir_shader *nir)
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{
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nir_function_impl *impl = nir_shader_get_entrypoint(nir);
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bool progress = false;
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unsigned kernel_sysvals_start = 0;
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unsigned kernel_arg_start = sizeof(struct brw_kernel_sysvals);
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nir->num_uniforms += kernel_arg_start;
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nir_builder b;
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nir_builder_init(&b, impl);
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_kernel_input: {
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b.cursor = nir_instr_remove(&intrin->instr);
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nir_intrinsic_instr *load =
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nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
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load->num_components = intrin->num_components;
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load->src[0] = nir_src_for_ssa(nir_u2u32(&b, intrin->src[0].ssa));
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nir_intrinsic_set_base(load, kernel_arg_start);
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nir_intrinsic_set_range(load, nir->num_uniforms);
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nir_ssa_dest_init(&load->instr, &load->dest,
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intrin->dest.ssa.num_components,
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intrin->dest.ssa.bit_size, NULL);
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nir_builder_instr_insert(&b, &load->instr);
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, &load->dest.ssa);
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progress = true;
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break;
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}
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case nir_intrinsic_load_constant_base_ptr: {
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b.cursor = nir_instr_remove(&intrin->instr);
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nir_ssa_def *const_data_base_addr = nir_pack_64_2x32_split(&b,
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nir_load_reloc_const_intel(&b, BRW_SHADER_RELOC_CONST_DATA_ADDR_LOW),
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nir_load_reloc_const_intel(&b, BRW_SHADER_RELOC_CONST_DATA_ADDR_HIGH));
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, const_data_base_addr);
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progress = true;
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break;
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}
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case nir_intrinsic_load_num_workgroups: {
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b.cursor = nir_instr_remove(&intrin->instr);
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nir_intrinsic_instr *load =
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nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
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load->num_components = 3;
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load->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0));
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nir_intrinsic_set_base(load, kernel_sysvals_start +
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offsetof(struct brw_kernel_sysvals, num_work_groups));
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nir_intrinsic_set_range(load, 3 * 4);
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nir_ssa_dest_init(&load->instr, &load->dest, 3, 32, NULL);
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nir_builder_instr_insert(&b, &load->instr);
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/* We may need to do a bit-size cast here */
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nir_ssa_def *num_work_groups =
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nir_u2u(&b, &load->dest.ssa, intrin->dest.ssa.bit_size);
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, num_work_groups);
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progress = true;
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break;
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}
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default:
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break;
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}
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}
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}
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if (progress) {
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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} else {
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nir_metadata_preserve(impl, nir_metadata_all);
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}
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return progress;
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}
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bool
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brw_kernel_from_spirv(struct brw_compiler *compiler,
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struct disk_cache *disk_cache,
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struct brw_kernel *kernel,
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void *log_data, void *mem_ctx,
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const uint32_t *spirv, size_t spirv_size,
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const char *entrypoint_name,
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char **error_str)
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{
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const struct intel_device_info *devinfo = compiler->devinfo;
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const nir_shader_compiler_options *nir_options =
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compiler->nir_options[MESA_SHADER_KERNEL];
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struct spirv_to_nir_options spirv_options = {
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.environment = NIR_SPIRV_OPENCL,
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.caps = {
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.address = true,
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.float16 = devinfo->ver >= 8,
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.float64 = devinfo->ver >= 8,
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.image_write_without_format = true,
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.int8 = devinfo->ver >= 8,
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.int16 = devinfo->ver >= 8,
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.int64 = devinfo->ver >= 8,
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.int64_atomics = devinfo->ver >= 9,
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.kernel = true,
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.float_controls = devinfo->ver >= 8,
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.generic_pointers = true,
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.storage_8bit = devinfo->ver >= 8,
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.storage_16bit = devinfo->ver >= 8,
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.subgroup_arithmetic = true,
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.subgroup_basic = true,
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.subgroup_ballot = true,
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.subgroup_dispatch = true,
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.subgroup_quad = true,
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.subgroup_shuffle = true,
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.subgroup_vote = true,
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.intel_subgroup_shuffle = true,
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.intel_subgroup_buffer_block_io = true,
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},
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.shared_addr_format = nir_address_format_62bit_generic,
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.global_addr_format = nir_address_format_62bit_generic,
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.temp_addr_format = nir_address_format_62bit_generic,
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.constant_addr_format = nir_address_format_64bit_global,
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};
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spirv_options.clc_shader = load_clc_shader(compiler, disk_cache,
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nir_options, &spirv_options);
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assert(spirv_size % 4 == 0);
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nir_shader *nir =
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spirv_to_nir(spirv, spirv_size / 4, NULL, 0, MESA_SHADER_KERNEL,
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entrypoint_name, &spirv_options, nir_options);
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nir_validate_shader(nir, "after spirv_to_nir");
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nir_validate_ssa_dominance(nir, "after spirv_to_nir");
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ralloc_steal(mem_ctx, nir);
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nir->info.name = ralloc_strdup(nir, entrypoint_name);
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if (INTEL_DEBUG(DEBUG_CS)) {
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/* Re-index SSA defs so we print more sensible numbers. */
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nir_foreach_function(function, nir) {
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if (function->impl)
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nir_index_ssa_defs(function->impl);
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}
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fprintf(stderr, "NIR (from SPIR-V) for kernel\n");
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nir_print_shader(nir, stderr);
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}
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NIR_PASS_V(nir, nir_lower_libclc, spirv_options.clc_shader);
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/* We have to lower away local constant initializers right before we
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* inline functions. That way they get properly initialized at the top
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* of the function and not at the top of its caller.
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*/
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NIR_PASS_V(nir, nir_lower_variable_initializers, nir_var_function_temp);
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NIR_PASS_V(nir, nir_lower_returns);
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NIR_PASS_V(nir, nir_inline_functions);
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NIR_PASS_V(nir, nir_copy_prop);
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NIR_PASS_V(nir, nir_opt_deref);
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/* Pick off the single entrypoint that we want */
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foreach_list_typed_safe(nir_function, func, node, &nir->functions) {
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if (!func->is_entrypoint)
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exec_node_remove(&func->node);
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}
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assert(exec_list_length(&nir->functions) == 1);
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/* Now that we've deleted all but the main function, we can go ahead and
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* lower the rest of the constant initializers. We do this here so that
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* nir_remove_dead_variables and split_per_member_structs below see the
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* corresponding stores.
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*/
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NIR_PASS_V(nir, nir_lower_variable_initializers, ~0);
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/* LLVM loves take advantage of the fact that vec3s in OpenCL are 16B
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* aligned and so it can just read/write them as vec4s. This results in a
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* LOT of vec4->vec3 casts on loads and stores. One solution to this
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* problem is to get rid of all vec3 variables.
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*/
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NIR_PASS_V(nir, nir_lower_vec3_to_vec4,
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nir_var_shader_temp | nir_var_function_temp |
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nir_var_mem_shared | nir_var_mem_global|
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nir_var_mem_constant);
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/* We assign explicit types early so that the optimizer can take advantage
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* of that information and hopefully get rid of some of our memcpys.
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*/
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NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
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nir_var_uniform |
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nir_var_shader_temp | nir_var_function_temp |
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nir_var_mem_shared | nir_var_mem_global,
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glsl_get_cl_type_size_align);
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brw_preprocess_nir(compiler, nir, NULL);
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int max_arg_idx = -1;
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nir_foreach_uniform_variable(var, nir) {
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assert(var->data.location < 256);
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max_arg_idx = MAX2(max_arg_idx, var->data.location);
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}
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kernel->args_size = nir->num_uniforms;
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kernel->arg_count = max_arg_idx + 1;
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/* No bindings */
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struct brw_kernel_arg_desc *args =
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rzalloc_array(mem_ctx, struct brw_kernel_arg_desc, kernel->arg_count);
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nir_foreach_uniform_variable(var, nir) {
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struct brw_kernel_arg_desc arg_desc = {
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.offset = var->data.driver_location,
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.size = glsl_get_explicit_size(var->type, false),
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};
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assert(arg_desc.offset + arg_desc.size <= nir->num_uniforms);
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assert(var->data.location >= 0);
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args[var->data.location] = arg_desc;
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}
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NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_all, NULL);
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/* Lower again, this time after dead-variables to get more compact variable
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* layouts.
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*/
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nir->scratch_size = 0;
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NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
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nir_var_shader_temp | nir_var_function_temp |
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nir_var_mem_shared | nir_var_mem_global | nir_var_mem_constant,
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glsl_get_cl_type_size_align);
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if (nir->constant_data_size > 0) {
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assert(nir->constant_data == NULL);
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nir->constant_data = rzalloc_size(nir, nir->constant_data_size);
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nir_gather_explicit_io_initializers(nir, nir->constant_data,
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nir->constant_data_size,
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nir_var_mem_constant);
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}
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if (INTEL_DEBUG(DEBUG_CS)) {
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/* Re-index SSA defs so we print more sensible numbers. */
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nir_foreach_function(function, nir) {
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if (function->impl)
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nir_index_ssa_defs(function->impl);
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}
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fprintf(stderr, "NIR (before I/O lowering) for kernel\n");
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nir_print_shader(nir, stderr);
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}
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NIR_PASS_V(nir, nir_lower_memcpy);
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NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_constant,
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nir_address_format_64bit_global);
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NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_uniform,
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nir_address_format_32bit_offset_as_64bit);
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NIR_PASS_V(nir, nir_lower_explicit_io,
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nir_var_shader_temp | nir_var_function_temp |
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nir_var_mem_shared | nir_var_mem_global,
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nir_address_format_62bit_generic);
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NIR_PASS_V(nir, nir_lower_frexp);
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NIR_PASS_V(nir, nir_lower_convert_alu_types, NULL);
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NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics);
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NIR_PASS_V(nir, lower_kernel_intrinsics);
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struct brw_cs_prog_key key = {
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.base.subgroup_size_type = BRW_SUBGROUP_SIZE_VARYING,
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};
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memset(&kernel->prog_data, 0, sizeof(kernel->prog_data));
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kernel->prog_data.base.nr_params = DIV_ROUND_UP(nir->num_uniforms, 4);
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struct brw_compile_cs_params params = {
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.nir = nir,
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.key = &key,
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.prog_data = &kernel->prog_data,
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.stats = &kernel->stats,
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.log_data = log_data,
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};
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kernel->code = brw_compile_cs(compiler, mem_ctx, ¶ms);
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if (error_str)
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*error_str = params.error_str;
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return kernel->code != NULL;
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}
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@ -0,0 +1,74 @@
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/*
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* Copyright © 2020 Corporation
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*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
||||
* IN THE SOFTWARE.
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*/
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#ifndef BRW_KERNEL_H
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#define BRW_KERNEL_H
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|
||||
#include "brw_compiler.h"
|
||||
|
||||
struct disk_cache;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** Software interface for system values in kernels
|
||||
*
|
||||
* These are intended to go at the start of the kernel argument buffer.
|
||||
*/
|
||||
struct brw_kernel_sysvals {
|
||||
uint32_t num_work_groups[3];
|
||||
uint32_t pad[5];
|
||||
};
|
||||
|
||||
struct brw_kernel_arg_desc {
|
||||
uint16_t offset;
|
||||
uint16_t size;
|
||||
};
|
||||
|
||||
struct brw_kernel {
|
||||
struct brw_cs_prog_data prog_data;
|
||||
|
||||
struct brw_compile_stats stats;
|
||||
|
||||
uint16_t args_size;
|
||||
uint16_t arg_count;
|
||||
const struct brw_kernel_arg_desc *args;
|
||||
|
||||
const void *code;
|
||||
};
|
||||
|
||||
bool
|
||||
brw_kernel_from_spirv(struct brw_compiler *compiler,
|
||||
struct disk_cache *disk_cache,
|
||||
struct brw_kernel *kernel,
|
||||
void *log_data, void *mem_ctx,
|
||||
const uint32_t *spirv, size_t spirv_size,
|
||||
const char *entrypoint_name,
|
||||
char **error_str);
|
||||
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
|
||||
#endif /* BRW_KERNEL_H */
|
||||
|
|
@ -76,6 +76,7 @@ libintel_compiler_files = files(
|
|||
'brw_ir_performance.h',
|
||||
'brw_ir_performance.cpp',
|
||||
'brw_ir_vec4.h',
|
||||
'brw_kernel.c',
|
||||
'brw_mesh.cpp',
|
||||
'brw_nir.h',
|
||||
'brw_nir.c',
|
||||
|
|
|
|||
Loading…
Reference in New Issue