r600g: Add ar_chan member to struct r600_bytecode
r600_bytecode::ar_chan stores the register channel for the value that will be loaded into the AR register. At the moment, this field is only used by the LLVM backend. The default backend always sets ar_chan = 0.
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@ -1421,6 +1421,7 @@ static int load_ar_r6xx(struct r600_bytecode *bc)
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memset(&alu, 0, sizeof(alu));
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alu.inst = V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_GPR_INT;
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alu.src[0].sel = bc->ar_reg;
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alu.src[0].chan = bc->ar_chan;
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alu.last = 1;
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alu.index_mode = INDEX_MODE_LOOP;
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r = r600_bytecode_add_alu(bc, &alu);
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@ -1451,6 +1452,7 @@ static int load_ar(struct r600_bytecode *bc)
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memset(&alu, 0, sizeof(alu));
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alu.inst = BC_INST(bc, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT);
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alu.src[0].sel = bc->ar_reg;
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alu.src[0].chan = bc->ar_chan;
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alu.last = 1;
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r = r600_bytecode_add_alu(bc, &alu);
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if (r)
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@ -213,6 +213,7 @@ struct r600_bytecode {
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struct r600_cf_callstack callstack[SQ_MAX_CALL_DEPTH];
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unsigned ar_loaded;
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unsigned ar_reg;
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unsigned ar_chan;
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unsigned ar_handling;
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unsigned r6xx_nop_after_rel_dst;
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};
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@ -377,6 +377,7 @@ static unsigned r600_alu_from_byte_stream(struct r600_shader_ctx *ctx,
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if (alu.inst == CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MOVA_INT)) {
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ctx->bc->ar_reg = alu.src[0].sel;
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ctx->bc->ar_chan = alu.src[0].chan;
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ctx->bc->ar_loaded = 0;
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return bytes_read;
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}
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