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nir/spirv: fix wrong writemask for ALU operations

This commit is contained in:
Connor Abbott 2015-07-09 14:28:39 -04:00
parent b8fedc19f5
commit 3318a86d12
1 changed files with 1 additions and 0 deletions
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src/glsl/nir/spirv_to_nir.c
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@ -1840,6 +1840,7 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
nir_alu_instr *instr = nir_alu_instr_create(b->shader, op);
nir_ssa_dest_init(&instr->instr, &instr->dest.dest,
glsl_get_vector_elements(type), val->name);
instr->dest.write_mask = (1 << glsl_get_vector_elements(type)) - 1;
val->ssa->def = &instr->dest.dest.ssa;
for (unsigned i = 0; i < nir_op_infos[op].num_inputs; i++)