i915g: Fix bugs in the shader optimizer.
This commit is contained in:
Stéphane Marchesin
parent
5840ec2d41
commit
3235435e80
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@ -66,6 +66,8 @@ static boolean has_destination(unsigned opcode)
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{
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return (opcode != TGSI_OPCODE_NOP &&
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opcode != TGSI_OPCODE_KIL &&
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opcode != TGSI_OPCODE_KILP &&
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opcode != TGSI_OPCODE_END &&
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opcode != TGSI_OPCODE_RET);
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}
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@ -130,91 +132,6 @@ static void set_neutral_element_swizzle(struct i915_full_src_register* r,
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r->Register.SwizzleW = TGSI_SWIZZLE_W;
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}
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/*
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* Optimize away things like:
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* MUL OUT[0].xyz, TEMP[1], TEMP[2]
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* MOV OUT[0].w, TEMP[2]
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* into:
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* MUL OUT[0].xyzw, TEMP[1].xyz1, TEMP[2]
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* This is useful for optimizing texenv.
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*/
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static void i915_fpc_optimize_mov_after_alu(union i915_full_token* current, union i915_full_token* next)
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{
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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op_commutes(current->FullInstruction.Instruction.Opcode) &&
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current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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same_dst_reg(&next->FullInstruction.Dst[0], ¤t->FullInstruction.Dst[0]) &&
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same_src_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Src[1]) &&
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is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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set_neutral_element_swizzle(¤t->FullInstruction.Src[1], 0, 0);
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set_neutral_element_swizzle(¤t->FullInstruction.Src[0],
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next->FullInstruction.Dst[0].Register.WriteMask,
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op_neutral_element(current->FullInstruction.Instruction.Opcode));
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current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
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next->FullInstruction.Dst[0].Register.WriteMask;
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return;
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}
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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op_commutes(current->FullInstruction.Instruction.Opcode) &&
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current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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same_dst_reg(&next->FullInstruction.Dst[0], ¤t->FullInstruction.Dst[0]) &&
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same_src_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Src[0]) &&
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is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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set_neutral_element_swizzle(¤t->FullInstruction.Src[0], 0, 0);
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set_neutral_element_swizzle(¤t->FullInstruction.Src[1],
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next->FullInstruction.Dst[0].Register.WriteMask,
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op_neutral_element(current->FullInstruction.Instruction.Opcode));
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current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
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next->FullInstruction.Dst[0].Register.WriteMask;
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return;
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}
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}
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/*
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* Optimize away things like:
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* *** TEMP[0], TEMP[1], TEMP[2]
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* MOV OUT[0] TEMP[0]
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* into:
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* *** OUT[0], TEMP[1], TEMP[2]
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*/
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static void i915_fpc_optimize_useless_mov(union i915_full_token* current, union i915_full_token* next)
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{
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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has_destination(current->FullInstruction.Instruction.Opcode) &&
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next->FullInstruction.Instruction.Saturate == TGSI_SAT_NONE &&
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next->FullInstruction.Src[0].Register.Absolute == 0 &&
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next->FullInstruction.Src[0].Register.Negate == 0 &&
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next->FullInstruction.Dst[0].Register.File == TGSI_FILE_OUTPUT &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) &&
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current->FullInstruction.Dst[0].Register.WriteMask == next->FullInstruction.Dst[0].Register.WriteMask &&
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same_src_dst_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Dst[0]) )
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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current->FullInstruction.Dst[0] = next->FullInstruction.Dst[0];
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return;
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}
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}
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static void copy_src_reg(struct i915_src_register* o, const struct tgsi_src_register* i)
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{
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o->File = i->File;
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@ -259,6 +176,117 @@ static void copy_token(union i915_full_token* o, union tgsi_full_token* i)
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}
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/*
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* Optimize away things like:
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* MUL OUT[0].xyz, TEMP[1], TEMP[2]
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* MOV OUT[0].w, TEMP[2]
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* into:
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* MUL OUT[0].xyzw, TEMP[1].xyz1, TEMP[2]
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* This is useful for optimizing texenv.
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*/
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static void i915_fpc_optimize_mov_after_alu(union i915_full_token* current, union i915_full_token* next)
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{
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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op_commutes(current->FullInstruction.Instruction.Opcode) &&
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current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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same_dst_reg(&next->FullInstruction.Dst[0], ¤t->FullInstruction.Dst[0]) &&
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same_src_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Src[1]) &&
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!same_src_dst_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Dst[0]) &&
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is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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set_neutral_element_swizzle(¤t->FullInstruction.Src[1], 0, 0);
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set_neutral_element_swizzle(¤t->FullInstruction.Src[0],
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next->FullInstruction.Dst[0].Register.WriteMask,
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op_neutral_element(current->FullInstruction.Instruction.Opcode));
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current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
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next->FullInstruction.Dst[0].Register.WriteMask;
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return;
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}
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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op_commutes(current->FullInstruction.Instruction.Opcode) &&
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current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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same_dst_reg(&next->FullInstruction.Dst[0], ¤t->FullInstruction.Dst[0]) &&
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same_src_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Src[0]) &&
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!same_src_dst_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Dst[0]) &&
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is_unswizzled(¤t->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(¤t->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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set_neutral_element_swizzle(¤t->FullInstruction.Src[0], 0, 0);
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set_neutral_element_swizzle(¤t->FullInstruction.Src[1],
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next->FullInstruction.Dst[0].Register.WriteMask,
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op_neutral_element(current->FullInstruction.Instruction.Opcode));
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current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
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next->FullInstruction.Dst[0].Register.WriteMask;
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return;
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}
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}
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/*
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* Optimize away things like:
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* MOV TEMP[0].xyz TEMP[0].xyzx
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* into:
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* NOP
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*/
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static boolean i915_fpc_useless_mov(union tgsi_full_token* tgsi_current)
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{
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union i915_full_token current;
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copy_token(¤t , tgsi_current);
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if ( current.Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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current.FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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has_destination(current.FullInstruction.Instruction.Opcode) &&
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current.FullInstruction.Instruction.Saturate == TGSI_SAT_NONE &&
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current.FullInstruction.Src[0].Register.Absolute == 0 &&
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current.FullInstruction.Src[0].Register.Negate == 0 &&
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is_unswizzled(¤t.FullInstruction.Src[0], current.FullInstruction.Dst[0].Register.WriteMask) &&
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same_src_dst_reg(¤t.FullInstruction.Src[0], ¤t.FullInstruction.Dst[0]) )
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{
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return TRUE;
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}
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return FALSE;
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}
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/*
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* Optimize away things like:
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* *** TEMP[0], TEMP[1], TEMP[2]
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* MOV OUT[0] TEMP[0]
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* into:
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* *** OUT[0], TEMP[1], TEMP[2]
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*/
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static void i915_fpc_optimize_useless_mov_after_inst(union i915_full_token* current, union i915_full_token* next)
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{
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if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
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next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
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has_destination(current->FullInstruction.Instruction.Opcode) &&
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next->FullInstruction.Instruction.Saturate == TGSI_SAT_NONE &&
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next->FullInstruction.Src[0].Register.Absolute == 0 &&
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next->FullInstruction.Src[0].Register.Negate == 0 &&
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next->FullInstruction.Dst[0].Register.File == TGSI_FILE_OUTPUT &&
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is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) &&
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current->FullInstruction.Dst[0].Register.WriteMask == next->FullInstruction.Dst[0].Register.WriteMask &&
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same_src_dst_reg(&next->FullInstruction.Src[0], ¤t->FullInstruction.Dst[0]) )
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{
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next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
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current->FullInstruction.Dst[0] = next->FullInstruction.Dst[0];
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return;
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}
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}
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struct i915_token_list* i915_optimize(const struct tgsi_token *tokens)
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{
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struct i915_token_list *out_tokens = MALLOC(sizeof(struct i915_token_list));
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@ -281,10 +309,16 @@ struct i915_token_list* i915_optimize(const struct tgsi_token *tokens)
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tgsi_parse_init( &parse, tokens );
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while( !tgsi_parse_end_of_tokens( &parse ) ) {
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tgsi_parse_token( &parse );
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if (i915_fpc_useless_mov(&parse.FullToken)) {
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out_tokens->NumTokens--;
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continue;
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}
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copy_token(&out_tokens->Tokens[i] , &parse.FullToken);
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if (i > 0) {
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i915_fpc_optimize_useless_mov(&out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
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i915_fpc_optimize_useless_mov_after_inst(&out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
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i915_fpc_optimize_mov_after_alu(&out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
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}
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i++;
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