r600/sfn: replace hand-backed literal check by NIR function
Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6879>
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6784cea646
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31e42fb780
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@ -134,15 +134,6 @@ int EmitInstruction::lookup_register_index(const nir_dest& dst)
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return m_proc.lookup_register_index(dst);
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}
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const nir_load_const_instr*
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EmitInstruction::get_literal_register(const nir_src& src) const
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{
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if (src.is_ssa)
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return m_proc.get_literal_constant(src.ssa->index);
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else
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return nullptr;
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}
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PValue EmitInstruction::get_temp_register(int channel)
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{
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return m_proc.get_temp_register(channel);
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@ -59,8 +59,6 @@ protected:
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PValue from_nir(const nir_alu_dest& v, unsigned component);
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PValue from_nir(const nir_dest& v, unsigned component);
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const nir_load_const_instr* get_literal_register(const nir_src& src) const;
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int lookup_register_index(const nir_src& src) const;
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int lookup_register_index(const nir_dest& dst);
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PValue create_register_from_nir_src(const nir_src& src, unsigned comp);
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@ -682,7 +682,7 @@ bool EmitTexInstruction::emit_tex_tg4(nir_tex_instr* instr, TexInputs& src)
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bool literal_offset = false;
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if (src.offset) {
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literal_offset = src.offset->is_ssa && get_literal_register(*src.offset);
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literal_offset = nir_src_as_const_value(*src.offset) != 0;
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r600::sfn_log << SfnLog::tex << " really have offsets and they are " <<
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(literal_offset ? "literal" : "varying") <<
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"\n";
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@ -976,11 +976,11 @@ void EmitTexInstruction::set_offsets(TexInstruction* ir, nir_src *offset)
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return;
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assert(offset->is_ssa);
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auto literal = get_literal_register(*offset);
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auto literal = nir_src_as_const_value(*offset);
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assert(literal);
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for (int i = 0; i < offset->ssa->num_components; ++i) {
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ir->set_offset(i, literal->value[i].i32);
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ir->set_offset(i, literal[i].i32);
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}
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}
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@ -246,8 +246,8 @@ bool ShaderFromNir::emit_instruction(nir_instr *instr)
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return impl->emit_deref_instruction(nir_instr_as_deref(instr));
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case nir_instr_type_intrinsic:
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return impl->emit_intrinsic_instruction(nir_instr_as_intrinsic(instr));
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case nir_instr_type_load_const:
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return impl->set_literal_constant(nir_instr_as_load_const(instr));
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case nir_instr_type_load_const: /* const values are loaded when needed */
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return true;
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case nir_instr_type_tex:
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return impl->emit_tex_instruction(instr);
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case nir_instr_type_jump:
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@ -291,18 +291,15 @@ bool GeometryShaderFromNir::emit_load_from_array(nir_intrinsic_instr* instr,
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{
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auto dest = vec_from_nir(instr->dest, instr->num_components);
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const nir_load_const_instr* literal_index = nullptr;
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if (array_deref.index->is_ssa)
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literal_index = get_literal_constant(array_deref.index->ssa->index);
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auto literal_index = nir_src_as_const_value(*array_deref.index);
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if (!literal_index) {
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sfn_log << SfnLog::err << "GS: Indirect input addressing not (yet) supported\n";
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return false;
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}
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assert(literal_index->value[0].u32 < 6);
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PValue addr = m_per_vertex_offsets[literal_index->value[0].u32];
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assert(literal_index->u32 < 6);
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PValue addr = m_per_vertex_offsets[literal_index->u32];
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auto fetch = new FetchInstruction(vc_fetch, no_index_offset, dest, addr,
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16 * array_deref.var->data.driver_location,
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R600_GS_RING_CONST_BUFFER, PValue(), bim_none, true);
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@ -113,18 +113,18 @@ PValue ValuePool::from_nir(const nir_src& v, unsigned component, unsigned swizzl
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return reg;
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}
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auto literal_val = m_literal_constants.find(index);
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if (literal_val != m_literal_constants.end()) {
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switch (literal_val->second->def.bit_size) {
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auto literal_val = nir_src_as_const_value(v);
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if (literal_val) {
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assert(v.is_ssa);
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switch (v.ssa->bit_size) {
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case 1:
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return PValue(new LiteralValue(literal_val->second->value[swizzled].b ? 0xffffffff : 0, component));
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return PValue(new LiteralValue(literal_val[swizzled].b ? 0xffffffff : 0, component));
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case 32:
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return literal(literal_val->second->value[swizzled].u32);
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return literal(literal_val[swizzled].u32);
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default:
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sfn_log << SfnLog::reg << "Unsupported bit size " << literal_val->second->def.bit_size
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sfn_log << SfnLog::reg << "Unsupported bit size " << v.ssa->bit_size
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<< " fall back to 32\n";
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return PValue(new LiteralValue(literal_val->second->value[swizzled].u32, component));
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return PValue(new LiteralValue(literal_val[swizzled].u32, component));
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}
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}
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@ -481,38 +481,6 @@ bool ValuePool::create_undef(nir_ssa_undef_instr* instr)
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return true;
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}
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bool ValuePool::set_literal_constant(nir_load_const_instr* instr)
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{
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sfn_log << SfnLog::reg << "Add literal " << instr->def.index << "\n";
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m_literal_constants[instr->def.index] = instr;
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return true;
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}
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const nir_load_const_instr* ValuePool::get_literal_constant(int index)
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{
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sfn_log << SfnLog::reg << "Try to locate literal " << index << "...";
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auto literal = m_literal_constants.find(index);
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if (literal == m_literal_constants.end()) {
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sfn_log << SfnLog::reg << " not found\n";
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return nullptr;
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}
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sfn_log << SfnLog::reg << " found\n";
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return literal->second;
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}
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void ValuePool::add_uniform(unsigned index, const PValue& value)
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{
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sfn_log << SfnLog::reg << "Reserve " << *value << " as " << index << "\n";
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m_uniforms[index] = value;
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}
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PValue ValuePool::uniform(unsigned index)
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{
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sfn_log << SfnLog::reg << "Search index " << index << "\n";
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auto i = m_uniforms.find(index);
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return i == m_uniforms.end() ? PValue() : i->second;
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}
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int ValuePool::allocate_with_mask(unsigned index, unsigned mask, bool pre_alloc)
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{
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int retval;
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@ -159,9 +159,6 @@ public:
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*/
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bool create_undef(nir_ssa_undef_instr* instr);
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bool set_literal_constant(nir_load_const_instr* instr);
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const nir_load_const_instr *get_literal_constant(int index);
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void add_uniform(unsigned index, const PValue &value);
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@ -225,8 +222,6 @@ private:
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std::set<unsigned> m_ssa_undef;
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LiteralBuffer m_literal_constants;
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std::map<unsigned, unsigned> m_local_register_map;
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std::map<unsigned, unsigned> m_ssa_register_map;
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