panfrost: Fixup vertex offsets to prevent shadow copy
Mali attribute buffers have to be 64-byte aligned. However, Gallium enforces no such requirement; for unaligned buffers, we were previously forced to create a shadow copy (slow!). To prevent this, we instead use the offseted buffer's address with the lower bits masked off, and then add those masked off bits to the src_offset. Proof of correctness included, possibly for the opportunity to say "QED" unironically. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig
parent
e008d4f011
commit
31d9caa239
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@ -735,6 +735,15 @@ panfrost_emit_varying_descriptor(
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ctx->payload_tiler.postfix.varyings = varyings_p;
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}
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static mali_ptr
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panfrost_vertex_buffer_address(struct panfrost_context *ctx, unsigned i)
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{
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struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[i];
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struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource);
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return rsrc->bo->gpu + buf->buffer_offset;
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}
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/* Emits attributes and varying descriptors, which should be called every draw,
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* excepting some obscure circumstances */
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@ -754,42 +763,20 @@ panfrost_emit_vertex_data(struct panfrost_context *ctx, struct panfrost_job *job
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struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[i];
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struct panfrost_resource *rsrc = (struct panfrost_resource *) (buf->buffer.resource);
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/* Let's figure out the layout of the attributes in memory so
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* we can be smart about size computation. The idea is to
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* figure out the maximum src_offset, which tells us the latest
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* spot a vertex could start. Meanwhile, we figure out the size
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* of the attribute memory (assuming interleaved
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* representation) and tack on the max src_offset for a
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* reasonably good upper bound on the size.
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*
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* Proving correctness is left as an exercise to the reader.
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*/
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if (!rsrc) continue;
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unsigned max_src_offset = 0;
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/* Align to 64 bytes by masking off the lower bits. This
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* will be adjusted back when we fixup the src_offset in
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* mali_attr_meta */
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for (unsigned j = 0; j < ctx->vertex->num_elements; ++j) {
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if (ctx->vertex->pipe[j].vertex_buffer_index != i) continue;
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max_src_offset = MAX2(max_src_offset, ctx->vertex->pipe[j].src_offset);
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}
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mali_ptr addr = panfrost_vertex_buffer_address(ctx, i) & ~63;
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/* Offset vertex count by draw_start to make sure we upload enough */
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attrs[k].stride = buf->stride;
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attrs[k].size = buf->stride * (ctx->payload_vertex.draw_start + invocation_count) + max_src_offset;
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attrs[k].size = rsrc->base.width0;
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/* Vertex elements are -already- GPU-visible, at
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* rsrc->gpu. However, attribute buffers must be 64 aligned. If
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* it is not, for now we have to duplicate the buffer. */
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mali_ptr effective_address = rsrc ? (rsrc->bo->gpu + buf->buffer_offset) : 0;
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if (effective_address & 63) {
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attrs[k].elements = panfrost_upload_transient(ctx, rsrc->bo->cpu + buf->buffer_offset, attrs[i].size) | MALI_ATTR_LINEAR;
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} else if (effective_address) {
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panfrost_job_add_bo(job, rsrc->bo);
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attrs[k].elements = effective_address | MALI_ATTR_LINEAR;
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} else {
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/* Leave unset? */
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}
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panfrost_job_add_bo(job, rsrc->bo);
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attrs[k].elements = addr | MALI_ATTR_LINEAR;
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++k;
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}
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@ -808,6 +795,53 @@ panfrost_writes_point_size(struct panfrost_context *ctx)
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return vs->writes_point_size && ctx->payload_tiler.prefix.draw_mode == MALI_POINTS;
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}
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/* Stage the attribute descriptors so we can adjust src_offset
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* to let BOs align nicely */
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static void
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panfrost_stage_attributes(struct panfrost_context *ctx)
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{
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struct panfrost_vertex_state *so = ctx->vertex;
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size_t sz = sizeof(struct mali_attr_meta) * so->num_elements;
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struct panfrost_transfer transfer = panfrost_allocate_transient(ctx, sz);
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struct mali_attr_meta *target = (struct mali_attr_meta *) transfer.cpu;
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/* Copy as-is for the first pass */
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memcpy(target, so->hw, sz);
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/* Fixup offsets for the second pass. Recall that the hardware
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* calculates attribute addresses as:
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*
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* addr = base + (stride * vtx) + src_offset;
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*
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* However, on Mali, base must be aligned to 64-bytes, so we
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* instead let:
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*
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* base' = base & ~63 = base - (base & 63)
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*
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* To compensate when using base' (see emit_vertex_data), we have
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* to adjust src_offset by the masked off piece:
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*
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* addr' = base' + (stride * vtx) + (src_offset + (base & 63))
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* = base - (base & 63) + (stride * vtx) + src_offset + (base & 63)
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* = base + (stride * vtx) + src_offset
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* = addr;
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*
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* QED.
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*/
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for (unsigned i = 0; i < so->num_elements; ++i) {
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unsigned vbi = so->pipe[i].vertex_buffer_index;
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mali_ptr addr = panfrost_vertex_buffer_address(ctx, vbi);
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/* Adjust by the masked off bits of the offset */
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target[i].src_offset += (addr & 63);
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}
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ctx->payload_vertex.postfix.attribute_meta = transfer.gpu;
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}
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/* Go through dirty flags and actualise them in the cmdstream. */
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void
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@ -991,9 +1025,8 @@ panfrost_emit_for_draw(struct panfrost_context *ctx, bool with_vertex_data)
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}
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}
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if (ctx->dirty & PAN_DIRTY_VERTEX) {
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ctx->payload_vertex.postfix.attribute_meta = ctx->vertex->descriptor_ptr;
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}
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/* We stage to transient, so always dirty.. */
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panfrost_stage_attributes(ctx);
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if (ctx->dirty & PAN_DIRTY_SAMPLERS) {
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/* Upload samplers back to back, no padding */
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@ -1553,16 +1586,11 @@ panfrost_create_vertex_elements_state(
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unsigned num_elements,
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const struct pipe_vertex_element *elements)
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{
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struct panfrost_context *ctx = pan_context(pctx);
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struct panfrost_vertex_state *so = CALLOC_STRUCT(panfrost_vertex_state);
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so->num_elements = num_elements;
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memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
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struct panfrost_transfer transfer = panfrost_allocate_chunk(ctx, sizeof(struct mali_attr_meta) * num_elements, HEAP_DESCRIPTOR);
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so->hw = (struct mali_attr_meta *) transfer.cpu;
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so->descriptor_ptr = transfer.gpu;
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/* Allocate memory for the descriptor state */
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for (int i = 0; i < num_elements; ++i) {
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@ -291,11 +291,7 @@ struct panfrost_vertex_state {
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unsigned num_elements;
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struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
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int nr_components[PIPE_MAX_ATTRIBS];
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/* The actual attribute meta, prebaked and GPU mapped. TODO: Free memory */
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struct mali_attr_meta *hw;
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mali_ptr descriptor_ptr;
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struct mali_attr_meta hw[PIPE_MAX_ATTRIBS];
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};
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struct panfrost_sampler_state {
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