anv/intel: add a new debug flag for stalling after every draw/dispatch

Useful for hang debugging. Previously Anv incorrectly used DEBUG_SYNC
for this.

v2: Update documentations for sync/stall (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>

docs/envvars.rst

@@ -326,11 +326,14 @@ Intel driver environment variables
    ``spill_vec4``
       force spilling of all registers in the vec4 backend (useful to
       debug spilling code)
+   ``stall``
+      inserts a stall on the GPU after each draw/dispatch command to
+      wait for it to finish before starting any new work.
    ``submit``
       emit batchbuffer usage statistics
    ``sync``
-      after sending each batch, emit a message and wait for that batch
-      to finish rendering
+      after sending each batch, wait on the CPU for that batch to
+      finish rendering
    ``task``
       dump shader assembly for task shaders
    ``tcs``

src/intel/dev/intel_debug.h

@@ -59,7 +59,7 @@ extern uint64_t intel_debug;
 #define DEBUG_URB                 (1ull << 11)
 #define DEBUG_VS                  (1ull << 12)
 #define DEBUG_CLIP                (1ull << 13)
-/*                                (1ull << 14) */
+#define DEBUG_STALL               (1ull << 14)
 #define DEBUG_BLORP               (1ull << 15)
 #define DEBUG_NO16                (1ull << 16)
 #define DEBUG_NO_DUAL_OBJECT_GS   (1ull << 17)

src/intel/vulkan/anv_device.c

@@ -956,7 +956,7 @@ anv_physical_device_try_create(struct anv_instance *instance,
    device->has_reg_timestamp = anv_gem_reg_read(fd, TIMESTAMP | I915_REG_READ_8B_WA,
                                                 &u64_ignore) == 0;
 
-   device->always_flush_cache = INTEL_DEBUG(DEBUG_SYNC) ||
+   device->always_flush_cache = INTEL_DEBUG(DEBUG_STALL) ||
       driQueryOptionb(&instance->dri_options, "always_flush_cache");
 
    device->has_mmap_offset =