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radeonsi: move default tess level constant buffer to RW buffers 

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-04-19 02:09:55 +02:00
parent 302bec24bd
commit 3138a28ff2
5 changed files with 35 additions and 10 deletions
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19
src/gallium/drivers/radeonsi/si_shader.c
View File

@ -1280,6 +1280,25 @@ static void declare_system_value(
break;
}
case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI:
case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI:
{
LLVMValueRef buf, slot, val[4];
int i, offset;
slot = lp_build_const_int32(gallivm, SI_HS_CONST_DEFAULT_TESS_LEVELS);
buf = LLVMGetParam(ctx->radeon_bld.main_fn, SI_PARAM_RW_BUFFERS);
buf = build_indexed_load_const(ctx, buf, slot);
offset = decl->Semantic.Name == TGSI_SEMANTIC_DEFAULT_TESSINNER_SI ? 4 : 0;
for (i = 0; i < 4; i++)
val[i] = buffer_load_const(gallivm->builder, buf,
lp_build_const_int32(gallivm, (offset + i) * 4),
ctx->f32);
value = lp_build_gather_values(gallivm, val, 4);
break;
}
case TGSI_SEMANTIC_PRIMID:
value = get_primitive_id(&radeon_bld->soa.bld_base, 0);
break;

6
src/gallium/drivers/radeonsi/si_shader.h
View File

@ -210,6 +210,12 @@ enum {
SI_NUM_PARAMS = SI_PARAM_POS_FIXED_PT + 9, /* +8 for COLOR[0..1] */
};
/* SI-specific system values. */
enum {
TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
TGSI_SEMANTIC_DEFAULT_TESSINNER_SI,
};
struct si_shader;
/* A shader selector is a gallium CSO and contains shader variants and

4
src/gallium/drivers/radeonsi/si_state.c
View File

@ -3395,8 +3395,8 @@ static void si_set_tess_state(struct pipe_context *ctx,
(void*)array, sizeof(array),
&cb.buffer_offset);
ctx->set_constant_buffer(ctx, PIPE_SHADER_TESS_CTRL,
SI_DRIVER_STATE_CONST_BUF, &cb);
si_set_constant_buffer(sctx, &sctx->rw_buffers,
SI_HS_CONST_DEFAULT_TESS_LEVELS, &cb);
pipe_resource_reference(&cb.buffer, NULL);
}

1
src/gallium/drivers/radeonsi/si_state.h
View File

@ -178,6 +178,7 @@ enum {
SI_VS_STREAMOUT_BUF2,
SI_VS_STREAMOUT_BUF3,
SI_HS_CONST_DEFAULT_TESS_LEVELS,
SI_VS_CONST_CLIP_PLANES,
SI_PS_CONST_POLY_STIPPLE,
SI_PS_CONST_SAMPLE_POSITIONS,

15
src/gallium/drivers/radeonsi/si_state_shaders.c
View File

@ -1804,7 +1804,7 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
*/
static void si_generate_fixed_func_tcs(struct si_context *sctx)
{
struct ureg_src const0, const1;
struct ureg_src outer, inner;
struct ureg_dst tessouter, tessinner;
struct ureg_program *ureg = ureg_create(TGSI_PROCESSOR_TESS_CTRL);
@ -1813,17 +1813,16 @@ static void si_generate_fixed_func_tcs(struct si_context *sctx)
assert(!sctx->fixed_func_tcs_shader.cso);
ureg_DECL_constant2D(ureg, 0, 1, SI_DRIVER_STATE_CONST_BUF);
const0 = ureg_src_dimension(ureg_src_register(TGSI_FILE_CONSTANT, 0),
SI_DRIVER_STATE_CONST_BUF);
const1 = ureg_src_dimension(ureg_src_register(TGSI_FILE_CONSTANT, 1),
SI_DRIVER_STATE_CONST_BUF);
outer = ureg_DECL_system_value(ureg,
TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI, 0);
inner = ureg_DECL_system_value(ureg,
TGSI_SEMANTIC_DEFAULT_TESSINNER_SI, 0);
tessouter = ureg_DECL_output(ureg, TGSI_SEMANTIC_TESSOUTER, 0);
tessinner = ureg_DECL_output(ureg, TGSI_SEMANTIC_TESSINNER, 0);
ureg_MOV(ureg, tessouter, const0);
ureg_MOV(ureg, tessinner, const1);
ureg_MOV(ureg, tessouter, outer);
ureg_MOV(ureg, tessinner, inner);
ureg_END(ureg);
sctx->fixed_func_tcs_shader.cso =