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aco: implement stream output with vec3 on GFX6 

GFX6 doesn't support vec3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3412>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3412>
This commit is contained in:
Samuel Pitoiset 2020-01-15 14:44:26 +01:00 committed by Marge Bot
parent a445cb35bd
commit 300f8dec76
1 changed files with 51 additions and 39 deletions
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24
src/amd/compiler/aco_instruction_selection.cpp
View File

@ -7844,9 +7844,9 @@ static void emit_stream_output(isel_context *ctx,
const struct radv_stream_output *output)
{
unsigned num_comps = util_bitcount(output->component_mask);
unsigned writemask = (1 << num_comps) - 1;
unsigned loc = output->location;
unsigned buf = output->buffer;
unsigned offset = output->offset;
assert(num_comps && num_comps <= 4);
if (!num_comps || num_comps > 4)
@ -7864,15 +7864,26 @@ static void emit_stream_output(isel_context *ctx,
if (all_undef)
return;
Temp write_data = {ctx->program->allocateId(), RegClass(RegType::vgpr, num_comps)};
aco_ptr<Pseudo_instruction> vec{create_instruction<Pseudo_instruction>(aco_opcode::p_create_vector, Format::PSEUDO, num_comps, 1)};
for (unsigned i = 0; i < num_comps; ++i)
vec->operands[i] = (ctx->vs_output.mask[loc] & 1 << i) ? Operand(out[i]) : Operand(0u);
while (writemask) {
int start, count;
u_bit_scan_consecutive_range(&writemask, &start, &count);
if (count == 3 && ctx->options->chip_class == GFX6) {
/* GFX6 doesn't support storing vec3, split it. */
writemask |= 1u << (start + 2);
count = 2;
}
unsigned offset = output->offset + start * 4;
Temp write_data = {ctx->program->allocateId(), RegClass(RegType::vgpr, count)};
aco_ptr<Pseudo_instruction> vec{create_instruction<Pseudo_instruction>(aco_opcode::p_create_vector, Format::PSEUDO, count, 1)};
for (int i = 0; i < count; ++i)
vec->operands[i] = (ctx->vs_output.mask[loc] & 1 << (start + i)) ? Operand(out[start + i]) : Operand(0u);
vec->definitions[0] = Definition(write_data);
ctx->block->instructions.emplace_back(std::move(vec));
aco_opcode opcode;
switch (num_comps) {
switch (count) {
case 1:
opcode = aco_opcode::buffer_store_dword;
break;
@ -7905,6 +7916,7 @@ static void emit_stream_output(isel_context *ctx,
store->slc = true;
store->can_reorder = true;
ctx->block->instructions.emplace_back(std::move(store));
}
}
static void emit_streamout(isel_context *ctx, unsigned stream)