i965/fs: Don't use instruction list after calculating the cfg.
The only trick is changing a break into a return true in register coalescing, since the macro is actually a double loop, and break will do something different than you expect. (Wish I'd realized that earlier!) Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
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a4fb8897a2
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@ -1478,7 +1478,7 @@ fs_visitor::assign_curb_setup()
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prog_data->curb_read_length = ALIGN(stage_prog_data->nr_params, 8) / 8;
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/* Map the offsets in the UNIFORM file to fixed HW regs. */
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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for (unsigned int i = 0; i < inst->sources; i++) {
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if (inst->src[i].file == UNIFORM) {
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int uniform_nr = inst->src[i].reg + inst->src[i].reg_offset;
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@ -1607,7 +1607,7 @@ fs_visitor::assign_urb_setup()
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/* Offset all the urb_setup[] index by the actual position of the
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* setup regs, now that the location of the constants has been chosen.
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*/
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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if (inst->opcode == FS_OPCODE_LINTERP) {
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assert(inst->src[2].file == HW_REG);
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inst->src[2].fixed_hw_reg.nr += urb_start;
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@ -1668,7 +1668,7 @@ fs_visitor::split_virtual_grfs()
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false;
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}
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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/* If there's a SEND message that requires contiguous destination
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* registers, no splitting is allowed.
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*/
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@ -1703,7 +1703,7 @@ fs_visitor::split_virtual_grfs()
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}
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}
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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if (inst->dst.file == GRF &&
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split_grf[inst->dst.reg] &&
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inst->dst.reg_offset != 0) {
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@ -1743,7 +1743,7 @@ fs_visitor::compact_virtual_grfs()
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int remap_table[this->virtual_grf_count];
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memset(remap_table, -1, sizeof(remap_table));
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foreach_in_list(const fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, const fs_inst, inst, cfg) {
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if (inst->dst.file == GRF)
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remap_table[inst->dst.reg] = 0;
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@ -1767,7 +1767,7 @@ fs_visitor::compact_virtual_grfs()
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this->virtual_grf_count = new_index;
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/* Patch all the instructions to use the newly renumbered registers */
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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if (inst->dst.file == GRF)
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inst->dst.reg = remap_table[inst->dst.reg];
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@ -1831,7 +1831,7 @@ fs_visitor::move_uniform_array_access_to_pull_constants()
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* Note that we don't move constant-indexed accesses to arrays. No
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* testing has been done of the performance impact of this choice.
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*/
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foreach_in_list_safe(fs_inst, inst, &instructions) {
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foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {
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for (int i = 0 ; i < inst->sources; i++) {
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if (inst->src[i].file != UNIFORM || !inst->src[i].reladdr)
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continue;
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@ -1879,7 +1879,7 @@ fs_visitor::assign_constant_locations()
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is_live[i] = false;
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}
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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for (int i = 0; i < inst->sources; i++) {
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if (inst->src[i].file != UNIFORM)
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continue;
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@ -1999,7 +1999,7 @@ fs_visitor::opt_algebraic()
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{
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bool progress = false;
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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switch (inst->opcode) {
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case BRW_OPCODE_MUL:
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if (inst->src[1].file != IMM)
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@ -2112,7 +2112,7 @@ fs_visitor::opt_register_renaming()
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int remap[virtual_grf_count];
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memset(remap, -1, sizeof(int) * virtual_grf_count);
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foreach_in_list(fs_inst, inst, &this->instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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if (inst->opcode == BRW_OPCODE_IF || inst->opcode == BRW_OPCODE_DO) {
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depth++;
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} else if (inst->opcode == BRW_OPCODE_ENDIF ||
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@ -2827,7 +2827,7 @@ fs_visitor::dump_instructions(const char *name)
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}
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int ip = 0, max_pressure = 0;
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foreach_in_list(backend_instruction, inst, &instructions) {
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foreach_block_and_inst(block, backend_instruction, inst, cfg) {
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max_pressure = MAX2(max_pressure, regs_live_at_ip[ip]);
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fprintf(file, "{%3d} %4d: ", regs_live_at_ip[ip], ip);
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dump_instruction(inst, file);
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@ -55,7 +55,7 @@ fs_visitor::assign_regs_trivial()
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}
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this->grf_used = hw_reg_mapping[this->virtual_grf_count];
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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assign_reg(hw_reg_mapping, &inst->dst, reg_width);
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for (i = 0; i < inst->sources; i++) {
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assign_reg(hw_reg_mapping, &inst->src[i], reg_width);
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@ -242,7 +242,7 @@ fs_visitor::setup_payload_interference(struct ra_graph *g,
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int payload_last_use_ip[payload_node_count];
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memset(payload_last_use_ip, 0, sizeof(payload_last_use_ip));
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int ip = 0;
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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switch (inst->opcode) {
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case BRW_OPCODE_DO:
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loop_depth++;
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@ -362,7 +362,7 @@ fs_visitor::get_used_mrfs(bool *mrf_used)
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memset(mrf_used, 0, BRW_MAX_MRF * sizeof(bool));
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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if (inst->dst.file == MRF) {
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int reg = inst->dst.reg & ~BRW_MRF_COMPR4;
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mrf_used[reg] = true;
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@ -520,7 +520,7 @@ fs_visitor::assign_regs(bool allow_spilling)
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reg_width);
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}
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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assign_reg(hw_reg_mapping, &inst->dst, reg_width);
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for (int i = 0; i < inst->sources; i++) {
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assign_reg(hw_reg_mapping, &inst->src[i], reg_width);
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@ -578,7 +578,7 @@ fs_visitor::choose_spill_reg(struct ra_graph *g)
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* spill/unspill we'll have to do, and guess that the insides of
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* loops run 10 times.
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*/
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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for (unsigned int i = 0; i < inst->sources; i++) {
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if (inst->src[i].file == GRF) {
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spill_costs[inst->src[i].reg] += loop_scale;
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@ -113,7 +113,7 @@ is_coalesce_candidate(const fs_inst *inst, const int *virtual_grf_sizes)
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static bool
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can_coalesce_vars(brw::fs_live_variables *live_intervals,
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const exec_list *instructions, const fs_inst *inst,
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const cfg_t *cfg, const fs_inst *inst,
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int var_to, int var_from)
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{
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if (!live_intervals->vars_interfere(var_from, var_to))
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@ -132,7 +132,7 @@ can_coalesce_vars(brw::fs_live_variables *live_intervals,
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int start_ip = MIN2(start_to, start_from);
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int scan_ip = -1;
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foreach_in_list(fs_inst, scan_inst, instructions) {
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foreach_block_and_inst(block, fs_inst, scan_inst, cfg) {
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scan_ip++;
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if (scan_ip < start_ip)
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@ -145,7 +145,7 @@ can_coalesce_vars(brw::fs_live_variables *live_intervals,
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continue;
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if (scan_ip > live_intervals->end[var_to])
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break;
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return true;
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if (scan_inst->dst.equals(inst->dst) ||
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scan_inst->dst.equals(inst->src[0]))
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@ -170,7 +170,7 @@ fs_visitor::register_coalesce()
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int var_to[MAX_SAMPLER_MESSAGE_SIZE];
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int var_from[MAX_SAMPLER_MESSAGE_SIZE];
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foreach_in_list(fs_inst, inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, inst, cfg) {
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if (!is_coalesce_candidate(inst, virtual_grf_sizes))
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continue;
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@ -216,7 +216,7 @@ fs_visitor::register_coalesce()
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var_to[i] = live_intervals->var_from_vgrf[reg_to] + reg_to_offset[i];
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var_from[i] = live_intervals->var_from_vgrf[reg_from] + i;
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if (!can_coalesce_vars(live_intervals, &instructions, inst,
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if (!can_coalesce_vars(live_intervals, cfg, inst,
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var_to[i], var_from[i])) {
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can_coalesce = false;
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reg_from = -1;
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@ -241,7 +241,7 @@ fs_visitor::register_coalesce()
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}
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}
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foreach_in_list(fs_inst, scan_inst, &instructions) {
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foreach_block_and_inst(block, fs_inst, scan_inst, cfg) {
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for (int i = 0; i < src_size; i++) {
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if (mov[i] || was_load_payload) {
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if (scan_inst->dst.file == GRF &&
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