gallium/util: replace pipe_mutex with mtx_t
pipe_mutex was made unnecessary with fd33a6bcd7
.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
parent
464d4806c1
commit
2efddc63ee
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@ -108,12 +108,8 @@ static inline int pipe_thread_is_self( pipe_thread thread )
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return 0;
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}
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/* pipe_mutex
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*/
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typedef mtx_t pipe_mutex;
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#define pipe_static_mutex(mutex) \
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static pipe_mutex mutex = _MTX_INITIALIZER_NP
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static mtx_t mutex = _MTX_INITIALIZER_NP
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#define pipe_mutex_init(mutex) \
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(void) mtx_init(&(mutex), mtx_plain)
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@ -131,11 +127,11 @@ typedef mtx_t pipe_mutex;
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__pipe_mutex_assert_locked(&(mutex))
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static inline void
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__pipe_mutex_assert_locked(pipe_mutex *mutex)
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__pipe_mutex_assert_locked(mtx_t *mutex)
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{
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#ifdef DEBUG
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/* NOTE: this would not work for recursive mutexes, but
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* pipe_mutex doesn't support those
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* mtx_t doesn't support those
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*/
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int ret = mtx_trylock(mutex);
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assert(ret == thrd_busy);
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@ -179,7 +175,7 @@ typedef struct {
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unsigned count;
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unsigned waiters;
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uint64_t sequence;
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pipe_mutex mutex;
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mtx_t mutex;
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pipe_condvar condvar;
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} pipe_barrier;
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@ -231,7 +227,7 @@ static inline void pipe_barrier_wait(pipe_barrier *barrier)
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typedef struct
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{
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pipe_mutex mutex;
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mtx_t mutex;
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pipe_condvar cond;
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int counter;
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} pipe_semaphore;
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@ -81,7 +81,7 @@ struct fenced_manager
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/**
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* Following members are mutable and protected by this mutex.
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*/
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pipe_mutex mutex;
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mtx_t mutex;
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/**
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* Fenced buffer list.
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@ -78,7 +78,7 @@ struct pb_debug_buffer
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struct debug_stack_frame create_backtrace[PB_DEBUG_CREATE_BACKTRACE];
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pipe_mutex mutex;
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mtx_t mutex;
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unsigned map_count;
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struct debug_stack_frame map_backtrace[PB_DEBUG_MAP_BACKTRACE];
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@ -95,7 +95,7 @@ struct pb_debug_manager
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pb_size underflow_size;
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pb_size overflow_size;
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pipe_mutex mutex;
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mtx_t mutex;
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struct list_head list;
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};
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@ -53,7 +53,7 @@ struct mm_pb_manager
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{
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struct pb_manager base;
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pipe_mutex mutex;
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mtx_t mutex;
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pb_size size;
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struct mem_block *heap;
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@ -56,7 +56,7 @@ struct pool_pb_manager
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{
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struct pb_manager base;
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pipe_mutex mutex;
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mtx_t mutex;
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pb_size bufSize;
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pb_size bufAlign;
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@ -128,7 +128,7 @@ struct pb_slab_manager
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*/
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struct list_head slabs;
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pipe_mutex mutex;
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mtx_t mutex;
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};
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@ -52,7 +52,7 @@ struct pb_cache
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*/
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struct list_head buckets[4];
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pipe_mutex mutex;
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mtx_t mutex;
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uint64_t cache_size;
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uint64_t max_cache_size;
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unsigned usecs;
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@ -110,7 +110,7 @@ typedef bool (slab_can_reclaim_fn)(void *priv, struct pb_slab_entry *);
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*/
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struct pb_slabs
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{
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pipe_mutex mutex;
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mtx_t mutex;
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unsigned min_order;
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unsigned num_orders;
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@ -53,7 +53,7 @@
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struct debug_flush_buf {
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/* Atomic */
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struct pipe_reference reference; /* Must be the first member. */
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pipe_mutex mutex;
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mtx_t mutex;
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/* Immutable */
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boolean supports_unsync;
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unsigned bt_depth;
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@ -40,7 +40,7 @@
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* Put this into your job structure.
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*/
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struct util_queue_fence {
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pipe_mutex mutex;
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mtx_t mutex;
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pipe_condvar cond;
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int signalled;
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};
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@ -57,7 +57,7 @@ struct util_queue_job {
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/* Put this into your context. */
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struct util_queue {
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const char *name;
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pipe_mutex lock;
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mtx_t lock;
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pipe_condvar has_queued_cond;
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pipe_condvar has_space_cond;
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pipe_thread *threads;
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@ -43,7 +43,7 @@ struct util_range {
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unsigned end; /* exclusive */
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/* for the range to be consistent with multiple contexts: */
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pipe_mutex write_mutex;
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mtx_t write_mutex;
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};
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@ -17,7 +17,7 @@ struct util_ringbuffer
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unsigned head;
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unsigned tail;
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pipe_condvar change;
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pipe_mutex mutex;
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mtx_t mutex;
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};
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@ -235,7 +235,7 @@ struct dd_context
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* the thread dumps the record of the oldest unsignalled fence.
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*/
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pipe_thread thread;
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pipe_mutex mutex;
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mtx_t mutex;
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int kill_thread;
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struct pipe_resource *fence;
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struct pipe_transfer *fence_transfer;
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@ -44,7 +44,7 @@ struct fd_bo;
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struct fd_screen {
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struct pipe_screen base;
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pipe_mutex lock;
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mtx_t lock;
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/* it would be tempting to use pipe_reference here, but that
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* really doesn't work well if it isn't the first member of
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@ -43,7 +43,7 @@ struct lp_fence
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struct pipe_reference reference;
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unsigned id;
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pipe_mutex mutex;
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mtx_t mutex;
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pipe_condvar signalled;
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boolean issued;
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@ -174,7 +174,7 @@ struct lp_scene {
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unsigned tiles_x, tiles_y;
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int curr_x, curr_y; /**< for iterating over bins */
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pipe_mutex mutex;
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mtx_t mutex;
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struct cmd_bin tile[TILES_X][TILES_Y];
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struct data_block_list data;
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@ -56,7 +56,7 @@ struct llvmpipe_screen
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unsigned timestamp;
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struct lp_rasterizer *rast;
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pipe_mutex rast_mutex;
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mtx_t rast_mutex;
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};
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@ -821,7 +821,7 @@ struct nv50_blitter
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struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */
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pipe_mutex mutex;
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mtx_t mutex;
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};
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struct nv50_blitctx
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@ -772,7 +772,7 @@ struct nvc0_blitter
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struct nv50_tsc_entry sampler[2]; /* nearest, bilinear */
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pipe_mutex mutex;
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mtx_t mutex;
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struct nvc0_screen *screen;
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};
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@ -48,7 +48,7 @@ struct r300_screen {
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/* The MSAA texture with CMASK access; */
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struct pipe_resource *cmask_resource;
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pipe_mutex cmask_mutex;
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mtx_t cmask_mutex;
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};
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@ -381,7 +381,7 @@ struct r600_common_screen {
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/* Auxiliary context. Mainly used to initialize resources.
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* It must be locked prior to using and flushed before unlocking. */
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struct pipe_context *aux_context;
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pipe_mutex aux_context_lock;
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mtx_t aux_context_lock;
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/* This must be in the screen, because UE4 uses one context for
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* compilation and another one for rendering.
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@ -394,7 +394,7 @@ struct r600_common_screen {
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unsigned num_shader_cache_hits;
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/* GPU load thread. */
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pipe_mutex gpu_load_mutex;
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mtx_t gpu_load_mutex;
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pipe_thread gpu_load_thread;
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union r600_mmio_counters mmio_counters;
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volatile unsigned gpu_load_stop_thread; /* bool */
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@ -84,7 +84,7 @@ struct si_screen {
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bool use_monolithic_shaders;
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bool record_llvm_ir;
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pipe_mutex shader_parts_mutex;
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mtx_t shader_parts_mutex;
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struct si_shader_part *vs_prologs;
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struct si_shader_part *vs_epilogs;
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struct si_shader_part *tcs_epilogs;
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@ -104,7 +104,7 @@ struct si_screen {
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* - GS and CS aren't cached, but it's certainly possible to cache
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* those as well.
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*/
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pipe_mutex shader_cache_mutex;
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mtx_t shader_cache_mutex;
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struct hash_table *shader_cache;
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/* Shader compiler queue for multithreaded compilation. */
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@ -278,7 +278,7 @@ struct si_shader_selector {
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struct util_queue_fence ready;
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struct si_compiler_ctx_state compiler_ctx_state;
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pipe_mutex mutex;
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mtx_t mutex;
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struct si_shader *first_variant; /* immutable after the first variant */
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struct si_shader *last_variant; /* mutable */
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@ -42,7 +42,7 @@ struct rbug_context {
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struct rbug_list list;
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/* call locking */
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pipe_mutex call_mutex;
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mtx_t call_mutex;
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/* current state */
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struct {
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@ -58,7 +58,7 @@ struct rbug_context {
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} curr;
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/* draw locking */
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pipe_mutex draw_mutex;
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mtx_t draw_mutex;
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pipe_condvar draw_cond;
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unsigned draw_num_rules;
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int draw_blocker;
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@ -74,7 +74,7 @@ struct rbug_context {
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} draw_rule;
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/* list of state objects */
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pipe_mutex list_mutex;
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mtx_t list_mutex;
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unsigned num_shaders;
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struct rbug_list shaders;
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};
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@ -49,7 +49,7 @@ struct rbug_screen
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/* remote debugger */
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struct rbug_rbug *rbug;
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pipe_mutex list_mutex;
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mtx_t list_mutex;
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int num_contexts;
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int num_resources;
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int num_surfaces;
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@ -66,9 +66,9 @@ struct svga_screen
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} debug;
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unsigned texture_timestamp;
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pipe_mutex tex_mutex;
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mtx_t tex_mutex;
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pipe_mutex swc_mutex; /* Used for buffer uploads */
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mtx_t swc_mutex; /* Used for buffer uploads */
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/* which formats to translate depth formats into */
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struct {
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@ -105,7 +105,7 @@ struct svga_host_surface_cache_entry
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*/
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struct svga_host_surface_cache
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{
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pipe_mutex mutex;
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mtx_t mutex;
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/* Unused buffers are put in buckets to speed up lookups */
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struct list_head bucket[SVGA_HOST_SURFACE_CACHE_BUCKETS];
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@ -77,14 +77,14 @@ struct vc4_screen {
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struct list_head *size_list;
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uint32_t size_list_size;
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pipe_mutex lock;
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mtx_t lock;
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uint32_t bo_size;
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uint32_t bo_count;
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} bo_cache;
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struct util_hash_table *bo_handles;
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pipe_mutex bo_handles_mutex;
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mtx_t bo_handles_mutex;
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uint32_t bo_size;
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uint32_t bo_count;
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@ -89,7 +89,7 @@ struct dri_screen
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__DRIimage * (*lookup_egl_image)(struct dri_screen *ctx, void *handle);
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/* OpenCL interop */
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pipe_mutex opencl_func_mutex;
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mtx_t opencl_func_mutex;
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opencl_dri_event_add_ref_t opencl_dri_event_add_ref;
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opencl_dri_event_release_t opencl_dri_event_release;
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opencl_dri_event_wait_t opencl_dri_event_wait;
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@ -76,7 +76,7 @@ typedef struct xmesa_visual *XMesaVisual;
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struct xmesa_display {
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pipe_mutex mutex;
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mtx_t mutex;
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Display *display;
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struct pipe_screen *screen;
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@ -74,7 +74,7 @@ struct hgl_context
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Bitmap* bitmap;
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color_space colorSpace;
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pipe_mutex fbMutex;
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mtx_t fbMutex;
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struct hgl_buffer* draw;
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struct hgl_buffer* read;
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@ -74,8 +74,8 @@ struct nine_queue_pool {
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BOOL worker_wait;
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pipe_condvar event_pop;
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pipe_condvar event_push;
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pipe_mutex mutex_pop;
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pipe_mutex mutex_push;
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mtx_t mutex_pop;
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mtx_t mutex_push;
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};
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/* Consumer functions: */
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@ -64,13 +64,13 @@ struct csmt_context {
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struct nine_queue_pool* pool;
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BOOL terminate;
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pipe_condvar event_processed;
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pipe_mutex mutex_processed;
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mtx_t mutex_processed;
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struct NineDevice9 *device;
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BOOL processed;
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BOOL toPause;
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BOOL hasPaused;
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pipe_mutex thread_running;
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pipe_mutex thread_resume;
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mtx_t thread_running;
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mtx_t thread_resume;
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};
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/* Wait for instruction to be processed.
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@ -209,7 +209,7 @@ typedef struct {
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struct vl_compositor compositor;
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struct vl_compositor_state cstate;
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vl_csc_matrix csc;
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pipe_mutex mutex;
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mtx_t mutex;
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} vlVaDriver;
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typedef struct {
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@ -354,7 +354,7 @@ typedef struct
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struct pipe_context *context;
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struct vl_compositor compositor;
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struct pipe_sampler_view *dummy_sv;
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pipe_mutex mutex;
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mtx_t mutex;
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} vlVdpDevice;
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typedef struct
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@ -439,7 +439,7 @@ typedef struct
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typedef struct
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{
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vlVdpDevice *device;
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pipe_mutex mutex;
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mtx_t mutex;
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struct pipe_video_codec *decoder;
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} vlVdpDecoder;
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@ -50,7 +50,7 @@ private:
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// Context Management
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struct hgl_context* fContext[CONTEXT_MAX];
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context_id fCurrentContext;
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pipe_mutex fMutex;
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mtx_t fMutex;
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};
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@ -52,7 +52,7 @@ struct amdgpu_winsys {
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amdgpu_device_handle dev;
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pipe_mutex bo_fence_lock;
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mtx_t bo_fence_lock;
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int num_cs; /* The number of command streams created. */
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unsigned num_total_rejected_cs;
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@ -79,7 +79,7 @@ struct amdgpu_winsys {
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bool check_vm;
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/* List of all allocated buffers */
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pipe_mutex global_bo_list_lock;
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mtx_t global_bo_list_lock;
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struct list_head global_bo_list;
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unsigned num_buffers;
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};
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@ -43,7 +43,7 @@ struct radeon_bo {
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struct pb_cache_entry cache_entry;
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void *ptr;
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pipe_mutex map_mutex;
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mtx_t map_mutex;
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unsigned map_count;
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bool use_reusable_pool;
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} real;
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@ -57,7 +57,7 @@ pipe_static_mutex(fd_tab_mutex);
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* with multiple contexts (here command streams) backed by one winsys. */
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static bool radeon_set_fd_access(struct radeon_drm_cs *applier,
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struct radeon_drm_cs **owner,
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pipe_mutex *mutex,
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mtx_t *mutex,
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unsigned request, const char *request_name,
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bool enable)
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{
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@ -78,9 +78,9 @@ struct radeon_drm_winsys {
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struct util_hash_table *bo_handles;
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/* List of buffer virtual memory ranges. Protectded by bo_handles_mutex. */
|
||||
struct util_hash_table *bo_vas;
|
||||
pipe_mutex bo_handles_mutex;
|
||||
pipe_mutex bo_va_mutex;
|
||||
pipe_mutex bo_fence_lock;
|
||||
mtx_t bo_handles_mutex;
|
||||
mtx_t bo_va_mutex;
|
||||
mtx_t bo_fence_lock;
|
||||
|
||||
uint64_t va_offset;
|
||||
struct list_head va_holes;
|
||||
|
@ -91,9 +91,9 @@ struct radeon_drm_winsys {
|
|||
uint32_t num_cpus; /* Number of CPUs. */
|
||||
|
||||
struct radeon_drm_cs *hyperz_owner;
|
||||
pipe_mutex hyperz_owner_mutex;
|
||||
mtx_t hyperz_owner_mutex;
|
||||
struct radeon_drm_cs *cmask_owner;
|
||||
pipe_mutex cmask_owner_mutex;
|
||||
mtx_t cmask_owner_mutex;
|
||||
|
||||
/* multithreaded command submission */
|
||||
struct util_queue cs_queue;
|
||||
|
|
|
@ -70,7 +70,7 @@ struct fenced_manager
|
|||
/**
|
||||
* Following members are mutable and protected by this mutex.
|
||||
*/
|
||||
pipe_mutex mutex;
|
||||
mtx_t mutex;
|
||||
|
||||
/**
|
||||
* Fenced buffer list.
|
||||
|
|
|
@ -40,7 +40,7 @@ struct vmw_fence_ops
|
|||
struct pb_fence_ops base;
|
||||
struct vmw_winsys_screen *vws;
|
||||
|
||||
pipe_mutex mutex;
|
||||
mtx_t mutex;
|
||||
|
||||
/*
|
||||
* Protected by mutex;
|
||||
|
|
|
@ -57,7 +57,7 @@ struct vmw_svga_winsys_surface
|
|||
unsigned next_present_no;
|
||||
uint32_t present_fences[VMW_MAX_PRESENTS];
|
||||
|
||||
pipe_mutex mutex;
|
||||
mtx_t mutex;
|
||||
struct svga_winsys_buffer *buf; /* Current backing guest buffer */
|
||||
uint32_t mapcount; /* Number of mappers */
|
||||
uint32_t map_mode; /* PIPE_TRANSFER_[READ|WRITE] */
|
||||
|
|
|
@ -59,11 +59,11 @@ struct virgl_drm_winsys
|
|||
struct list_head delayed;
|
||||
int num_delayed;
|
||||
unsigned usecs;
|
||||
pipe_mutex mutex;
|
||||
mtx_t mutex;
|
||||
|
||||
struct util_hash_table *bo_handles;
|
||||
struct util_hash_table *bo_names;
|
||||
pipe_mutex bo_handles_mutex;
|
||||
mtx_t bo_handles_mutex;
|
||||
};
|
||||
|
||||
struct virgl_drm_cmd_buf {
|
||||
|
|
|
@ -48,7 +48,7 @@ struct virgl_vtest_winsys {
|
|||
struct list_head delayed;
|
||||
int num_delayed;
|
||||
unsigned usecs;
|
||||
pipe_mutex mutex;
|
||||
mtx_t mutex;
|
||||
};
|
||||
|
||||
struct virgl_hw_res {
|
||||
|
|
Loading…
Reference in New Issue