freedreno/a4xx+: Increase max texture size to 16384.
Noticed when poking around with texture layouts and found that my big texture layout from the blob buffer overflowed. Values come from http://vulkan.gpuinfo.org for Adreno 418, 512, 630. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4931>
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@ -75,7 +75,7 @@
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* texture.
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*/
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#define FDL_MAX_MIP_LEVELS 14
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#define FDL_MAX_MIP_LEVELS 15
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struct fdl_slice {
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uint32_t offset; /* offset of first layer in slice */
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@ -62,7 +62,7 @@ struct fd_gmem_stateobj {
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uint8_t num_vsc_pipes; /* number of pipes for a20x */
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struct fd_vsc_pipe vsc_pipe[32];
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struct fd_tile tile[512];
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struct fd_tile tile[2048];
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struct list_head node;
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};
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@ -403,9 +403,15 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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/* Texturing. */
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case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
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return 1 << (MAX_MIP_LEVELS - 1);
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if (is_a6xx(screen) || is_a5xx(screen) || is_a4xx(screen))
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return 16384;
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else
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return 8192;
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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return MAX_MIP_LEVELS;
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if (is_a6xx(screen) || is_a5xx(screen) || is_a4xx(screen))
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return 15;
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else
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return 14;
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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return 11;
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@ -50,8 +50,6 @@ enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
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enum adreno_stencil_op fd_stencil_op(unsigned op);
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#define A3XX_MAX_MIP_LEVELS 14
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/* TBD if it is same on a2xx, but for now: */
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#define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
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#define A2XX_MAX_RENDER_TARGETS 1
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#define A3XX_MAX_RENDER_TARGETS 4
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