radeonsi: clean up si_get_param
has_streamout is always true Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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4fe1fd4df4
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@ -334,6 +334,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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switch (param) {
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/* Supported features (boolean caps). */
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case PIPE_CAP_ACCELERATED:
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case PIPE_CAP_TWO_SIDED_STENCIL:
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case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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case PIPE_CAP_ANISOTROPIC_FILTER:
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@ -414,6 +415,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
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case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
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case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
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case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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return 1;
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case PIPE_CAP_DOUBLES:
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@ -443,7 +446,10 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
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case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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case PIPE_CAP_MAX_VERTEX_STREAMS:
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return 4;
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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return HAVE_LLVM >= 0x0309 ? 4 : 0;
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@ -456,10 +462,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
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return MIN2(sscreen->b.info.max_alloc_size, INT_MAX);
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case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
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return 0;
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/* Unsupported features. */
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case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
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case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
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case PIPE_CAP_USER_VERTEX_BUFFERS:
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@ -472,6 +476,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_NATIVE_FENCE_FD:
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case PIPE_CAP_TGSI_FS_FBFETCH:
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case PIPE_CAP_TGSI_MUL_ZERO_WINS:
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case PIPE_CAP_UMA:
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return 0;
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case PIPE_CAP_QUERY_BUFFER_OBJECT:
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@ -489,22 +494,15 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
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/* Stream output. */
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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return sscreen->b.has_streamout ? 4 : 0;
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case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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return sscreen->b.has_streamout ? 1 : 0;
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case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
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case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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return sscreen->b.has_streamout ? 32*4 : 0;
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return 32*4;
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/* Geometry shader output. */
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case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
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return 1024;
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case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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return 4095;
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case PIPE_CAP_MAX_VERTEX_STREAMS:
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return 4;
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case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
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return 2048;
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@ -520,13 +518,11 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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/* textures support 8192, but layered rendering supports 2048 */
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return 2048;
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/* Render targets. */
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return 8;
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/* Viewports and render targets. */
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case PIPE_CAP_MAX_VIEWPORTS:
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return R600_MAX_VIEWPORTS;
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case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return 8;
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/* Timer queries, present when the clock frequency is non zero. */
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@ -549,12 +545,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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return ATI_VENDOR_ID;
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case PIPE_CAP_DEVICE_ID:
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return sscreen->b.info.pci_id;
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case PIPE_CAP_ACCELERATED:
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return 1;
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case PIPE_CAP_VIDEO_MEMORY:
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return sscreen->b.info.vram_size >> 20;
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case PIPE_CAP_UMA:
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return 0;
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case PIPE_CAP_PCI_GROUP:
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return sscreen->b.info.pci_domain;
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case PIPE_CAP_PCI_BUS:
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