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s/0/NULL/ (Jeff Muizelaar)

This commit is contained in:
Brian Paul 2005-02-16 15:02:25 +00:00
parent 5c2f3d5d3a
commit 2c28dd892c
11 changed files with 25 additions and 25 deletions
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6
src/mesa/drivers/dri/radeon/radeon_context.c
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@ -172,7 +172,7 @@ static const struct tnl_pipeline_stage *radeon_pipeline[] = {
&_radeon_render_stage, &_radeon_render_stage,
&_tnl_render_stage, /* FALLBACK: */ &_tnl_render_stage, /* FALLBACK: */
0, NULL,
}; };
@ -526,7 +526,7 @@ void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
if (rmesa->state.scissor.pClipRects) { if (rmesa->state.scissor.pClipRects) {
FREE(rmesa->state.scissor.pClipRects); FREE(rmesa->state.scissor.pClipRects);
rmesa->state.scissor.pClipRects = 0; rmesa->state.scissor.pClipRects = NULL;
} }
if ( release_texture_heaps ) { if ( release_texture_heaps ) {
@ -612,7 +612,7 @@ radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
} else { } else {
if (RADEON_DEBUG & DEBUG_DRI) if (RADEON_DEBUG & DEBUG_DRI)
fprintf(stderr, "%s ctx is null\n", __FUNCTION__); fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
_mesa_make_current( 0, 0 ); _mesa_make_current( NULL, NULL );
} }
if (RADEON_DEBUG & DEBUG_DRI) if (RADEON_DEBUG & DEBUG_DRI)

4
src/mesa/drivers/dri/radeon/radeon_ioctl.c
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@ -301,7 +301,7 @@ void radeonFlushElts( radeonContextPtr rmesa )
fprintf(stderr, "%s\n", __FUNCTION__); fprintf(stderr, "%s\n", __FUNCTION__);
assert( rmesa->dma.flush == radeonFlushElts ); assert( rmesa->dma.flush == radeonFlushElts );
rmesa->dma.flush = 0; rmesa->dma.flush = NULL;
/* Cope with odd number of elts: /* Cope with odd number of elts:
*/ */
@ -734,7 +734,7 @@ void radeonReleaseDmaRegion( radeonContextPtr rmesa,
rmesa->dma.nr_released_bufs++; rmesa->dma.nr_released_bufs++;
} }
region->buf = 0; region->buf = NULL;
region->start = 0; region->start = 0;
} }

2
src/mesa/drivers/dri/radeon/radeon_sanity.c
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@ -389,7 +389,7 @@ static struct reg *lookup_reg( struct reg *tab, int reg )
} }
fprintf(stderr, "*** unknown reg 0x%x\n", reg); fprintf(stderr, "*** unknown reg 0x%x\n", reg);
return 0; return NULL;
} }

2
src/mesa/drivers/dri/radeon/radeon_state.c
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@ -1808,7 +1808,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
RADEON_STATECHANGE(rmesa, ctx ); RADEON_STATECHANGE(rmesa, ctx );
if ( state ) { if ( state ) {
rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_FOG_ENABLE; rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_FOG_ENABLE;
radeonFogfv( ctx, GL_FOG_MODE, 0 ); radeonFogfv( ctx, GL_FOG_MODE, NULL );
} else { } else {
rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_FOG_ENABLE; rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_FOG_ENABLE;
RADEON_STATECHANGE(rmesa, tcl); RADEON_STATECHANGE(rmesa, tcl);

8
src/mesa/drivers/dri/radeon/radeon_state_init.c
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@ -529,8 +529,8 @@ void radeonInitState( radeonContextPtr rmesa )
ctx->Driver.Lightfv( ctx, p, GL_AMBIENT, l->Ambient ); ctx->Driver.Lightfv( ctx, p, GL_AMBIENT, l->Ambient );
ctx->Driver.Lightfv( ctx, p, GL_DIFFUSE, l->Diffuse ); ctx->Driver.Lightfv( ctx, p, GL_DIFFUSE, l->Diffuse );
ctx->Driver.Lightfv( ctx, p, GL_SPECULAR, l->Specular ); ctx->Driver.Lightfv( ctx, p, GL_SPECULAR, l->Specular );
ctx->Driver.Lightfv( ctx, p, GL_POSITION, 0 ); ctx->Driver.Lightfv( ctx, p, GL_POSITION, NULL );
ctx->Driver.Lightfv( ctx, p, GL_SPOT_DIRECTION, 0 ); ctx->Driver.Lightfv( ctx, p, GL_SPOT_DIRECTION, NULL );
ctx->Driver.Lightfv( ctx, p, GL_SPOT_EXPONENT, &l->SpotExponent ); ctx->Driver.Lightfv( ctx, p, GL_SPOT_EXPONENT, &l->SpotExponent );
ctx->Driver.Lightfv( ctx, p, GL_SPOT_CUTOFF, &l->SpotCutoff ); ctx->Driver.Lightfv( ctx, p, GL_SPOT_CUTOFF, &l->SpotCutoff );
ctx->Driver.Lightfv( ctx, p, GL_CONSTANT_ATTENUATION, ctx->Driver.Lightfv( ctx, p, GL_CONSTANT_ATTENUATION,
@ -551,12 +551,12 @@ void radeonInitState( radeonContextPtr rmesa )
ctx->Driver.ClipPlane( ctx, GL_CLIP_PLANE0 + i, NULL ); ctx->Driver.ClipPlane( ctx, GL_CLIP_PLANE0 + i, NULL );
} }
ctx->Driver.Fogfv( ctx, GL_FOG_MODE, 0 ); ctx->Driver.Fogfv( ctx, GL_FOG_MODE, NULL );
ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density ); ctx->Driver.Fogfv( ctx, GL_FOG_DENSITY, &ctx->Fog.Density );
ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start ); ctx->Driver.Fogfv( ctx, GL_FOG_START, &ctx->Fog.Start );
ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End ); ctx->Driver.Fogfv( ctx, GL_FOG_END, &ctx->Fog.End );
ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color ); ctx->Driver.Fogfv( ctx, GL_FOG_COLOR, ctx->Fog.Color );
ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, 0 ); ctx->Driver.Fogfv( ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL );
rmesa->hw.grd.cmd[GRD_VERT_GUARD_CLIP_ADJ] = IEEE_ONE; rmesa->hw.grd.cmd[GRD_VERT_GUARD_CLIP_ADJ] = IEEE_ONE;
rmesa->hw.grd.cmd[GRD_VERT_GUARD_DISCARD_ADJ] = IEEE_ONE; rmesa->hw.grd.cmd[GRD_VERT_GUARD_DISCARD_ADJ] = IEEE_ONE;

8
src/mesa/drivers/dri/radeon/radeon_swtcl.c
View File

@ -365,7 +365,7 @@ static void flush_last_swtcl_prim( radeonContextPtr rmesa )
if (RADEON_DEBUG & DEBUG_IOCTL) if (RADEON_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__); fprintf(stderr, "%s\n", __FUNCTION__);
rmesa->dma.flush = 0; rmesa->dma.flush = NULL;
if (rmesa->dma.current.buf) { if (rmesa->dma.current.buf) {
struct radeon_dma_region *current = &rmesa->dma.current; struct radeon_dma_region *current = &rmesa->dma.current;
@ -669,7 +669,7 @@ const struct tnl_pipeline_stage _radeon_render_stage =
0, /* re-run (always runs) */ 0, /* re-run (always runs) */
GL_TRUE, /* active */ GL_TRUE, /* active */
0, 0, /* inputs (set in check_render), outputs */ 0, 0, /* inputs (set in check_render), outputs */
0, 0, /* changed_inputs, private */ 0, NULL, /* changed_inputs, private */
dtr, /* destructor */ dtr, /* destructor */
radeon_check_render, /* check - initially set to alloc data */ radeon_check_render, /* check - initially set to alloc data */
radeon_run_render /* run */ radeon_run_render /* run */
@ -782,7 +782,7 @@ static void free_texrect_data( struct tnl_pipeline_stage *stage )
if (store->texcoord[i].data) if (store->texcoord[i].data)
_mesa_vector4f_free( &store->texcoord[i] ); _mesa_vector4f_free( &store->texcoord[i] );
FREE( store ); FREE( store );
stage->privatePtr = 0; stage->privatePtr = NULL;
} }
} }
@ -1221,7 +1221,7 @@ void radeonDestroySwtcl( GLcontext *ctx )
if (rmesa->swtcl.verts) { if (rmesa->swtcl.verts) {
ALIGN_FREE(rmesa->swtcl.verts); ALIGN_FREE(rmesa->swtcl.verts);
rmesa->swtcl.verts = 0; rmesa->swtcl.verts = NULL;
} }
} }

4
src/mesa/drivers/dri/radeon/radeon_tcl.c
View File

@ -405,7 +405,7 @@ const struct tnl_pipeline_stage _radeon_tcl_stage =
0, /* re-run (always runs) */ 0, /* re-run (always runs) */
GL_TRUE, /* active */ GL_TRUE, /* active */
0, 0, /* inputs (set in check_render), outputs */ 0, 0, /* inputs (set in check_render), outputs */
0, 0, /* changed_inputs, private */ 0, NULL, /* changed_inputs, private */
dtr, /* destructor */ dtr, /* destructor */
radeon_init_tcl_render, /* check - initially set to alloc data */ radeon_init_tcl_render, /* check - initially set to alloc data */
radeon_run_tcl_render /* run */ radeon_run_tcl_render /* run */
@ -472,7 +472,7 @@ static void transition_to_hwtnl( GLcontext *ctx )
if ( rmesa->dma.flush ) if ( rmesa->dma.flush )
rmesa->dma.flush( rmesa ); rmesa->dma.flush( rmesa );
rmesa->dma.flush = 0; rmesa->dma.flush = NULL;
rmesa->swtcl.vertex_format = 0; rmesa->swtcl.vertex_format = 0;
if (rmesa->swtcl.indexed_verts.buf) if (rmesa->swtcl.indexed_verts.buf)

2
src/mesa/drivers/dri/radeon/radeon_vtxfmt.c
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@ -178,7 +178,7 @@ static void flush_prims( radeonContextPtr rmesa )
rmesa->tcl.vertex_format = rmesa->vb.vertex_format; rmesa->tcl.vertex_format = rmesa->vb.vertex_format;
rmesa->tcl.aos_components[0] = &tmp; rmesa->tcl.aos_components[0] = &tmp;
rmesa->tcl.nr_aos_components = 1; rmesa->tcl.nr_aos_components = 1;
rmesa->dma.flush = 0; rmesa->dma.flush = NULL;
/* Optimize the primitive list: /* Optimize the primitive list:
*/ */

4
src/mesa/drivers/dri/radeon/radeon_vtxfmt_c.c
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@ -602,7 +602,7 @@ static struct dynfn *lookup( struct dynfn *l, int key )
return f; return f;
} }
return 0; return NULL;
} }
/* Can't use the loopback template for this: /* Can't use the loopback template for this:
@ -876,7 +876,7 @@ void radeonVtxfmtInitChoosers( GLvertexformat *vfmt )
static struct dynfn *codegen_noop( GLcontext *ctx, int key ) static struct dynfn *codegen_noop( GLcontext *ctx, int key )
{ {
(void) ctx; (void) key; (void) ctx; (void) key;
return 0; return NULL;
} }
void radeonInitCodegen( struct dfn_generators *gen, GLboolean useCodegen ) void radeonInitCodegen( struct dfn_generators *gen, GLboolean useCodegen )

4
src/mesa/drivers/dri/radeon/radeon_vtxfmt_sse.c
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@ -131,7 +131,7 @@ static struct dynfn *radeon_makeSSENormal3f( GLcontext *ctx, int key )
static struct dynfn *radeon_makeSSEColor3fv( GLcontext *ctx, int key ) static struct dynfn *radeon_makeSSEColor3fv( GLcontext *ctx, int key )
{ {
if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA)) if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA))
return 0; return NULL;
else else
{ {
radeonContextPtr rmesa = RADEON_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
@ -144,7 +144,7 @@ static struct dynfn *radeon_makeSSEColor3fv( GLcontext *ctx, int key )
static struct dynfn *radeon_makeSSEColor3f( GLcontext *ctx, int key ) static struct dynfn *radeon_makeSSEColor3f( GLcontext *ctx, int key )
{ {
if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA)) if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA))
return 0; return NULL;
else else
{ {
radeonContextPtr rmesa = RADEON_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx);

6
src/mesa/drivers/dri/radeon/radeon_vtxfmt_x86.c
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@ -303,14 +303,14 @@ struct dynfn *radeon_makeX86Color4ub( GLcontext *ctx, int key )
return dfn; return dfn;
} }
else else
return 0; return NULL;
} }
struct dynfn *radeon_makeX86Color3fv( GLcontext *ctx, int key ) struct dynfn *radeon_makeX86Color3fv( GLcontext *ctx, int key )
{ {
if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA)) if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA))
return 0; return NULL;
else else
{ {
radeonContextPtr rmesa = RADEON_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
@ -323,7 +323,7 @@ struct dynfn *radeon_makeX86Color3fv( GLcontext *ctx, int key )
struct dynfn *radeon_makeX86Color3f( GLcontext *ctx, int key ) struct dynfn *radeon_makeX86Color3f( GLcontext *ctx, int key )
{ {
if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA)) if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA))
return 0; return NULL;
else else
{ {
radeonContextPtr rmesa = RADEON_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx);