anv: Implement vkCmdDrawIndirectByteCountEXT
Annoyingly, this requires that we implement integer division on the command streamer. Fortunately, we're only ever dividing by constants so we can use the mulh+add+shift trick and it's not as bad as it sounds. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
This commit is contained in:
Jason Ekstrand
parent
36ee2fd61c
commit
2be89cbd82
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@ -1308,7 +1308,7 @@ void anv_GetPhysicalDeviceProperties2(
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props->transformFeedbackQueries = VK_FALSE;
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props->transformFeedbackStreamsLinesTriangles = VK_FALSE;
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props->transformFeedbackRasterizationStreamSelect = VK_FALSE;
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props->transformFeedbackDraw = VK_FALSE;
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props->transformFeedbackDraw = VK_TRUE;
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break;
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}
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@ -27,6 +27,7 @@
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#include "anv_private.h"
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#include "vk_format_info.h"
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#include "vk_util.h"
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#include "util/fast_idiv_by_const.h"
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#include "common/gen_l3_config.h"
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#include "genxml/gen_macros.h"
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@ -2959,8 +2960,154 @@ emit_mul_gpr0(struct anv_batch *batch, uint32_t N)
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build_alu_multiply_gpr0(dw + 1, &num_dwords, N);
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}
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static void
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emit_alu_add(struct anv_batch *batch, unsigned dst_reg,
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unsigned reg_a, unsigned reg_b)
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{
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uint32_t *dw = anv_batch_emitn(batch, 1 + 4, GENX(MI_MATH));
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dw[1] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCA, reg_a);
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dw[2] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCB, reg_b);
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dw[3] = mi_alu(MI_ALU_ADD, 0, 0);
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dw[4] = mi_alu(MI_ALU_STORE, dst_reg, MI_ALU_ACCU);
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}
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static void
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emit_add32_gpr0(struct anv_batch *batch, uint32_t N)
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{
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emit_lri(batch, CS_GPR(1), N);
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emit_alu_add(batch, MI_ALU_REG0, MI_ALU_REG0, MI_ALU_REG1);
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}
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static void
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emit_alu_shl(struct anv_batch *batch, unsigned dst_reg,
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unsigned src_reg, unsigned shift)
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{
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assert(shift > 0);
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uint32_t *dw = anv_batch_emitn(batch, 1 + 4 * shift, GENX(MI_MATH));
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for (unsigned i = 0; i < shift; i++) {
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unsigned add_src = (i == 0) ? src_reg : dst_reg;
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dw[1 + (i * 4) + 0] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCA, add_src);
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dw[1 + (i * 4) + 1] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCB, add_src);
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dw[1 + (i * 4) + 2] = mi_alu(MI_ALU_ADD, 0, 0);
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dw[1 + (i * 4) + 3] = mi_alu(MI_ALU_STORE, dst_reg, MI_ALU_ACCU);
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}
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}
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static void
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emit_div32_gpr0(struct anv_batch *batch, uint32_t D)
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{
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/* Zero out the top of GPR0 */
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emit_lri(batch, CS_GPR(0) + 4, 0);
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if (D == 0) {
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/* This invalid, but we should do something so we set GPR0 to 0. */
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emit_lri(batch, CS_GPR(0), 0);
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} else if (util_is_power_of_two_or_zero(D)) {
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unsigned log2_D = util_logbase2(D);
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assert(log2_D < 32);
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/* We right-shift by log2(D) by left-shifting by 32 - log2(D) and taking
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* the top 32 bits of the result.
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*/
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emit_alu_shl(batch, MI_ALU_REG0, MI_ALU_REG0, 32 - log2_D);
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emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
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emit_lri(batch, CS_GPR(0) + 4, 0);
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} else {
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struct util_fast_udiv_info m = util_compute_fast_udiv_info(D, 32, 32);
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assert(m.multiplier <= UINT32_MAX);
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if (m.pre_shift) {
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/* We right-shift by L by left-shifting by 32 - l and taking the top
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* 32 bits of the result.
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*/
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if (m.pre_shift < 32)
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emit_alu_shl(batch, MI_ALU_REG0, MI_ALU_REG0, 32 - m.pre_shift);
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emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
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emit_lri(batch, CS_GPR(0) + 4, 0);
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}
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/* Do the 32x32 multiply into gpr0 */
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emit_mul_gpr0(batch, m.multiplier);
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if (m.increment) {
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/* If we need to increment, save off a copy of GPR0 */
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emit_lri(batch, CS_GPR(1) + 0, m.multiplier);
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emit_lri(batch, CS_GPR(1) + 4, 0);
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emit_alu_add(batch, MI_ALU_REG0, MI_ALU_REG0, MI_ALU_REG1);
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}
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/* Shift by 32 */
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emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
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emit_lri(batch, CS_GPR(0) + 4, 0);
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if (m.post_shift) {
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/* We right-shift by L by left-shifting by 32 - l and taking the top
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* 32 bits of the result.
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*/
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if (m.post_shift < 32)
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emit_alu_shl(batch, MI_ALU_REG0, MI_ALU_REG0, 32 - m.post_shift);
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emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
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emit_lri(batch, CS_GPR(0) + 4, 0);
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}
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}
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}
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#endif /* GEN_IS_HASWELL || GEN_GEN >= 8 */
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void genX(CmdDrawIndirectByteCountEXT)(
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VkCommandBuffer commandBuffer,
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uint32_t instanceCount,
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uint32_t firstInstance,
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VkBuffer counterBuffer,
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VkDeviceSize counterBufferOffset,
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uint32_t counterOffset,
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uint32_t vertexStride)
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{
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#if GEN_IS_HASWELL || GEN_GEN >= 8
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
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ANV_FROM_HANDLE(anv_buffer, counter_buffer, counterBuffer);
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struct anv_pipeline *pipeline = cmd_buffer->state.gfx.base.pipeline;
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const struct brw_vs_prog_data *vs_prog_data = get_vs_prog_data(pipeline);
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/* firstVertex is always zero for this draw function */
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const uint32_t firstVertex = 0;
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if (anv_batch_has_error(&cmd_buffer->batch))
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return;
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genX(cmd_buffer_flush_state)(cmd_buffer);
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if (vs_prog_data->uses_firstvertex ||
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vs_prog_data->uses_baseinstance)
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emit_base_vertex_instance(cmd_buffer, firstVertex, firstInstance);
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if (vs_prog_data->uses_drawid)
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emit_draw_index(cmd_buffer, 0);
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/* Our implementation of VK_KHR_multiview uses instancing to draw the
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* different views. We need to multiply instanceCount by the view count.
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*/
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instanceCount *= anv_subpass_view_count(cmd_buffer->state.subpass);
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emit_lrm(&cmd_buffer->batch, CS_GPR(0),
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anv_address_add(counter_buffer->address, counterBufferOffset));
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if (counterOffset)
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emit_add32_gpr0(&cmd_buffer->batch, -counterOffset);
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emit_div32_gpr0(&cmd_buffer->batch, vertexStride);
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emit_lrr(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, CS_GPR(0));
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emit_lri(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, firstVertex);
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emit_lri(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, instanceCount);
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emit_lri(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, firstInstance);
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emit_lri(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, 0);
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anv_batch_emit(&cmd_buffer->batch, GENX(3DPRIMITIVE), prim) {
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prim.IndirectParameterEnable = true;
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prim.VertexAccessType = SEQUENTIAL;
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prim.PrimitiveTopologyType = pipeline->topology;
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}
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#endif /* GEN_IS_HASWELL || GEN_GEN >= 8 */
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}
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static void
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load_indirect_parameters(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address addr,
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