ac/nir: fix 64-bit division for GL CTS
This fixes: KHR-GL45.gpu_shader_fp64.builtin.mod_*
Fixes: ba2ec1f3
"ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv()"
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5531>
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@ -705,6 +705,11 @@ ac_build_fdiv(struct ac_llvm_context *ctx,
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unsigned type_size = ac_get_type_size(LLVMTypeOf(den));
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const char *name;
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/* For doubles, we need precise division to pass GLCTS. */
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if (ctx->float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
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type_size == 8)
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return LLVMBuildFDiv(ctx->builder, num, den, "");
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if (type_size == 2)
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name = "llvm.amdgcn.rcp.f16";
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else if (type_size == 4)
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@ -704,8 +704,15 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
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result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
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break;
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case nir_op_frcp:
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result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
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ac_to_float_type(&ctx->ac, def_type), src[0]);
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/* For doubles, we need precise division to pass GLCTS. */
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if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
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ac_get_type_size(def_type) == 8) {
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result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
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ac_to_float(&ctx->ac, src[0]), "");
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} else {
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result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
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ac_to_float_type(&ctx->ac, def_type), src[0]);
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}
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break;
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case nir_op_iand:
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result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
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