anv: implement VK_INTEL_performance_query
v2: Introduce the appropriate pipe controls
Properly deal with changes in metric sets (using execbuf parameter)
Record marker at query end
v3: Fill out PerfCntr1&2
v4: Introduce vkUninitializePerformanceApiINTEL
v5: Use new execbuf extension mechanism
v6: Fix comments in genX_query.c (Rafael)
Use PIPE_CONTROL workarounds (Rafael)
Refactor on the last kernel series update (Lionel)
v7: Only I915_PERF_IOCTL_CONFIG when perf stream is already opened (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
This commit is contained in:
Lionel Landwerlin
parent
5ba6d9941b
commit
2b5f30b1d9
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@ -305,6 +305,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
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libmesa_compiler \
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libmesa_intel_common \
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libmesa_intel_dev \
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libmesa_intel_perf \
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libmesa_vulkan_common \
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libmesa_vulkan_util \
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libmesa_anv_gen7 \
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@ -259,6 +259,7 @@ VULKAN_FILES := \
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vulkan/anv_nir_lower_push_constants.c \
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vulkan/anv_nir_lower_ycbcr_textures.c \
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vulkan/anv_pass.c \
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vulkan/anv_perf.c \
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vulkan/anv_pipeline.c \
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vulkan/anv_pipeline_cache.c \
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vulkan/anv_private.h \
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@ -604,6 +604,8 @@ anv_physical_device_init(struct anv_physical_device *device,
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goto fail;
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}
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device->perf = anv_get_perf(&device->info, fd);
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anv_physical_device_get_supported_extensions(device,
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&device->supported_extensions);
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@ -625,6 +627,7 @@ anv_physical_device_finish(struct anv_physical_device *device)
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anv_finish_wsi(device);
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anv_physical_device_free_disk_cache(device);
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ralloc_free(device->compiler);
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ralloc_free(device->perf);
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close(device->local_fd);
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if (device->master_fd >= 0)
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close(device->master_fd);
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@ -2657,6 +2660,8 @@ VkResult anv_CreateDevice(
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anv_device_init_border_colors(device);
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anv_device_perf_init(device);
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*pDevice = anv_device_to_handle(device);
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return VK_SUCCESS;
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@ -165,6 +165,7 @@ EXTENSIONS = [
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Extension('VK_ANDROID_native_buffer', 7, 'ANDROID'),
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Extension('VK_GOOGLE_decorate_string', 1, True),
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Extension('VK_GOOGLE_hlsl_functionality1', 1, True),
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Extension('VK_INTEL_performance_query', 1, 'device->perf'),
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Extension('VK_NV_compute_shader_derivatives', 1, True),
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]
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@ -0,0 +1,224 @@
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/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include "anv_private.h"
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#include "perf/gen_perf.h"
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#include "perf/gen_perf_mdapi.h"
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struct gen_perf_config *
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anv_get_perf(const struct gen_device_info *devinfo, int fd)
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{
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struct gen_perf_config *perf = gen_perf_new(NULL);
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gen_perf_init_metrics(perf, devinfo, fd);
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/* We need DRM_I915_PERF_PROP_HOLD_PREEMPTION support, only available in
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* perf revision 2.
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*/
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if (anv_gem_get_param(fd, I915_PARAM_PERF_REVISION) < 3)
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goto err;
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return perf;
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err:
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ralloc_free(perf);
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return NULL;
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}
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void
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anv_device_perf_init(struct anv_device *device)
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{
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device->perf_fd = -1;
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}
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static int
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anv_device_perf_open(struct anv_device *device, uint64_t metric_id)
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{
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uint64_t properties[DRM_I915_PERF_PROP_MAX * 2];
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struct drm_i915_perf_open_param param;
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int p = 0, stream_fd;
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properties[p++] = DRM_I915_PERF_PROP_SAMPLE_OA;
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properties[p++] = true;
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properties[p++] = DRM_I915_PERF_PROP_OA_METRICS_SET;
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properties[p++] = metric_id;
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properties[p++] = DRM_I915_PERF_PROP_OA_FORMAT;
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properties[p++] = device->info.gen >= 8 ?
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I915_OA_FORMAT_A32u40_A4u32_B8_C8 :
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I915_OA_FORMAT_A45_B8_C8;
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properties[p++] = DRM_I915_PERF_PROP_OA_EXPONENT;
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properties[p++] = 31; /* slowest sampling period */
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properties[p++] = DRM_I915_PERF_PROP_CTX_HANDLE;
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properties[p++] = device->context_id;
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properties[p++] = DRM_I915_PERF_PROP_HOLD_PREEMPTION;
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properties[p++] = true;
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memset(¶m, 0, sizeof(param));
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param.flags = 0;
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param.flags |= I915_PERF_FLAG_FD_CLOEXEC | I915_PERF_FLAG_FD_NONBLOCK;
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param.properties_ptr = (uintptr_t)properties;
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param.num_properties = p / 2;
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stream_fd = gen_ioctl(device->fd, DRM_IOCTL_I915_PERF_OPEN, ¶m);
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return stream_fd;
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}
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VkResult anv_InitializePerformanceApiINTEL(
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VkDevice _device,
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const VkInitializePerformanceApiInfoINTEL* pInitializeInfo)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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const struct anv_physical_device *pdevice = &device->instance->physicalDevice;
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if (!pdevice->perf)
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return VK_ERROR_EXTENSION_NOT_PRESENT;
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/* Not much to do here */
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return VK_SUCCESS;
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}
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VkResult anv_GetPerformanceParameterINTEL(
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VkDevice _device,
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VkPerformanceParameterTypeINTEL parameter,
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VkPerformanceValueINTEL* pValue)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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const struct anv_physical_device *pdevice = &device->instance->physicalDevice;
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if (!pdevice->perf)
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return VK_ERROR_EXTENSION_NOT_PRESENT;
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VkResult result = VK_SUCCESS;
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switch (parameter) {
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case VK_PERFORMANCE_PARAMETER_TYPE_HW_COUNTERS_SUPPORTED_INTEL:
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pValue->type = VK_PERFORMANCE_VALUE_TYPE_BOOL_INTEL;
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pValue->data.valueBool = VK_TRUE;
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break;
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case VK_PERFORMANCE_PARAMETER_TYPE_STREAM_MARKER_VALID_BITS_INTEL:
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pValue->type = VK_PERFORMANCE_VALUE_TYPE_UINT32_INTEL;
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pValue->data.value32 = 25;
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break;
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default:
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result = VK_ERROR_FEATURE_NOT_PRESENT;
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break;
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}
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return result;
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}
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VkResult anv_CmdSetPerformanceMarkerINTEL(
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VkCommandBuffer commandBuffer,
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const VkPerformanceMarkerInfoINTEL* pMarkerInfo)
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{
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
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cmd_buffer->intel_perf_marker = pMarkerInfo->marker;
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return VK_SUCCESS;
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}
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VkResult anv_AcquirePerformanceConfigurationINTEL(
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VkDevice _device,
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const VkPerformanceConfigurationAcquireInfoINTEL* pAcquireInfo,
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VkPerformanceConfigurationINTEL* pConfiguration)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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const struct anv_physical_device *pdevice = &device->instance->physicalDevice;
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struct gen_perf_registers *perf_config =
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gen_perf_load_configuration(pdevice->perf, device->fd,
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GEN_PERF_QUERY_GUID_MDAPI);
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if (!perf_config)
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return VK_INCOMPLETE;
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int ret = gen_perf_store_configuration(pdevice->perf, device->fd,
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perf_config, NULL /* guid */);
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if (ret < 0) {
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ralloc_free(perf_config);
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return VK_INCOMPLETE;
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}
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*pConfiguration = (VkPerformanceConfigurationINTEL) (uint64_t) ret;
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return VK_SUCCESS;
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}
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VkResult anv_ReleasePerformanceConfigurationINTEL(
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VkDevice _device,
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VkPerformanceConfigurationINTEL _configuration)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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uint64_t config = (uint64_t) _configuration;
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gen_ioctl(device->fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG, &config);
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return VK_SUCCESS;
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}
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VkResult anv_QueueSetPerformanceConfigurationINTEL(
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VkQueue _queue,
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VkPerformanceConfigurationINTEL _configuration)
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{
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ANV_FROM_HANDLE(anv_queue, queue, _queue);
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struct anv_device *device = queue->device;
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uint64_t configuration = (uint64_t) _configuration;
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if (device->perf_fd < 0) {
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device->perf_fd = anv_device_perf_open(device, configuration);
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if (device->perf_fd < 0)
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return VK_ERROR_INITIALIZATION_FAILED;
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} else {
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int ret = gen_ioctl(device->perf_fd, I915_PERF_IOCTL_CONFIG,
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(void *)(uintptr_t) _configuration);
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if (ret < 0) {
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return anv_device_set_lost(device,
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"i915-perf config failed: %s",
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strerror(ret));
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}
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}
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return VK_SUCCESS;
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}
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void anv_UninitializePerformanceApiINTEL(
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VkDevice _device)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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if (device->perf_fd >= 0) {
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close(device->perf_fd);
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device->perf_fd = -1;
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}
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}
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@ -74,6 +74,7 @@ struct anv_image_view;
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struct anv_instance;
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struct gen_l3_config;
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struct gen_perf_config;
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#include <vulkan/vulkan.h>
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#include <vulkan/vulkan_intel.h>
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@ -948,6 +949,7 @@ struct anv_physical_device {
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bool supports_48bit_addresses;
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struct brw_compiler * compiler;
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struct isl_device isl_dev;
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struct gen_perf_config * perf;
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int cmd_parser_version;
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bool has_exec_async;
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bool has_exec_capture;
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@ -1169,6 +1171,9 @@ struct anv_device {
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* the cmd_buffer's list.
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*/
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struct anv_cmd_buffer *cmd_buffer_being_decoded;
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int perf_fd; /* -1 if no opened */
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uint64_t perf_metric; /* 0 if unset */
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};
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static inline struct anv_state_pool *
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@ -2530,6 +2535,9 @@ struct anv_cmd_buffer {
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VkCommandBufferLevel level;
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struct anv_cmd_state state;
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/* Set by SetPerformanceMarkerINTEL, written into queries by CmdBeginQuery */
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uint64_t intel_perf_marker;
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};
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VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
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@ -3750,6 +3758,9 @@ anv_get_subpass_id(const struct anv_cmd_state * const cmd_state)
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return subpass_id;
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}
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struct gen_perf_config *anv_get_perf(const struct gen_device_info *devinfo, int fd);
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void anv_device_perf_init(struct anv_device *device);
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#define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
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\
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static inline struct __anv_type * \
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|
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@ -5091,3 +5091,57 @@ void genX(CmdWaitEvents)(
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bufferMemoryBarrierCount, pBufferMemoryBarriers,
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imageMemoryBarrierCount, pImageMemoryBarriers);
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}
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VkResult genX(CmdSetPerformanceOverrideINTEL)(
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VkCommandBuffer commandBuffer,
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const VkPerformanceOverrideInfoINTEL* pOverrideInfo)
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{
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ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
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switch (pOverrideInfo->type) {
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case VK_PERFORMANCE_OVERRIDE_TYPE_NULL_HARDWARE_INTEL: {
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uint32_t dw;
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#if GEN_GEN >= 9
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anv_pack_struct(&dw, GENX(CS_DEBUG_MODE2),
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._3DRenderingInstructionDisable = pOverrideInfo->enable,
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.MediaInstructionDisable = pOverrideInfo->enable,
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._3DRenderingInstructionDisableMask = true,
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.MediaInstructionDisableMask = true);
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emit_lri(&cmd_buffer->batch, GENX(CS_DEBUG_MODE2_num), dw);
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#else
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anv_pack_struct(&dw, GENX(INSTPM),
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._3DRenderingInstructionDisable = pOverrideInfo->enable,
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.MediaInstructionDisable = pOverrideInfo->enable,
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._3DRenderingInstructionDisableMask = true,
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.MediaInstructionDisableMask = true);
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emit_lri(&cmd_buffer->batch, GENX(INSTPM_num), dw);
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#endif
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break;
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}
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case VK_PERFORMANCE_OVERRIDE_TYPE_FLUSH_GPU_CACHES_INTEL:
|
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if (pOverrideInfo->enable) {
|
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/* FLUSH ALL THE THINGS! As requested by the MDAPI team. */
|
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cmd_buffer->state.pending_pipe_bits |=
|
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ANV_PIPE_FLUSH_BITS |
|
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ANV_PIPE_INVALIDATE_BITS;
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genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
|
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}
|
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break;
|
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|
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default:
|
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unreachable("Invalid override");
|
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}
|
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|
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return VK_SUCCESS;
|
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}
|
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|
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VkResult genX(CmdSetPerformanceStreamMarkerINTEL)(
|
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VkCommandBuffer commandBuffer,
|
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const VkPerformanceStreamMarkerInfoINTEL* pMarkerInfo)
|
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{
|
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/* TODO: Waiting on the register to write, might depend on generation. */
|
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return VK_SUCCESS;
|
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}
|
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|
|
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|||
|
|
@ -37,6 +37,10 @@
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|||
#define __gen_get_batch_dwords anv_batch_emit_dwords
|
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#define __gen_address_offset anv_address_add
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#include "common/gen_mi_builder.h"
|
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#include "perf/gen_perf.h"
|
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#include "perf/gen_perf_mdapi.h"
|
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|
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#define OA_REPORT_N_UINT64 (256 / sizeof(uint64_t))
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|
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VkResult genX(CreateQueryPool)(
|
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VkDevice _device,
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|
|
@ -52,9 +56,14 @@ VkResult genX(CreateQueryPool)(
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|||
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
|
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||||
/* Query pool slots are made up of some number of 64-bit values packed
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* tightly together. The first 64-bit value is always the "available" bit
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* which is 0 when the query is unavailable and 1 when it is available.
|
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* The 64-bit values that follow are determined by the type of query.
|
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* tightly together. For most query types have the first 64-bit value is
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* the "available" bit which is 0 when the query is unavailable and 1 when
|
||||
* it is available. The 64-bit values that follow are determined by the
|
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* type of query.
|
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*
|
||||
* For performance queries, we have a requirement to align OA reports at
|
||||
* 64bytes so we put those first and have the "available" bit behind
|
||||
* together with some other counters.
|
||||
*/
|
||||
uint32_t uint64s_per_slot = 1;
|
||||
|
||||
|
|
@ -84,6 +93,15 @@ VkResult genX(CreateQueryPool)(
|
|||
*/
|
||||
uint64s_per_slot += 4;
|
||||
break;
|
||||
case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL: {
|
||||
uint64s_per_slot = 2 * OA_REPORT_N_UINT64; /* begin & end OA reports */
|
||||
uint64s_per_slot += 4; /* PerfCounter 1 & 2 */
|
||||
uint64s_per_slot++; /* 2 * 32bit RPSTAT register */
|
||||
uint64s_per_slot++; /* 64bit marker */
|
||||
uint64s_per_slot++; /* availability */
|
||||
uint64s_per_slot = align_u32(uint64s_per_slot, 8); /* OA reports must be aligned to 64 bytes */
|
||||
break;
|
||||
}
|
||||
default:
|
||||
assert(!"Invalid query type");
|
||||
}
|
||||
|
|
@ -160,6 +178,57 @@ anv_query_address(struct anv_query_pool *pool, uint32_t query)
|
|||
};
|
||||
}
|
||||
|
||||
/**
|
||||
* VK_INTEL_performance_query layout:
|
||||
*
|
||||
* ------------------------------
|
||||
* | end MI_RPC (256b) |
|
||||
* |----------------------------|
|
||||
* | begin MI_RPC (256b) |
|
||||
* |----------------------------|
|
||||
* | begin perfcntr 1 & 2 (16b) |
|
||||
* |----------------------------|
|
||||
* | end perfcntr 1 & 2 (16b) |
|
||||
* |----------------------------|
|
||||
* | begin RPSTAT register (4b) |
|
||||
* |----------------------------|
|
||||
* | end RPSTAT register (4b) |
|
||||
* |----------------------------|
|
||||
* | marker (8b) |
|
||||
* |----------------------------|
|
||||
* | availability (8b) |
|
||||
* ------------------------------
|
||||
*/
|
||||
|
||||
static uint32_t
|
||||
intel_perf_mi_rpc_offset(bool end)
|
||||
{
|
||||
return end ? 0 : 256;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
intel_perf_counter(bool end)
|
||||
{
|
||||
uint32_t offset = 512;
|
||||
offset += end ? 2 * sizeof(uint64_t) : 0;
|
||||
return offset;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
intel_perf_rpstart_offset(bool end)
|
||||
{
|
||||
uint32_t offset = intel_perf_counter(false) +
|
||||
4 * sizeof(uint64_t);
|
||||
offset += end ? sizeof(uint32_t) : 0;
|
||||
return offset;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
intel_perf_marker_offset(void)
|
||||
{
|
||||
return intel_perf_rpstart_offset(false) + sizeof(uint64_t);
|
||||
}
|
||||
|
||||
static void
|
||||
cpu_write_query_result(void *dst_slot, VkQueryResultFlags flags,
|
||||
uint32_t value_index, uint64_t result)
|
||||
|
|
@ -173,18 +242,28 @@ cpu_write_query_result(void *dst_slot, VkQueryResultFlags flags,
|
|||
}
|
||||
}
|
||||
|
||||
static bool
|
||||
query_is_available(uint64_t *slot)
|
||||
static void *
|
||||
query_slot(struct anv_query_pool *pool, uint32_t query)
|
||||
{
|
||||
return *(volatile uint64_t *)slot;
|
||||
return pool->bo.map + query * pool->stride;
|
||||
}
|
||||
|
||||
static bool
|
||||
query_is_available(struct anv_query_pool *pool, uint32_t query)
|
||||
{
|
||||
if (pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL) {
|
||||
return *(volatile uint64_t *)((uint8_t *)query_slot(pool, query) +
|
||||
pool->stride - 8);
|
||||
} else
|
||||
return *(volatile uint64_t *)query_slot(pool, query);
|
||||
}
|
||||
|
||||
static VkResult
|
||||
wait_for_available(struct anv_device *device,
|
||||
struct anv_query_pool *pool, uint64_t *slot)
|
||||
struct anv_query_pool *pool, uint32_t query)
|
||||
{
|
||||
while (true) {
|
||||
if (query_is_available(slot))
|
||||
if (query_is_available(pool, query))
|
||||
return VK_SUCCESS;
|
||||
|
||||
int ret = anv_gem_busy(device, pool->bo.gem_handle);
|
||||
|
|
@ -197,7 +276,7 @@ wait_for_available(struct anv_device *device,
|
|||
} else {
|
||||
assert(ret == 0);
|
||||
/* The BO is no longer busy. */
|
||||
if (query_is_available(slot)) {
|
||||
if (query_is_available(pool, query)) {
|
||||
return VK_SUCCESS;
|
||||
} else {
|
||||
VkResult status = anv_device_query_status(device);
|
||||
|
|
@ -233,7 +312,8 @@ VkResult genX(GetQueryPoolResults)(
|
|||
assert(pool->type == VK_QUERY_TYPE_OCCLUSION ||
|
||||
pool->type == VK_QUERY_TYPE_PIPELINE_STATISTICS ||
|
||||
pool->type == VK_QUERY_TYPE_TIMESTAMP ||
|
||||
pool->type == VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT);
|
||||
pool->type == VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT ||
|
||||
pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL);
|
||||
|
||||
if (anv_device_is_lost(device))
|
||||
return VK_ERROR_DEVICE_LOST;
|
||||
|
|
@ -245,13 +325,10 @@ VkResult genX(GetQueryPoolResults)(
|
|||
|
||||
VkResult status = VK_SUCCESS;
|
||||
for (uint32_t i = 0; i < queryCount; i++) {
|
||||
uint64_t *slot = pool->bo.map + (firstQuery + i) * pool->stride;
|
||||
|
||||
/* Availability is always at the start of the slot */
|
||||
bool available = slot[0];
|
||||
bool available = query_is_available(pool, firstQuery + i);
|
||||
|
||||
if (!available && (flags & VK_QUERY_RESULT_WAIT_BIT)) {
|
||||
status = wait_for_available(device, pool, slot);
|
||||
status = wait_for_available(device, pool, firstQuery + i);
|
||||
if (status != VK_SUCCESS)
|
||||
return status;
|
||||
|
||||
|
|
@ -271,13 +348,16 @@ VkResult genX(GetQueryPoolResults)(
|
|||
|
||||
uint32_t idx = 0;
|
||||
switch (pool->type) {
|
||||
case VK_QUERY_TYPE_OCCLUSION:
|
||||
case VK_QUERY_TYPE_OCCLUSION: {
|
||||
uint64_t *slot = query_slot(pool, firstQuery + i);
|
||||
if (write_results)
|
||||
cpu_write_query_result(pData, flags, idx, slot[2] - slot[1]);
|
||||
idx++;
|
||||
break;
|
||||
}
|
||||
|
||||
case VK_QUERY_TYPE_PIPELINE_STATISTICS: {
|
||||
uint64_t *slot = query_slot(pool, firstQuery + i);
|
||||
uint32_t statistics = pool->pipeline_statistics;
|
||||
while (statistics) {
|
||||
uint32_t stat = u_bit_scan(&statistics);
|
||||
|
|
@ -297,7 +377,8 @@ VkResult genX(GetQueryPoolResults)(
|
|||
break;
|
||||
}
|
||||
|
||||
case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT:
|
||||
case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT: {
|
||||
uint64_t *slot = query_slot(pool, firstQuery + i);
|
||||
if (write_results)
|
||||
cpu_write_query_result(pData, flags, idx, slot[2] - slot[1]);
|
||||
idx++;
|
||||
|
|
@ -305,12 +386,54 @@ VkResult genX(GetQueryPoolResults)(
|
|||
cpu_write_query_result(pData, flags, idx, slot[4] - slot[3]);
|
||||
idx++;
|
||||
break;
|
||||
}
|
||||
|
||||
case VK_QUERY_TYPE_TIMESTAMP:
|
||||
case VK_QUERY_TYPE_TIMESTAMP: {
|
||||
uint64_t *slot = query_slot(pool, firstQuery + i);
|
||||
if (write_results)
|
||||
cpu_write_query_result(pData, flags, idx, slot[1]);
|
||||
idx++;
|
||||
break;
|
||||
}
|
||||
|
||||
case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL: {
|
||||
if (!write_results)
|
||||
break;
|
||||
const void *query_data = query_slot(pool, firstQuery + i);
|
||||
const uint32_t *oa_begin = query_data + intel_perf_mi_rpc_offset(false);
|
||||
const uint32_t *oa_end = query_data + intel_perf_mi_rpc_offset(true);
|
||||
const uint32_t *rpstat_begin = query_data + intel_perf_rpstart_offset(false);
|
||||
const uint32_t *rpstat_end = query_data + intel_perf_mi_rpc_offset(true);
|
||||
struct gen_perf_query_result result;
|
||||
struct gen_perf_query_info metric = {
|
||||
.oa_format = (GEN_GEN >= 8 ?
|
||||
I915_OA_FORMAT_A32u40_A4u32_B8_C8 :
|
||||
I915_OA_FORMAT_A45_B8_C8),
|
||||
};
|
||||
uint32_t core_freq[2];
|
||||
#if GEN_GEN < 9
|
||||
core_freq[0] = ((*rpstat_begin >> 7) & 0x7f) * 1000000ULL;
|
||||
core_freq[1] = ((*rpstat_end >> 7) & 0x7f) * 1000000ULL;
|
||||
#else
|
||||
core_freq[0] = ((*rpstat_begin >> 23) & 0x1ff) * 1000000ULL;
|
||||
core_freq[1] = ((*rpstat_end >> 23) & 0x1ff) * 1000000ULL;
|
||||
#endif
|
||||
gen_perf_query_result_clear(&result);
|
||||
gen_perf_query_result_accumulate(&result, &metric,
|
||||
oa_begin, oa_end);
|
||||
gen_perf_query_result_read_frequencies(&result, &device->info,
|
||||
oa_begin, oa_end);
|
||||
gen_perf_query_result_write_mdapi(pData, stride,
|
||||
&device->info,
|
||||
&result,
|
||||
core_freq[0], core_freq[1]);
|
||||
gen_perf_query_mdapi_write_perfcntr(pData, stride, &device->info,
|
||||
query_data + intel_perf_counter(false),
|
||||
query_data + intel_perf_counter(true));
|
||||
const uint64_t *marker = query_data + intel_perf_marker_offset();
|
||||
gen_perf_query_mdapi_write_marker(pData, stride, &device->info, *marker);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
unreachable("invalid pool type");
|
||||
|
|
@ -406,6 +529,16 @@ emit_zero_queries(struct anv_cmd_buffer *cmd_buffer,
|
|||
}
|
||||
break;
|
||||
|
||||
case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL:
|
||||
for (uint32_t i = 0; i < num_queries; i++) {
|
||||
struct anv_address slot_addr =
|
||||
anv_query_address(pool, first_index + i);
|
||||
gen_mi_memset(b, slot_addr, 0, pool->stride - 8);
|
||||
emit_query_mi_availability(b, anv_address_add(slot_addr,
|
||||
pool->stride - 8), true);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
unreachable("Unsupported query type");
|
||||
}
|
||||
|
|
@ -440,6 +573,21 @@ void genX(CmdResetQueryPool)(
|
|||
break;
|
||||
}
|
||||
|
||||
case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL: {
|
||||
struct gen_mi_builder b;
|
||||
gen_mi_builder_init(&b, &cmd_buffer->batch);
|
||||
|
||||
for (uint32_t i = 0; i < queryCount; i++) {
|
||||
emit_query_mi_availability(
|
||||
&b,
|
||||
anv_address_add(
|
||||
anv_query_address(pool, firstQuery + i),
|
||||
pool->stride - 8),
|
||||
false);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
unreachable("Unsupported query type");
|
||||
}
|
||||
|
|
@ -550,6 +698,37 @@ void genX(CmdBeginQueryIndexedEXT)(
|
|||
emit_xfb_query(&b, index, anv_address_add(query_addr, 8));
|
||||
break;
|
||||
|
||||
case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL: {
|
||||
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
|
||||
pc.CommandStreamerStallEnable = true;
|
||||
pc.StallAtPixelScoreboard = true;
|
||||
}
|
||||
anv_batch_emit(&cmd_buffer->batch, GENX(MI_REPORT_PERF_COUNT), rpc) {
|
||||
rpc.MemoryAddress =
|
||||
anv_address_add(query_addr, intel_perf_mi_rpc_offset(false));
|
||||
}
|
||||
#if GEN_GEN < 9
|
||||
gen_mi_store(&b,
|
||||
gen_mi_mem32(anv_address_add(query_addr,
|
||||
intel_perf_rpstart_offset(false))),
|
||||
gen_mi_reg32(GENX(RPSTAT1_num)));
|
||||
#else
|
||||
gen_mi_store(&b,
|
||||
gen_mi_mem32(anv_address_add(query_addr,
|
||||
intel_perf_rpstart_offset(false))),
|
||||
gen_mi_reg32(GENX(RPSTAT0_num)));
|
||||
#endif
|
||||
#if GEN_GEN >= 8 && GEN_GEN <= 11
|
||||
gen_mi_store(&b, gen_mi_mem64(anv_address_add(query_addr,
|
||||
intel_perf_counter(false))),
|
||||
gen_mi_reg64(GENX(PERFCNT1_num)));
|
||||
gen_mi_store(&b, gen_mi_mem64(anv_address_add(query_addr,
|
||||
intel_perf_counter(false) + 8)),
|
||||
gen_mi_reg64(GENX(PERFCNT2_num)));
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
unreachable("");
|
||||
}
|
||||
|
|
@ -611,6 +790,45 @@ void genX(CmdEndQueryIndexedEXT)(
|
|||
emit_query_mi_availability(&b, query_addr, true);
|
||||
break;
|
||||
|
||||
case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL: {
|
||||
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
|
||||
pc.CommandStreamerStallEnable = true;
|
||||
pc.StallAtPixelScoreboard = true;
|
||||
}
|
||||
uint32_t marker_offset = intel_perf_marker_offset();
|
||||
gen_mi_store(&b, gen_mi_mem64(anv_address_add(query_addr, marker_offset)),
|
||||
gen_mi_imm(cmd_buffer->intel_perf_marker));
|
||||
#if GEN_GEN >= 8 && GEN_GEN <= 11
|
||||
gen_mi_store(&b, gen_mi_mem64(anv_address_add(query_addr, intel_perf_counter(true))),
|
||||
gen_mi_reg64(GENX(PERFCNT1_num)));
|
||||
gen_mi_store(&b, gen_mi_mem64(anv_address_add(query_addr, intel_perf_counter(true) + 8)),
|
||||
gen_mi_reg64(GENX(PERFCNT2_num)));
|
||||
#endif
|
||||
#if GEN_GEN < 9
|
||||
gen_mi_store(&b,
|
||||
gen_mi_mem32(anv_address_add(query_addr,
|
||||
intel_perf_rpstart_offset(true))),
|
||||
gen_mi_reg32(GENX(RPSTAT1_num)));
|
||||
#else
|
||||
gen_mi_store(&b,
|
||||
gen_mi_mem32(anv_address_add(query_addr,
|
||||
intel_perf_rpstart_offset(true))),
|
||||
gen_mi_reg32(GENX(RPSTAT0_num)));
|
||||
#endif
|
||||
/* Position the last OA snapshot at the beginning of the query so that
|
||||
* we can tell whether it's ready.
|
||||
*/
|
||||
anv_batch_emit(&cmd_buffer->batch, GENX(MI_REPORT_PERF_COUNT), rpc) {
|
||||
rpc.MemoryAddress = anv_address_add(query_addr,
|
||||
intel_perf_mi_rpc_offset(true));
|
||||
rpc.ReportID = 0xdeadbeef; /* This goes in the first dword */
|
||||
}
|
||||
emit_query_mi_availability(&b,
|
||||
anv_address_add(query_addr, pool->stride - 8),
|
||||
true);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
unreachable("");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -118,6 +118,7 @@ libanv_files = files(
|
|||
'anv_nir_lower_push_constants.c',
|
||||
'anv_nir_lower_ycbcr_textures.c',
|
||||
'anv_pass.c',
|
||||
'anv_perf.c',
|
||||
'anv_pipeline.c',
|
||||
'anv_pipeline_cache.c',
|
||||
'anv_private.h',
|
||||
|
|
@ -194,6 +195,7 @@ libvulkan_intel = shared_library(
|
|||
link_whole : [libanv_common, libanv_gen_libs],
|
||||
link_with : [
|
||||
libintel_compiler, libintel_dev, libisl, libblorp, libvulkan_wsi,
|
||||
libintel_perf,
|
||||
],
|
||||
dependencies : [
|
||||
dep_thread, dep_dl, dep_m, anv_deps, idep_libintel_common,
|
||||
|
|
@ -227,7 +229,7 @@ if with_tests
|
|||
link_whole : libanv_common,
|
||||
link_with : [
|
||||
libanv_gen_libs, libintel_compiler, libintel_common, libintel_dev,
|
||||
libisl, libblorp, libvulkan_wsi,
|
||||
libisl, libblorp, libvulkan_wsi, libintel_perf,
|
||||
],
|
||||
dependencies : [
|
||||
dep_thread, dep_dl, dep_m, anv_deps,
|
||||
|
|
|
|||
Loading…
Reference in New Issue