radeonsi: scan NIR shaders to obtain required info
v2: set num_instruction to 2, i.e. 1 + END (Marek) Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle
parent
73c7e92d3a
commit
29d7bdd179
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@ -17,6 +17,7 @@ C_SOURCES := \
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si_shader.c \
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si_shader.h \
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si_shader_internal.h \
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si_shader_nir.c \
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si_shader_tgsi_alu.c \
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si_shader_tgsi_mem.c \
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si_shader_tgsi_setup.c \
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@ -5554,6 +5554,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
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struct si_shader_selector *sel = shader->selector;
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struct lp_build_tgsi_context *bld_base = &ctx->bld_base;
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// TODO clean all this up!
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switch (ctx->type) {
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case PIPE_SHADER_VERTEX:
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ctx->load_input = declare_input_vs;
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@ -632,6 +632,10 @@ unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
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bool writes_samplemask);
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const char *si_get_shader_name(const struct si_shader *shader, unsigned processor);
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/* si_shader_nir.c */
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void si_nir_scan_shader(const struct nir_shader *nir,
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struct tgsi_shader_info *info);
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/* Inline helpers. */
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/* Return the pointer to the main shader part's pointer. */
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@ -0,0 +1,312 @@
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/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "si_shader.h"
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#include "tgsi/tgsi_from_mesa.h"
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#include "compiler/nir/nir.h"
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#include "compiler/nir_types.h"
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static void scan_instruction(struct tgsi_shader_info *info,
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nir_instr *instr)
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{
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if (instr->type == nir_instr_type_alu) {
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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switch (alu->op) {
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case nir_op_fddx:
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case nir_op_fddy:
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case nir_op_fddx_fine:
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case nir_op_fddy_fine:
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case nir_op_fddx_coarse:
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case nir_op_fddy_coarse:
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info->uses_derivatives = true;
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break;
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default:
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break;
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}
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} else if (instr->type == nir_instr_type_tex) {
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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switch (tex->op) {
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case nir_texop_tex:
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case nir_texop_txb:
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case nir_texop_lod:
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info->uses_derivatives = true;
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break;
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default:
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break;
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}
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} else if (instr->type == nir_instr_type_intrinsic) {
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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switch (intr->intrinsic) {
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case nir_intrinsic_load_front_face:
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info->uses_frontface = 1;
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break;
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case nir_intrinsic_load_instance_id:
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info->uses_instanceid = 1;
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break;
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case nir_intrinsic_load_vertex_id:
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info->uses_vertexid = 1;
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break;
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case nir_intrinsic_load_vertex_id_zero_base:
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info->uses_vertexid_nobase = 1;
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break;
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case nir_intrinsic_load_base_vertex:
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info->uses_basevertex = 1;
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break;
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case nir_intrinsic_load_primitive_id:
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info->uses_primid = 1;
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break;
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case nir_intrinsic_image_store:
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case nir_intrinsic_image_atomic_add:
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case nir_intrinsic_image_atomic_min:
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case nir_intrinsic_image_atomic_max:
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case nir_intrinsic_image_atomic_and:
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case nir_intrinsic_image_atomic_or:
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case nir_intrinsic_image_atomic_xor:
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case nir_intrinsic_image_atomic_exchange:
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case nir_intrinsic_image_atomic_comp_swap:
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_ssbo_atomic_add:
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case nir_intrinsic_ssbo_atomic_imin:
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case nir_intrinsic_ssbo_atomic_umin:
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case nir_intrinsic_ssbo_atomic_imax:
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case nir_intrinsic_ssbo_atomic_umax:
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case nir_intrinsic_ssbo_atomic_and:
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case nir_intrinsic_ssbo_atomic_or:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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info->writes_memory = true;
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break;
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default:
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break;
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}
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}
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}
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void si_nir_scan_shader(const struct nir_shader *nir,
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struct tgsi_shader_info *info)
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{
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nir_function *func;
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unsigned i;
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assert(nir->stage == MESA_SHADER_VERTEX ||
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nir->stage == MESA_SHADER_FRAGMENT);
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info->processor = pipe_shader_type_from_mesa(nir->stage);
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info->num_tokens = 2; /* indicate that the shader is non-empty */
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info->num_instructions = 2;
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info->num_inputs = nir->num_inputs;
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info->num_outputs = nir->num_outputs;
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i = 0;
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nir_foreach_variable(variable, &nir->inputs) {
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unsigned semantic_name, semantic_index;
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unsigned attrib_count = glsl_count_attribute_slots(variable->type,
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nir->stage == MESA_SHADER_VERTEX);
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assert(attrib_count == 1 && "not implemented");
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/* Vertex shader inputs don't have semantics. The state
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* tracker has already mapped them to attributes via
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* variable->data.driver_location.
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*/
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if (nir->stage == MESA_SHADER_VERTEX)
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continue;
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/* Fragment shader position is a system value. */
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if (nir->stage == MESA_SHADER_FRAGMENT &&
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variable->data.location == VARYING_SLOT_POS) {
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if (variable->data.pixel_center_integer)
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info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] =
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TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
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continue;
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}
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tgsi_get_gl_varying_semantic(variable->data.location, true,
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&semantic_name, &semantic_index);
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info->input_semantic_name[i] = semantic_name;
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info->input_semantic_index[i] = semantic_index;
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if (variable->data.sample)
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info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_SAMPLE;
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else if (variable->data.centroid)
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info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTROID;
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else
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info->input_interpolate_loc[i] = TGSI_INTERPOLATE_LOC_CENTER;
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enum glsl_base_type base_type =
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glsl_get_base_type(glsl_without_array(variable->type));
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switch (variable->data.interpolation) {
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case INTERP_MODE_NONE:
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if (glsl_base_type_is_integer(base_type)) {
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info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
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break;
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}
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if (semantic_name == TGSI_SEMANTIC_COLOR) {
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info->input_interpolate[i] = TGSI_INTERPOLATE_COLOR;
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goto persp_locations;
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}
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/* fall-through */
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case INTERP_MODE_SMOOTH:
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assert(!glsl_base_type_is_integer(base_type));
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info->input_interpolate[i] = TGSI_INTERPOLATE_PERSPECTIVE;
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persp_locations:
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if (variable->data.sample)
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info->uses_persp_sample = true;
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else if (variable->data.centroid)
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info->uses_persp_centroid = true;
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else
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info->uses_persp_center = true;
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break;
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case INTERP_MODE_NOPERSPECTIVE:
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assert(!glsl_base_type_is_integer(base_type));
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info->input_interpolate[i] = TGSI_INTERPOLATE_LINEAR;
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if (variable->data.sample)
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info->uses_linear_sample = true;
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else if (variable->data.centroid)
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info->uses_linear_centroid = true;
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else
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info->uses_linear_center = true;
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break;
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case INTERP_MODE_FLAT:
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info->input_interpolate[i] = TGSI_INTERPOLATE_CONSTANT;
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break;
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}
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/* TODO make this more precise */
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if (variable->data.location == VARYING_SLOT_COL0)
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info->colors_read |= 0x0f;
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else if (variable->data.location == VARYING_SLOT_COL1)
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info->colors_read |= 0xf0;
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i++;
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}
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i = 0;
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nir_foreach_variable(variable, &nir->outputs) {
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unsigned semantic_name, semantic_index;
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if (nir->stage == MESA_SHADER_FRAGMENT) {
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tgsi_get_gl_frag_result_semantic(variable->data.location,
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&semantic_name, &semantic_index);
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} else {
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tgsi_get_gl_varying_semantic(variable->data.location, true,
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&semantic_name, &semantic_index);
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}
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info->output_semantic_name[i] = semantic_name;
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info->output_semantic_index[i] = semantic_index;
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info->output_usagemask[i] = TGSI_WRITEMASK_XYZW;
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switch (semantic_name) {
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case TGSI_SEMANTIC_PRIMID:
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info->writes_primid = true;
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break;
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case TGSI_SEMANTIC_VIEWPORT_INDEX:
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info->writes_viewport_index = true;
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break;
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case TGSI_SEMANTIC_LAYER:
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info->writes_layer = true;
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break;
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case TGSI_SEMANTIC_PSIZE:
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info->writes_psize = true;
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break;
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case TGSI_SEMANTIC_CLIPVERTEX:
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info->writes_clipvertex = true;
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break;
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case TGSI_SEMANTIC_COLOR:
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info->colors_written |= 1 << semantic_index;
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break;
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case TGSI_SEMANTIC_STENCIL:
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info->writes_stencil = true;
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break;
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case TGSI_SEMANTIC_SAMPLEMASK:
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info->writes_samplemask = true;
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break;
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case TGSI_SEMANTIC_EDGEFLAG:
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info->writes_edgeflag = true;
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break;
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case TGSI_SEMANTIC_POSITION:
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if (info->processor == PIPE_SHADER_FRAGMENT)
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info->writes_z = true;
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else
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info->writes_position = true;
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break;
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}
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i++;
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}
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nir_foreach_variable(variable, &nir->uniforms) {
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const struct glsl_type *type = variable->type;
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enum glsl_base_type base_type =
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glsl_get_base_type(glsl_without_array(type));
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unsigned aoa_size = MAX2(1, glsl_get_aoa_size(type));
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/* We rely on the fact that nir_lower_samplers_as_deref has
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* eliminated struct dereferences.
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*/
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if (base_type == GLSL_TYPE_SAMPLER)
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info->samplers_declared |=
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u_bit_consecutive(variable->data.binding, aoa_size);
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else if (base_type == GLSL_TYPE_IMAGE)
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info->images_declared |=
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u_bit_consecutive(variable->data.binding, aoa_size);
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}
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info->num_written_clipdistance = nir->info.clip_distance_array_size;
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info->num_written_culldistance = nir->info.cull_distance_array_size;
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info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
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info->culldist_writemask = u_bit_consecutive(info->num_written_clipdistance,
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info->num_written_culldistance);
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if (info->processor == PIPE_SHADER_FRAGMENT)
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info->uses_kill = nir->info.fs.uses_discard;
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/* TODO make this more accurate */
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info->const_buffers_declared = u_bit_consecutive(0, SI_NUM_CONST_BUFFERS);
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info->shader_buffers_declared = u_bit_consecutive(0, SI_NUM_SHADER_BUFFERS);
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func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
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nir_foreach_block(block, func->impl) {
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nir_foreach_instr(instr, block)
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scan_instruction(info, instr);
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}
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}
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@ -1971,14 +1971,25 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
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sel->compiler_ctx_state.tm = sctx->tm;
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sel->compiler_ctx_state.debug = sctx->b.debug;
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sel->compiler_ctx_state.is_debug_context = sctx->is_debug;
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sel->tokens = tgsi_dup_tokens(state->tokens);
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if (!sel->tokens) {
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FREE(sel);
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return NULL;
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}
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sel->so = state->stream_output;
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tgsi_scan_shader(state->tokens, &sel->info);
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if (state->type == PIPE_SHADER_IR_TGSI) {
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sel->tokens = tgsi_dup_tokens(state->tokens);
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if (!sel->tokens) {
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FREE(sel);
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return NULL;
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}
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tgsi_scan_shader(state->tokens, &sel->info);
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} else {
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assert(state->type == PIPE_SHADER_IR_NIR);
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sel->nir = state->ir.nir;
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si_nir_scan_shader(sel->nir, &sel->info);
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}
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sel->type = sel->info.processor;
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p_atomic_inc(&sscreen->b.num_shaders_created);
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si_get_active_slot_masks(&sel->info,
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