i965: Un-hardcode WM binding table from update_texture_surface.
Currently, we mirror the VS and WM binding tables' texture entries. That may not continue to be true, so in preparation, pass in the binding table and surface index as arguments. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Paul Berry <stereotype441@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Kenneth Graunke
parent
96a22f3583
commit
28fab4295e
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@ -654,12 +654,14 @@ brw_get_surface_num_multisamples(unsigned num_samples)
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static void
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brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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brw_update_buffer_texture_surface(struct gl_context *ctx,
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unsigned unit,
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uint32_t *binding_table,
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unsigned surf_index)
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{
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struct brw_context *brw = brw_context(ctx);
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struct intel_context *intel = &brw->intel;
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struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
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const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
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uint32_t *surf;
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struct intel_buffer_object *intel_obj =
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intel_buffer_object(tObj->BufferObject);
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@ -674,7 +676,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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}
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surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
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6 * 4, 32, &brw->wm.surf_offset[surf_index]);
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6 * 4, 32, &binding_table[surf_index]);
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surf[0] = (BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT |
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(brw_format_for_mesa_format(format) << BRW_SURFACE_FORMAT_SHIFT));
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@ -687,7 +689,7 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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/* Emit relocation to surface contents. */
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drm_intel_bo_emit_reloc(brw->intel.batch.bo,
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brw->wm.surf_offset[surf_index] + 4,
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binding_table[surf_index] + 4,
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bo, 0, I915_GEM_DOMAIN_SAMPLER, 0);
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int w = intel_obj->Base.Size / texel_size;
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@ -706,7 +708,10 @@ brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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}
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static void
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brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
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brw_update_texture_surface(struct gl_context *ctx,
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unsigned unit,
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uint32_t *binding_table,
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unsigned surf_index)
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{
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struct brw_context *brw = brw_context(ctx);
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struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
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@ -714,19 +719,18 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
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struct intel_mipmap_tree *mt = intelObj->mt;
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struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
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struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
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const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
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uint32_t *surf;
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int width, height, depth;
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if (tObj->Target == GL_TEXTURE_BUFFER) {
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brw_update_buffer_texture_surface(ctx, unit);
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brw_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
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return;
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}
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intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
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surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
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6 * 4, 32, &brw->wm.surf_offset[surf_index]);
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6 * 4, 32, &binding_table[surf_index]);
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surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
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BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
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@ -754,7 +758,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit )
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/* Emit relocation to surface contents */
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drm_intel_bo_emit_reloc(brw->intel.batch.bo,
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brw->wm.surf_offset[surf_index] + 4,
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binding_table[surf_index] + 4,
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intelObj->mt->region->bo,
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intelObj->mt->offset,
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I915_GEM_DOMAIN_SAMPLER, 0);
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@ -1242,7 +1246,7 @@ brw_update_texture_surfaces(struct brw_context *brw)
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/* _NEW_TEXTURE */
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if (texUnit->_ReallyEnabled) {
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brw->intel.vtbl.update_texture_surface(ctx, i);
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brw->intel.vtbl.update_texture_surface(ctx, i, brw->wm.surf_offset, surf);
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} else {
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brw->wm.surf_offset[surf] = 0;
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}
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@ -203,11 +203,13 @@ gen7_check_surface_setup(struct gen7_surface_state *surf,
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static void
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gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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gen7_update_buffer_texture_surface(struct gl_context *ctx,
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unsigned unit,
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uint32_t *binding_table,
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unsigned surf_index)
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{
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struct brw_context *brw = brw_context(ctx);
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struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
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const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
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struct gen7_surface_state *surf;
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struct intel_buffer_object *intel_obj =
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intel_buffer_object(tObj->BufferObject);
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@ -216,7 +218,7 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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int texel_size = _mesa_get_format_bytes(format);
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surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
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sizeof(*surf), 32, &brw->wm.surf_offset[surf_index]);
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sizeof(*surf), 32, &binding_table[surf_index]);
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memset(surf, 0, sizeof(*surf));
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surf->ss0.surface_type = BRW_SURFACE_BUFFER;
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@ -237,7 +239,7 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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* a separate cache and is just the sampler cache.
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*/
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drm_intel_bo_emit_reloc(brw->intel.batch.bo,
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(brw->wm.surf_offset[surf_index] +
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(binding_table[surf_index] +
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offsetof(struct gen7_surface_state, ss1)),
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bo, 0,
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I915_GEM_DOMAIN_SAMPLER, 0);
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@ -261,7 +263,10 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit)
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}
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static void
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gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
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gen7_update_texture_surface(struct gl_context *ctx,
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unsigned unit,
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uint32_t *binding_table,
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unsigned surf_index)
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{
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struct brw_context *brw = brw_context(ctx);
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struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
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@ -269,12 +274,11 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
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struct intel_mipmap_tree *mt = intelObj->mt;
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struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
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struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
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const GLuint surf_index = SURF_INDEX_TEXTURE(unit);
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struct gen7_surface_state *surf;
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int width, height, depth;
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if (tObj->Target == GL_TEXTURE_BUFFER) {
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gen7_update_buffer_texture_surface(ctx, unit);
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gen7_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
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return;
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}
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@ -285,7 +289,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
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intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
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surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
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sizeof(*surf), 32, &brw->wm.surf_offset[surf_index]);
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sizeof(*surf), 32, &binding_table[surf_index]);
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memset(surf, 0, sizeof(*surf));
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if (mt->align_h == 4)
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@ -347,7 +351,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint unit)
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/* Emit relocation to surface contents */
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drm_intel_bo_emit_reloc(brw->intel.batch.bo,
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brw->wm.surf_offset[surf_index] +
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binding_table[surf_index] +
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offsetof(struct gen7_surface_state, ss1),
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intelObj->mt->region->bo, intelObj->mt->offset,
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I915_GEM_DOMAIN_SAMPLER, 0);
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@ -189,7 +189,10 @@ struct intel_context
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* Surface state operations (i965+ only)
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* \{
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*/
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void (*update_texture_surface)(struct gl_context *ctx, unsigned unit);
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void (*update_texture_surface)(struct gl_context *ctx,
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unsigned unit,
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uint32_t *binding_table,
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unsigned surf_index);
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void (*update_renderbuffer_surface)(struct brw_context *brw,
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struct gl_renderbuffer *rb,
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unsigned unit);
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