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nv50/ir: add isAccessSupported check for memory access coalescing

This commit is contained in:
Christoph Bumiller 2012-04-06 18:34:44 +02:00
parent c04d6d95e0
commit 286abcb51e
6 changed files with 19 additions and 5 deletions
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3
src/gallium/drivers/nv50/codegen/nv50_ir_inlines.h
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@ -82,8 +82,9 @@ static inline DataType typeOfSize(unsigned int size,
case 12: return TYPE_B96;
case 16: return TYPE_B128;
case 4:
default:
return flt ? TYPE_F32 : (sgn ? TYPE_S32 : TYPE_U32);
default:
return TYPE_NONE;
}
}

7
src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
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@ -1212,8 +1212,8 @@ MemoryOpt::combineLd(Record *rec, Instruction *ld)
int size = sizeRc + sizeLd;
int d, j;
// only VFETCH can do a 96 byte load
if (ld->op != OP_VFETCH && size == 12)
if (!prog->getTarget()->
isAccessSupported(ld->getSrc(0)->reg.file, typeOfSize(size)))
return false;
// no unaligned loads
if (((size == 0x8) && (MIN2(offLd, offRc) & 0x7)) ||
@ -1267,7 +1267,8 @@ MemoryOpt::combineSt(Record *rec, Instruction *st)
Value *src[4]; // no modifiers in ValueRef allowed for st
Value *extra[3];
if (size == 12) // XXX: check if EXPORT a[] can do this after all
if (!prog->getTarget()->
isAccessSupported(st->getSrc(0)->reg.file, typeOfSize(size)))
return false;
if (size == 8 && MIN2(offRc, offSt) & 0x7)
return false;

1
src/gallium/drivers/nv50/codegen/nv50_ir_target.h
View File

@ -138,6 +138,7 @@ public:
virtual bool insnCanLoad(const Instruction *insn, int s,
const Instruction *ld) const = 0;
virtual bool isOpSupported(operation, DataType) const = 0;
virtual bool isAccessSupported(DataFile, DataType) const = 0;
virtual bool isModSupported(const Instruction *,
int s, Modifier) const = 0;
virtual bool isSatSupported(const Instruction *) const = 0;

2
src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp
View File

@ -1190,7 +1190,7 @@ CodeEmitterNVC0::emitEXPORT(const Instruction *i)
code[0] = 0x00000006 | ((size / 4 - 1) << 5);
code[1] = 0x0a000000 | i->src[0].get()->reg.data.offset;
assert(size != 12 && !(code[1] & (size - 1)));
assert(!(code[1] & ((size == 12) ? 15 : (size - 1))));
if (i->perPatch)
code[0] |= 0x100;

10
src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
View File

@ -440,6 +440,16 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
return true;
}
bool
TargetNVC0::isAccessSupported(DataFile file, DataType ty) const
{
if (ty == TYPE_NONE)
return false;
if (ty == TYPE_B96)
return (file == FILE_SHADER_INPUT) || (file == FILE_SHADER_OUTPUT);
return true;
}
bool
TargetNVC0::isOpSupported(operation op, DataType ty) const
{

1
src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.h
View File

@ -45,6 +45,7 @@ public:
virtual bool insnCanLoad(const Instruction *insn, int s,
const Instruction *ld) const;
virtual bool isOpSupported(operation, DataType) const;
virtual bool isAccessSupported(DataFile, DataType) const;
virtual bool isModSupported(const Instruction *, int s, Modifier) const;
virtual bool isSatSupported(const Instruction *) const;
virtual bool mayPredicate(const Instruction *, const Value *) const;