i965/icl: Update the assert in brw_memory_barrier()
Nothing is changed here from gen10 to gen11. So, just update the assert. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
parent
d6b26649a6
commit
27d0034938
|
@ -280,7 +280,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
|
|||
unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
|
||||
PIPE_CONTROL_NO_WRITE |
|
||||
PIPE_CONTROL_CS_STALL);
|
||||
assert(devinfo->gen >= 7 && devinfo->gen <= 10);
|
||||
assert(devinfo->gen >= 7 && devinfo->gen <= 11);
|
||||
|
||||
if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
|
||||
GL_ELEMENT_ARRAY_BARRIER_BIT |
|
||||
|
|
Loading…
Reference in New Issue