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i915g: Apply clang-format. 

Add the format file copied from freedreno, and run clang-format
--style=file -i src/gallium/drivers/i915/*.[ch] (with clang-format 11).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11617>
This commit is contained in:
Emma Anholt 2021-06-25 09:53:33 -07:00
parent 8391fb98cd
commit 26afccb97e
42 changed files with 3343 additions and 3879 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

115
src/gallium/drivers/i915/.clang-format Normal file
View File

@ -0,0 +1,115 @@
AlignAfterOpenBracket: true
AlignConsecutiveMacros: true
AllowAllArgumentsOnNextLine: false
AllowShortCaseLabelsOnASingleLine: false
AllowShortFunctionsOnASingleLine: false
AlwaysBreakAfterReturnType: TopLevelDefinitions
BasedOnStyle: LLVM
BraceWrapping:
AfterControlStatement: false
AfterEnum: false
AfterFunction: true
AfterStruct: false
BeforeElse: false
SplitEmptyFunction: true
BinPackArguments: true
BinPackParameters: true
BreakBeforeBraces: Custom
ColumnLimit: 80
ContinuationIndentWidth: 3
Cpp11BracedListStyle: false
Cpp11BracedListStyle: true
ForEachMacros:
- LIST_FOR_EACH_ENTRY
- LIST_FOR_EACH_ENTRY_SAFE
- LIST_FOR_EACH_ENTRY_SAFE_REV
- list_for_each_entry
- list_for_each_entry_safe
- foreach_list_typed
- u_foreach_bit
- util_dynarray_foreach
- nir_foreach_variable
- nir_foreach_variable_safe
- nir_foreach_register
- nir_foreach_register_safe
- nir_foreach_use
- nir_foreach_use_safe
- nir_foreach_if_use
- nir_foreach_if_use_safe
- nir_foreach_def
- nir_foreach_def_safe
- nir_foreach_phi_src
- nir_foreach_phi_src_safe
- nir_foreach_parallel_copy_entry
- nir_foreach_instr
- nir_foreach_instr_reverse
- nir_foreach_instr_safe
- nir_foreach_instr_reverse_safe
- nir_foreach_function
- nir_foreach_block
- nir_foreach_block_safe
- nir_foreach_block_reverse
- nir_foreach_block_reverse_safe
- nir_foreach_block_in_cf_node
- nir_foreach_shader_in_variable
- nir_foreach_shader_out_variable_safe
- nir_foreach_variable_in_list
- nir_foreach_src
- nir_foreach_variable_with_modes_safe
- nir_foreach_variable_with_modes
- nir_foreach_shader_out_variable
- ir2_foreach_instr
- ir2_foreach_live_reg
- ir2_foreach_avail
- ir2_foreach_src
- foreach_two_lists
- foreach_bit
- foreach_sched_node
- foreach_src
- foreach_src_n
- foreach_ssa_use
- foreach_ssa_srcp_n
- foreach_ssa_srcp
- foreach_ssa_src_n
- foreach_ssa_src
- foreach_input_n
- foreach_input
- foreach_output_n
- foreach_output
- foreach_instr
- foreach_instr_rev
- foreach_instr_safe
- foreach_block
- foreach_block_safe
- foreach_block_rev
- foreach_array
- foreach_array_safe
- foreach_name_n
- foreach_name
- foreach_def
- foreach_use
- foreach_batch
- hash_table_foreach
- set_foreach
- foreach_line_in_section
- perf_time
- perf_time_ctx
- foreach_submit
- foreach_submit_safe
IncludeBlocks: Preserve
IncludeCategories:
- Regex: '<[[:alnum:].]+>'
Priority: 1
- Regex: '.*\/.*'
Priority: 2
- Regex: '.*'
Priority: 3
IndentWidth: 3
PenaltyBreakBeforeFirstCallParameter: 1
PenaltyExcessCharacter: 100
SpaceAfterCStyleCast: false
SpaceBeforeCpp11BracedList: false
SpaceBeforeCtorInitializerColon: false
SpacesInContainerLiterals: false

30
src/gallium/drivers/i915/i915_batch.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_BATCH_H
@ -31,30 +31,24 @@
#include "i915_batchbuffer.h"
#include "i915_context.h"
#define BEGIN_BATCH(dwords) (i915_winsys_batchbuffer_check(i915->batch, dwords))
#define BEGIN_BATCH(dwords) \
(i915_winsys_batchbuffer_check(i915->batch, dwords))
#define OUT_BATCH(dword) i915_winsys_batchbuffer_dword(i915->batch, dword)
#define OUT_BATCH(dword) \
i915_winsys_batchbuffer_dword(i915->batch, dword)
#define OUT_BATCH_F(f) i915_winsys_batchbuffer_float(i915->batch, f)
#define OUT_BATCH_F(f) \
i915_winsys_batchbuffer_float(i915->batch, f)
#define OUT_RELOC(buf, usage, offset) \
#define OUT_RELOC(buf, usage, offset) \
i915_winsys_batchbuffer_reloc(i915->batch, buf, usage, offset, false)
#define OUT_RELOC_FENCED(buf, usage, offset) \
#define OUT_RELOC_FENCED(buf, usage, offset) \
i915_winsys_batchbuffer_reloc(i915->batch, buf, usage, offset, true)
#define FLUSH_BATCH(fence, flags) \
i915_flush(i915, fence, flags)
#define FLUSH_BATCH(fence, flags) i915_flush(i915, fence, flags)
/************************************************************************
* i915_flush.c
*/
extern void i915_flush(struct i915_context *i915,
struct pipe_fence_handle **fence,
unsigned flags);
struct pipe_fence_handle **fence, unsigned flags);
#endif

19
src/gallium/drivers/i915/i915_batchbuffer.h
View File

@ -28,8 +28,8 @@
#ifndef I915_BATCHBUFFER_H
#define I915_BATCHBUFFER_H
#include "i915_winsys.h"
#include "util/u_debug.h"
#include "i915_winsys.h"
struct i915_context;
@ -55,12 +55,14 @@ i915_winsys_batchbuffer_dword_unchecked(struct i915_winsys_batchbuffer *batch,
}
static inline void
i915_winsys_batchbuffer_float(struct i915_winsys_batchbuffer *batch,
float f)
i915_winsys_batchbuffer_float(struct i915_winsys_batchbuffer *batch, float f)
{
union { float f; unsigned int ui; } uif;
union {
float f;
unsigned int ui;
} uif;
uif.f = f;
assert (i915_winsys_batchbuffer_space(batch) >= 4);
assert(i915_winsys_batchbuffer_space(batch) >= 4);
i915_winsys_batchbuffer_dword_unchecked(batch, uif.ui);
}
@ -68,16 +70,15 @@ static inline void
i915_winsys_batchbuffer_dword(struct i915_winsys_batchbuffer *batch,
unsigned dword)
{
assert (i915_winsys_batchbuffer_space(batch) >= 4);
assert(i915_winsys_batchbuffer_space(batch) >= 4);
i915_winsys_batchbuffer_dword_unchecked(batch, dword);
}
static inline void
i915_winsys_batchbuffer_write(struct i915_winsys_batchbuffer *batch,
void *data,
i915_winsys_batchbuffer_write(struct i915_winsys_batchbuffer *batch, void *data,
size_t size)
{
assert (i915_winsys_batchbuffer_space(batch) >= size);
assert(i915_winsys_batchbuffer_space(batch) >= size);
memcpy(batch->ptr, data, size);
batch->ptr += size;

73
src/gallium/drivers/i915/i915_blit.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,34 +22,26 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_blit.h"
#include "i915_reg.h"
#include "i915_batch.h"
#include "i915_debug.h"
#include "i915_reg.h"
void
i915_fill_blit(struct i915_context *i915,
unsigned cpp,
unsigned rgba_mask,
unsigned short dst_pitch,
struct i915_winsys_buffer *dst_buffer,
unsigned dst_offset,
short x, short y,
short w, short h,
i915_fill_blit(struct i915_context *i915, unsigned cpp, unsigned rgba_mask,
unsigned short dst_pitch, struct i915_winsys_buffer *dst_buffer,
unsigned dst_offset, short x, short y, short w, short h,
unsigned color)
{
unsigned BR13, CMD;
I915_DBG(DBG_BLIT, "%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", __FUNCTION__,
dst_buffer, dst_pitch, dst_offset, x, y, w, h);
I915_DBG(DBG_BLIT, "%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h);
if(!i915_winsys_validate_buffers(i915->batch, &dst_buffer, 1)) {
if (!i915_winsys_validate_buffers(i915->batch, &dst_buffer, 1)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
assert(i915_winsys_validate_buffers(i915->batch, &dst_buffer, 1));
}
@ -58,13 +50,11 @@ i915_fill_blit(struct i915_context *i915,
case 1:
case 2:
case 3:
BR13 = (((int) dst_pitch) & 0xffff) |
(0xF0 << 16) | (1 << 24);
BR13 = (((int)dst_pitch) & 0xffff) | (0xF0 << 16) | (1 << 24);
CMD = XY_COLOR_BLT_CMD;
break;
case 4:
BR13 = (((int) dst_pitch) & 0xffff) |
(0xF0 << 16) | (1 << 24) | (1 << 25);
BR13 = (((int)dst_pitch) & 0xffff) | (0xF0 << 16) | (1 << 24) | (1 << 25);
CMD = (XY_COLOR_BLT_CMD | rgba_mask);
break;
default:
@ -86,31 +76,24 @@ i915_fill_blit(struct i915_context *i915,
}
void
i915_copy_blit(struct i915_context *i915,
unsigned cpp,
unsigned short src_pitch,
struct i915_winsys_buffer *src_buffer,
unsigned src_offset,
unsigned short dst_pitch,
struct i915_winsys_buffer *dst_buffer,
unsigned dst_offset,
short src_x, short src_y,
short dst_x, short dst_y,
short w, short h)
i915_copy_blit(struct i915_context *i915, unsigned cpp,
unsigned short src_pitch, struct i915_winsys_buffer *src_buffer,
unsigned src_offset, unsigned short dst_pitch,
struct i915_winsys_buffer *dst_buffer, unsigned dst_offset,
short src_x, short src_y, short dst_x, short dst_y, short w,
short h)
{
unsigned CMD, BR13;
int dst_y2 = dst_y + h;
int dst_x2 = dst_x + w;
struct i915_winsys_buffer *buffers[2] = {src_buffer, dst_buffer};
I915_DBG(DBG_BLIT,
"%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__,
src_buffer, src_pitch, src_offset, src_x, src_y,
__FUNCTION__, src_buffer, src_pitch, src_offset, src_x, src_y,
dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
if(!i915_winsys_validate_buffers(i915->batch, buffers, 2)) {
if (!i915_winsys_validate_buffers(i915->batch, buffers, 2)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
assert(i915_winsys_validate_buffers(i915->batch, buffers, 2));
}
@ -119,15 +102,13 @@ i915_copy_blit(struct i915_context *i915,
case 1:
case 2:
case 3:
BR13 = (((int) dst_pitch) & 0xffff) |
(0xCC << 16) | (1 << 24);
BR13 = (((int)dst_pitch) & 0xffff) | (0xCC << 16) | (1 << 24);
CMD = XY_SRC_COPY_BLT_CMD;
break;
case 4:
BR13 = (((int) dst_pitch) & 0xffff) |
(0xCC << 16) | (1 << 24) | (1 << 25);
BR13 = (((int)dst_pitch) & 0xffff) | (0xCC << 16) | (1 << 24) | (1 << 25);
CMD = (XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
XY_SRC_COPY_BLT_WRITE_RGB);
XY_SRC_COPY_BLT_WRITE_RGB);
break;
default:
return;
@ -141,7 +122,7 @@ i915_copy_blit(struct i915_context *i915,
* proper overlapping blits in that case. We don't really have a
* need for either at this stage.
*/
assert (dst_pitch > 0 && src_pitch > 0);
assert(dst_pitch > 0 && src_pitch > 0);
if (!BEGIN_BATCH(8)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
@ -153,7 +134,7 @@ i915_copy_blit(struct i915_context *i915,
OUT_BATCH((dst_y2 << 16) | dst_x2);
OUT_RELOC_FENCED(dst_buffer, I915_USAGE_2D_TARGET, dst_offset);
OUT_BATCH((src_y << 16) | src_x);
OUT_BATCH(((int) src_pitch & 0xffff));
OUT_BATCH(((int)src_pitch & 0xffff));
OUT_RELOC_FENCED(src_buffer, I915_USAGE_2D_SOURCE, src_offset);
i915_set_flush_dirty(i915, I915_FLUSH_CACHE);

34
src/gallium/drivers/i915/i915_blit.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_BLIT_H
@ -30,26 +30,18 @@
#include "i915_context.h"
extern void i915_copy_blit(struct i915_context *i915,
unsigned cpp,
extern void i915_copy_blit(struct i915_context *i915, unsigned cpp,
unsigned short src_pitch,
struct i915_winsys_buffer *src_buffer,
unsigned src_offset,
unsigned short dst_pitch,
unsigned src_offset, unsigned short dst_pitch,
struct i915_winsys_buffer *dst_buffer,
unsigned dst_offset,
short srcx, short srcy,
short dstx, short dsty,
short w, short h);
unsigned dst_offset, short srcx, short srcy,
short dstx, short dsty, short w, short h);
extern void i915_fill_blit(struct i915_context *i915,
unsigned cpp,
unsigned rgba_mask,
unsigned short dst_pitch,
extern void i915_fill_blit(struct i915_context *i915, unsigned cpp,
unsigned rgba_mask, unsigned short dst_pitch,
struct i915_winsys_buffer *dst_buffer,
unsigned dst_offset,
short x, short y,
short w, short h, unsigned color);
unsigned dst_offset, short x, short y, short w,
short h, unsigned color);
#endif

59
src/gallium/drivers/i915/i915_clear.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,32 +22,31 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Authors:
* Brian Paul
*/
#include "util/format/u_format.h"
#include "util/u_pack_color.h"
#include "i915_context.h"
#include "i915_screen.h"
#include "i915_reg.h"
#include "i915_batch.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_resource.h"
#include "i915_screen.h"
#include "i915_state.h"
void
i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil,
unsigned destx, unsigned desty, unsigned width, unsigned height)
const union pipe_color_union *color, double depth,
unsigned stencil, unsigned destx, unsigned desty,
unsigned width, unsigned height)
{
struct i915_context *i915 = i915_context(pipe);
uint32_t clear_params, clear_color, clear_depth, clear_stencil,
clear_color8888, packed_z_stencil;
clear_color8888, packed_z_stencil;
union util_color u_color;
float f_depth = depth;
struct i915_texture *cbuf_tex, *depth_tex;
@ -87,12 +86,13 @@ i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
clear_params |= CLEARPARAM_WRITE_DEPTH;
depth_tex = i915_texture(zbuf->texture);
packed_z_stencil = util_pack_z_stencil(depth_tex->b.format, depth, stencil);
packed_z_stencil =
util_pack_z_stencil(depth_tex->b.format, depth, stencil);
if (util_format_get_blocksize(depth_tex->b.format) == 4) {
/* Avoid read-modify-write if there's no stencil. */
if (buffers & PIPE_CLEAR_STENCIL
|| depth_tex->b.format != PIPE_FORMAT_Z24_UNORM_S8_UINT) {
if (buffers & PIPE_CLEAR_STENCIL ||
depth_tex->b.format != PIPE_FORMAT_Z24_UNORM_S8_UINT) {
clear_params |= CLEARPARAM_WRITE_STENCIL;
clear_stencil = packed_z_stencil >> 24;
}
@ -110,24 +110,25 @@ i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
depth_tex = i915_texture(zbuf->texture);
assert(depth_tex->b.format == PIPE_FORMAT_Z24_UNORM_S8_UINT);
packed_z_stencil = util_pack_z_stencil(depth_tex->b.format, depth, stencil);
packed_z_stencil =
util_pack_z_stencil(depth_tex->b.format, depth, stencil);
depth_clear_bbp = 32;
clear_stencil = packed_z_stencil >> 24;
}
/* hw can't fastclear both depth and color if their bbp mismatch. */
if (color_clear_bbp && depth_clear_bbp
&& color_clear_bbp != depth_clear_bbp) {
if (color_clear_bbp && depth_clear_bbp &&
color_clear_bbp != depth_clear_bbp) {
if (i915->hardware_dirty)
i915_emit_hardware_state(i915);
if (!BEGIN_BATCH(1 + 2*(7 + 7))) {
if (!BEGIN_BATCH(1 + 2 * (7 + 7))) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
i915_emit_hardware_state(i915);
i915->vbo_flushed = 1;
assert(BEGIN_BATCH(1 + 2*(7 + 7)));
assert(BEGIN_BATCH(1 + 2 * (7 + 7)));
}
OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
@ -218,8 +219,8 @@ i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
void
i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color,
double depth, unsigned stencil)
const union pipe_color_union *color, double depth,
unsigned stencil)
{
struct pipe_framebuffer_state *framebuffer =
&i915_context(pipe)->framebuffer;
@ -239,22 +240,22 @@ i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
if (buffers & PIPE_CLEAR_DEPTHSTENCIL) {
struct pipe_surface *ps = framebuffer->zsbuf;
pipe->clear_depth_stencil(pipe, ps, buffers & PIPE_CLEAR_DEPTHSTENCIL,
depth, stencil,
0, 0, ps->width, ps->height, true);
depth, stencil, 0, 0, ps->width, ps->height,
true);
}
}
void
i915_clear_render(struct pipe_context *pipe, unsigned buffers,
const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color,
double depth, unsigned stencil)
const union pipe_color_union *color, double depth,
unsigned stencil)
{
struct i915_context *i915 = i915_context(pipe);
if (i915->dirty)
i915_update_derived(i915);
i915_clear_emit(pipe, buffers, color, depth, stencil,
0, 0, i915->framebuffer.width, i915->framebuffer.height);
i915_clear_emit(pipe, buffers, color, depth, stencil, 0, 0,
i915->framebuffer.width, i915->framebuffer.height);
}

56
src/gallium/drivers/i915/i915_context.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,35 +22,32 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_context.h"
#include "i915_state.h"
#include "i915_screen.h"
#include "i915_surface.h"
#include "i915_query.h"
#include "i915_batch.h"
#include "i915_query.h"
#include "i915_resource.h"
#include "i915_screen.h"
#include "i915_state.h"
#include "i915_surface.h"
#include "draw/draw_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_screen.h"
#include "util/u_draw.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
#include "util/u_prim.h"
#include "util/u_upload_mgr.h"
#include "pipe/p_screen.h"
DEBUG_GET_ONCE_BOOL_OPTION(i915_no_vbuf, "I915_NO_VBUF", FALSE)
/*
* Draw functions
*/
static void
i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
unsigned drawid_offset,
@ -68,7 +65,7 @@ i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
const void *mapped_indices = NULL;
unsigned i;
if (!u_trim_pipe_prim(info->mode, (unsigned*)&draws[0].count))
if (!u_trim_pipe_prim(info->mode, (unsigned *)&draws[0].count))
return;
/*
@ -83,8 +80,9 @@ i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
* Map vertex buffers
*/
for (i = 0; i < i915->nr_vertex_buffers; i++) {
const void *buf = i915->vertex_buffers[i].is_user_buffer ?
i915->vertex_buffers[i].buffer.user : NULL;
const void *buf = i915->vertex_buffers[i].is_user_buffer
? i915->vertex_buffers[i].buffer.user
: NULL;
if (!buf) {
if (!i915->vertex_buffers[i].buffer.resource)
continue;
@ -100,16 +98,15 @@ i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
mapped_indices = info->has_user_indices ? info->index.user : NULL;
if (!mapped_indices)
mapped_indices = i915_buffer(info->index.resource)->data;
draw_set_indexes(draw,
(ubyte *) mapped_indices,
info->index_size, ~0);
draw_set_indexes(draw, (ubyte *)mapped_indices, info->index_size, ~0);
}
if (i915->constants[PIPE_SHADER_VERTEX])
draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0,
i915_buffer(i915->constants[PIPE_SHADER_VERTEX])->data,
(i915->current.num_user_constants[PIPE_SHADER_VERTEX] *
4 * sizeof(float)));
draw_set_mapped_constant_buffer(
draw, PIPE_SHADER_VERTEX, 0,
i915_buffer(i915->constants[PIPE_SHADER_VERTEX])->data,
(i915->current.num_user_constants[PIPE_SHADER_VERTEX] * 4 *
sizeof(float)));
else
draw_set_mapped_constant_buffer(draw, PIPE_SHADER_VERTEX, 0, NULL, 0);
@ -134,13 +131,12 @@ i915_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
draw_flush(i915->draw);
}
/*
* Generic context functions
*/
static void i915_destroy(struct pipe_context *pipe)
static void
i915_destroy(struct pipe_context *pipe)
{
struct i915_context *i915 = i915_context(pipe);
int i;
@ -153,7 +149,7 @@ static void i915_destroy(struct pipe_context *pipe)
if (i915->base.stream_uploader)
u_upload_destroy(i915->base.stream_uploader);
if(i915->batch)
if (i915->batch)
i915->iws->batchbuffer_destroy(i915->batch);
/* unbind framebuffer */
@ -195,10 +191,8 @@ i915_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
i915->base.draw_vbo = i915_draw_vbo;
/* init this before draw */
slab_create(&i915->transfer_pool, sizeof(struct pipe_transfer),
16);
slab_create(&i915->texture_transfer_pool, sizeof(struct i915_transfer),
16);
slab_create(&i915->transfer_pool, sizeof(struct pipe_transfer), 16);
slab_create(&i915->texture_transfer_pool, sizeof(struct i915_transfer), 16);
/* Batch stream debugging is a bit hacked up at the moment:
*/

178
src/gallium/drivers/i915/i915_context.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
/**************************************************************************
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,13 +22,12 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_CONTEXT_H
#define I915_CONTEXT_H
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "pipe/p_state.h"
@ -40,12 +39,10 @@
#include "util/slab.h"
#include "util/u_blitter.h"
struct i915_winsys;
struct i915_winsys_buffer;
struct i915_winsys_batchbuffer;
#define I915_TEX_UNITS 8
#define I915_DYNAMIC_MODES4 0
@ -64,40 +61,36 @@ struct i915_winsys_batchbuffer;
#define I915_DYNAMIC_SC_RECT_2 13
#define I915_MAX_DYNAMIC 14
#define I915_IMMEDIATE_S0 0
#define I915_IMMEDIATE_S1 1
#define I915_IMMEDIATE_S2 2
#define I915_IMMEDIATE_S3 3
#define I915_IMMEDIATE_S4 4
#define I915_IMMEDIATE_S5 5
#define I915_IMMEDIATE_S6 6
#define I915_IMMEDIATE_S7 7
#define I915_MAX_IMMEDIATE 8
#define I915_IMMEDIATE_S0 0
#define I915_IMMEDIATE_S1 1
#define I915_IMMEDIATE_S2 2
#define I915_IMMEDIATE_S3 3
#define I915_IMMEDIATE_S4 4
#define I915_IMMEDIATE_S5 5
#define I915_IMMEDIATE_S6 6
#define I915_IMMEDIATE_S7 7
#define I915_MAX_IMMEDIATE 8
/* These must mach the order of LI0_STATE_* bits, as they will be used
* to generate hardware packets:
*/
#define I915_CACHE_STATIC 0
#define I915_CACHE_DYNAMIC 1 /* handled specially */
#define I915_CACHE_SAMPLER 2
#define I915_CACHE_MAP 3
#define I915_CACHE_PROGRAM 4
#define I915_CACHE_CONSTANTS 5
#define I915_MAX_CACHE 6
#define I915_MAX_CONSTANT 32
#define I915_CACHE_STATIC 0
#define I915_CACHE_DYNAMIC 1 /* handled specially */
#define I915_CACHE_SAMPLER 2
#define I915_CACHE_MAP 3
#define I915_CACHE_PROGRAM 4
#define I915_CACHE_CONSTANTS 5
#define I915_MAX_CACHE 6
#define I915_MAX_CONSTANT 32
/** See constant_flags[] below */
#define I915_CONSTFLAG_USER 0x1f
/**
* Subclass of pipe_shader_state
*/
struct i915_fragment_shader
{
struct i915_fragment_shader {
struct pipe_shader_state state;
struct tgsi_shader_info info;
@ -137,14 +130,12 @@ struct i915_fragment_shader
int generic_mapping[I915_TEX_UNITS];
};
struct i915_cache_context;
/* Use to calculate differences between state emitted to hardware and
* current driver-calculated state.
* current driver-calculated state.
*/
struct i915_state
{
struct i915_state {
unsigned immediate[I915_MAX_IMMEDIATE];
unsigned dynamic[I915_MAX_DYNAMIC];
@ -173,10 +164,11 @@ struct i915_state
/* Reswizzle for OC writes in PIXEL_SHADER_PROGRAM, or 0 if unnecessary. */
uint32_t fixup_swizzle;
/* Mapping from color buffer dst channels in HW to gallium API src channels. */
/* Mapping from color buffer dst channels in HW to gallium API src channels.
*/
uint8_t color_swizzle[4];
unsigned id; /* track lost context events */
unsigned id; /* track lost context events */
};
struct i915_blend_state {
@ -210,7 +202,10 @@ struct i915_rasterizer_state {
unsigned LIS7;
unsigned sc[1];
union { float f; unsigned u; } ds[2];
union {
float f;
unsigned u;
} ds[2];
};
struct i915_sampler_state {
@ -224,9 +219,11 @@ struct i915_surface {
struct pipe_surface templ;
uint32_t buf_info; /* _3DSTATE_BUF_INFO_CMD flags */
/* PIXEL_SHADER_PROGRAM swizzle for OC buffer to handle the cbuf format (or 0 if none). */
/* PIXEL_SHADER_PROGRAM swizzle for OC buffer to handle the cbuf format (or 0
* if none). */
uint32_t oc_swizzle;
/* cbuf swizzle from dst r/g/b/a channels in memory to channels of gallium API. */
/* cbuf swizzle from dst r/g/b/a channels in memory to channels of gallium
* API. */
uint8_t color_swizzle[4];
bool alpha_in_g : 1;
@ -238,7 +235,6 @@ struct i915_velems_state {
struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
};
struct i915_context {
struct pipe_context base;
@ -248,11 +244,11 @@ struct i915_context {
/* The most recent drawing state as set by the driver:
*/
const struct i915_blend_state *blend;
const struct i915_sampler_state *fragment_sampler[PIPE_MAX_SAMPLERS];
struct pipe_sampler_state *vertex_samplers[PIPE_MAX_SAMPLERS];
const struct i915_depth_stencil_state *depth_stencil;
const struct i915_rasterizer_state *rasterizer;
const struct i915_blend_state *blend;
const struct i915_sampler_state *fragment_sampler[PIPE_MAX_SAMPLERS];
struct pipe_sampler_state *vertex_samplers[PIPE_MAX_SAMPLERS];
const struct i915_depth_stencil_state *depth_stencil;
const struct i915_rasterizer_state *rasterizer;
struct i915_fragment_shader *fs;
@ -303,7 +299,7 @@ struct i915_context {
int queued_vertices;
/** blitter/hw-clear */
struct blitter_context* blitter;
struct blitter_context *blitter;
};
/* A flag for each frontend state object:
@ -327,99 +323,89 @@ struct i915_context {
#define I915_NEW_VS 0x10000
#define I915_NEW_COLOR_SWIZZLE 0x20000
/* Driver's internally generated state flags:
*/
#define I915_NEW_VERTEX_FORMAT 0x10000
#define I915_NEW_VERTEX_FORMAT 0x10000
/* Dirty flags for hardware emit
*/
#define I915_HW_STATIC (1<<I915_CACHE_STATIC)
#define I915_HW_DYNAMIC (1<<I915_CACHE_DYNAMIC)
#define I915_HW_SAMPLER (1<<I915_CACHE_SAMPLER)
#define I915_HW_MAP (1<<I915_CACHE_MAP)
#define I915_HW_PROGRAM (1<<I915_CACHE_PROGRAM)
#define I915_HW_CONSTANTS (1<<I915_CACHE_CONSTANTS)
#define I915_HW_IMMEDIATE (1<<(I915_MAX_CACHE+0))
#define I915_HW_INVARIANT (1<<(I915_MAX_CACHE+1))
#define I915_HW_FLUSH (1<<(I915_MAX_CACHE+1))
#define I915_HW_STATIC (1 << I915_CACHE_STATIC)
#define I915_HW_DYNAMIC (1 << I915_CACHE_DYNAMIC)
#define I915_HW_SAMPLER (1 << I915_CACHE_SAMPLER)
#define I915_HW_MAP (1 << I915_CACHE_MAP)
#define I915_HW_PROGRAM (1 << I915_CACHE_PROGRAM)
#define I915_HW_CONSTANTS (1 << I915_CACHE_CONSTANTS)
#define I915_HW_IMMEDIATE (1 << (I915_MAX_CACHE + 0))
#define I915_HW_INVARIANT (1 << (I915_MAX_CACHE + 1))
#define I915_HW_FLUSH (1 << (I915_MAX_CACHE + 1))
/* hw flush handling */
#define I915_FLUSH_CACHE 1
#define I915_PIPELINE_FLUSH 2
#define I915_FLUSH_CACHE 1
#define I915_PIPELINE_FLUSH 2
/* split up static state */
#define I915_DST_BUF_COLOR 1
#define I915_DST_BUF_DEPTH 2
#define I915_DST_VARS 4
#define I915_DST_RECT 8
#define I915_DST_BUF_COLOR 1
#define I915_DST_BUF_DEPTH 2
#define I915_DST_VARS 4
#define I915_DST_RECT 8
static inline
void i915_set_flush_dirty(struct i915_context *i915, unsigned flush)
static inline void
i915_set_flush_dirty(struct i915_context *i915, unsigned flush)
{
i915->hardware_dirty |= I915_HW_FLUSH;
i915->flush_dirty |= flush;
}
/***********************************************************************
* i915_prim_emit.c:
* i915_prim_emit.c:
*/
struct draw_stage *i915_draw_render_stage( struct i915_context *i915 );
struct draw_stage *i915_draw_render_stage(struct i915_context *i915);
/***********************************************************************
* i915_prim_vbuf.c:
* i915_prim_vbuf.c:
*/
struct draw_stage *i915_draw_vbuf_stage( struct i915_context *i915 );
struct draw_stage *i915_draw_vbuf_stage(struct i915_context *i915);
/***********************************************************************
* i915_state_emit.c:
* i915_state_emit.c:
*/
void i915_emit_hardware_state(struct i915_context *i915 );
void i915_emit_hardware_state(struct i915_context *i915);
/***********************************************************************
* i915_clear.c:
* i915_clear.c:
*/
void i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color,
double depth, unsigned stencil);
const union pipe_color_union *color, double depth,
unsigned stencil);
void i915_clear_render(struct pipe_context *pipe, unsigned buffers,
const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color,
double depth, unsigned stencil);
const union pipe_color_union *color, double depth,
unsigned stencil);
void i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil,
unsigned destx, unsigned desty, unsigned width, unsigned height);
const union pipe_color_union *color, double depth,
unsigned stencil, unsigned destx, unsigned desty,
unsigned width, unsigned height);
/***********************************************************************
*
*
*/
void i915_init_state_functions( struct i915_context *i915 );
void i915_init_flush_functions( struct i915_context *i915 );
void i915_init_string_functions( struct i915_context *i915 );
void i915_init_state_functions(struct i915_context *i915);
void i915_init_flush_functions(struct i915_context *i915);
void i915_init_string_functions(struct i915_context *i915);
/************************************************************************
* i915_context.c
*/
struct pipe_context *i915_create_context(struct pipe_screen *screen,
void *priv, unsigned flags);
struct pipe_context *i915_create_context(struct pipe_screen *screen, void *priv,
unsigned flags);
/***********************************************************************
* Inline conversion functions. These are better-typed than the
* macros used previously:
*/
static inline struct i915_context *
i915_context( struct pipe_context *pipe )
i915_context(struct pipe_context *pipe)
{
return (struct i915_context *)pipe;
}

915
src/gallium/drivers/i915/i915_debug.c
View File

File diff suppressed because it is too large Load Diff

15
src/gallium/drivers/i915/i915_debug.h
View File

@ -1,5 +1,5 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Authors: Keith Whitwell <keithw@vmware.com>
@ -58,7 +58,7 @@ static inline void
I915_DBG(unsigned flags, const char *fmt, ...)
{
if (I915_DBG_ON(flags)) {
va_list args;
va_list args;
va_start(args, fmt);
debug_vprintf(fmt, args);
@ -67,7 +67,10 @@ I915_DBG(unsigned flags, const char *fmt, ...)
}
#else
#define I915_DBG_ON(flags) (0)
static inline void I915_DBG(unsigned flags, const char *fmt, ...) {}
static inline void
I915_DBG(unsigned flags, const char *fmt, ...)
{
}
#endif
void i915_debug_init(struct i915_screen *i915);

169
src/gallium/drivers/i915/i915_debug_fp.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,100 +22,52 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_reg.h"
#include "util/log.h"
#include "util/ralloc.h"
#include "util/u_debug.h"
#include "i915_debug.h"
#include "i915_debug_private.h"
#include "util/log.h"
#include "util/u_debug.h"
#include "util/ralloc.h"
#include "i915_reg.h"
#define PRINTF ralloc_asprintf_append
static const char *opcodes[0x20] = {
"NOP",
"ADD",
"MOV",
"MUL",
"MAD",
"DP2ADD",
"DP3",
"DP4",
"FRC",
"RCP",
"RSQ",
"EXP",
"LOG",
"CMP",
"MIN",
"MAX",
"FLR",
"MOD",
"TRC",
"SGE",
"SLT",
"TEXLD",
"TEXLDP",
"TEXLDB",
"TEXKILL",
"DCL",
"0x1a",
"0x1b",
"0x1c",
"0x1d",
"0x1e",
"0x1f",
"NOP", "ADD", "MOV", "MUL", "MAD", "DP2ADD", "DP3", "DP4",
"FRC", "RCP", "RSQ", "EXP", "LOG", "CMP", "MIN", "MAX",
"FLR", "MOD", "TRC", "SGE", "SLT", "TEXLD", "TEXLDP", "TEXLDB",
"TEXKILL", "DCL", "0x1a", "0x1b", "0x1c", "0x1d", "0x1e", "0x1f",
};
static const int args[0x20] = {
0, /* 0 nop */
2, /* 1 add */
1, /* 2 mov */
2, /* 3 m ul */
3, /* 4 mad */
3, /* 5 dp2add */
2, /* 6 dp3 */
2, /* 7 dp4 */
1, /* 8 frc */
1, /* 9 rcp */
1, /* a rsq */
1, /* b exp */
1, /* c log */
3, /* d cmp */
2, /* e min */
2, /* f max */
1, /* 10 flr */
1, /* 11 mod */
1, /* 12 trc */
2, /* 13 sge */
2, /* 14 slt */
1,
1,
1,
1,
0,
0,
0,
0,
0,
0,
0,
0, /* 0 nop */
2, /* 1 add */
1, /* 2 mov */
2, /* 3 m ul */
3, /* 4 mad */
3, /* 5 dp2add */
2, /* 6 dp3 */
2, /* 7 dp4 */
1, /* 8 frc */
1, /* 9 rcp */
1, /* a rsq */
1, /* b exp */
1, /* c log */
3, /* d cmp */
2, /* e min */
2, /* f max */
1, /* 10 flr */
1, /* 11 mod */
1, /* 12 trc */
2, /* 13 sge */
2, /* 14 slt */
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
};
static const char *regname[0x8] = {
"R",
"T",
"CONST",
"S",
"OC",
"OD",
"U",
"UNKNOWN",
"R", "T", "CONST", "S", "OC", "OD", "U", "UNKNOWN",
};
static void
@ -157,13 +109,11 @@ print_reg_type_nr(char **stream, unsigned type, unsigned nr)
}
#define REG_SWIZZLE_MASK 0x7777
#define REG_NEGATE_MASK 0x8888
#define REG_SWIZZLE_XYZW ((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) | \
(SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) | \
(SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) | \
(SRC_W << A2_SRC2_CHANNEL_W_SHIFT))
#define REG_NEGATE_MASK 0x8888
#define REG_SWIZZLE_XYZW \
((SRC_X << A2_SRC2_CHANNEL_X_SHIFT) | (SRC_Y << A2_SRC2_CHANNEL_Y_SHIFT) | \
(SRC_Z << A2_SRC2_CHANNEL_Z_SHIFT) | (SRC_W << A2_SRC2_CHANNEL_W_SHIFT))
static void
print_reg_neg_swizzle(char **stream, unsigned reg)
@ -206,7 +156,6 @@ print_reg_neg_swizzle(char **stream, unsigned reg)
}
}
static void
print_src_reg(char **stream, unsigned dword)
{
@ -216,7 +165,6 @@ print_src_reg(char **stream, unsigned dword)
print_reg_neg_swizzle(stream, dword);
}
static void
print_dest_reg(char **stream, unsigned dword)
{
@ -236,15 +184,12 @@ print_dest_reg(char **stream, unsigned dword)
PRINTF(stream, "w");
}
#define GET_SRC0_REG(r0, r1) ((r0<<14)|(r1>>A1_SRC0_CHANNEL_W_SHIFT))
#define GET_SRC1_REG(r0, r1) ((r0<<8)|(r1>>A2_SRC1_CHANNEL_W_SHIFT))
#define GET_SRC0_REG(r0, r1) ((r0 << 14) | (r1 >> A1_SRC0_CHANNEL_W_SHIFT))
#define GET_SRC1_REG(r0, r1) ((r0 << 8) | (r1 >> A2_SRC1_CHANNEL_W_SHIFT))
#define GET_SRC2_REG(r) (r)
static void
print_arith_op(char **stream,
unsigned opcode, const unsigned * program)
print_arith_op(char **stream, unsigned opcode, const unsigned *program)
{
if (opcode != A0_NOP) {
print_dest_reg(stream, program[0]);
@ -270,10 +215,8 @@ print_arith_op(char **stream,
return;
}
static void
print_tex_op(char **stream,
unsigned opcode, const unsigned * program)
print_tex_op(char **stream, unsigned opcode, const unsigned *program)
{
print_dest_reg(stream, program[0] | A0_DEST_CHANNEL_ALL);
PRINTF(stream, " = ");
@ -282,36 +225,30 @@ print_tex_op(char **stream,
PRINTF(stream, "S[%d],", program[0] & T0_SAMPLER_NR_MASK);
print_reg_type_nr(stream,
(program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) &
REG_TYPE_MASK,
print_reg_type_nr(stream,
(program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) & REG_TYPE_MASK,
(program[1] >> T1_ADDRESS_REG_NR_SHIFT) & REG_NR_MASK);
}
static void
print_texkil_op(char **stream,
unsigned opcode, const unsigned * program)
print_texkil_op(char **stream, unsigned opcode, const unsigned *program)
{
PRINTF(stream, "TEXKIL ");
print_reg_type_nr(stream,
(program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) &
REG_TYPE_MASK,
print_reg_type_nr(stream,
(program[1] >> T1_ADDRESS_REG_TYPE_SHIFT) & REG_TYPE_MASK,
(program[1] >> T1_ADDRESS_REG_NR_SHIFT) & REG_NR_MASK);
}
static void
print_dcl_op(char **stream,
unsigned opcode, const unsigned * program)
print_dcl_op(char **stream, unsigned opcode, const unsigned *program)
{
PRINTF(stream, "%s ", opcodes[opcode]);
print_dest_reg(stream,
program[0] | A0_DEST_CHANNEL_ALL);
print_dest_reg(stream, program[0] | A0_DEST_CHANNEL_ALL);
}
void
i915_disassemble_program(const unsigned * program, unsigned sz)
i915_disassemble_program(const unsigned *program, unsigned sz)
{
unsigned i;
@ -342,5 +279,3 @@ i915_disassemble_program(const unsigned * program, unsigned sz)
mesa_logi("\t\tEND");
mesa_logi("\t\t");
}

17
src/gallium/drivers/i915/i915_debug_private.h
View File

@ -1,5 +1,5 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Authors: Keith Whitwell <keithw@vmware.com>
@ -31,11 +31,10 @@
#ifndef I915_DEBUG_PRIVATE_H
#define I915_DEBUG_PRIVATE_H
struct debug_stream
{
unsigned offset; /* current gtt offset */
char *ptr; /* pointer to gtt offset zero */
char *end; /* pointer to gtt offset zero */
struct debug_stream {
unsigned offset; /* current gtt offset */
char *ptr; /* pointer to gtt offset zero */
char *end; /* pointer to gtt offset zero */
unsigned print_addresses;
};

31
src/gallium/drivers/i915/i915_flush.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,25 +22,23 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Author:
* Keith Whitwell <keithw@vmware.com>
*/
#include "pipe/p_defines.h"
#include "draw/draw_context.h"
#include "i915_context.h"
#include "pipe/p_defines.h"
#include "i915_batch.h"
#include "i915_context.h"
#include "i915_debug.h"
#include "i915_reg.h"
static void i915_flush_pipe( struct pipe_context *pipe,
struct pipe_fence_handle **fence,
unsigned flags )
static void
i915_flush_pipe(struct pipe_context *pipe, struct pipe_fence_handle **fence,
unsigned flags)
{
struct i915_context *i915 = i915_context(pipe);
enum i915_winsys_flush_flags winsys_flags = I915_FLUSH_ASYNC;
@ -63,7 +61,8 @@ static void i915_flush_pipe( struct pipe_context *pipe,
I915_DBG(DBG_FLUSH, "%s: #####\n", __FUNCTION__);
}
void i915_init_flush_functions( struct i915_context *i915 )
void
i915_init_flush_functions(struct i915_context *i915)
{
i915->base.flush = i915_flush_pipe;
}
@ -72,9 +71,9 @@ void i915_init_flush_functions( struct i915_context *i915 )
* Here we handle all the notifications that needs to go out on a flush.
* XXX might move above function to i915_pipe_flush.c and leave this here.
*/
void i915_flush(struct i915_context *i915,
struct pipe_fence_handle **fence,
unsigned flags)
void
i915_flush(struct i915_context *i915, struct pipe_fence_handle **fence,
unsigned flags)
{
struct i915_winsys_batchbuffer *batch = i915->batch;

292
src/gallium/drivers/i915/i915_fpc.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,14 +22,12 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_FPC_H
#define I915_FPC_H
#include "i915_context.h"
#include "i915_reg.h"
@ -43,12 +41,11 @@
#define I915_SEMANTIC_POS 100
#define I915_SEMANTIC_FACE 101
/**
* Program translation state
*/
struct i915_fp_compile {
struct i915_fragment_shader *shader; /* the shader we're compiling */
struct i915_fragment_shader *shader; /* the shader we're compiling */
boolean used_constants[I915_MAX_CONSTANT];
@ -62,15 +59,15 @@ struct i915_fp_compile {
uint declarations[I915_PROGRAM_SIZE];
uint program[I915_PROGRAM_SIZE];
uint *csr; /**< Cursor, points into program. */
uint *csr; /**< Cursor, points into program. */
uint *decl; /**< Cursor, points into declarations. */
uint *decl; /**< Cursor, points into declarations. */
uint decl_s; /**< flags for which s regs need to be decl'd */
uint decl_t; /**< flags for which t regs need to be decl'd */
uint decl_s; /**< flags for which s regs need to be decl'd */
uint decl_t; /**< flags for which t regs need to be decl'd */
uint temp_flag; /**< Tracks temporary regs which are in use */
uint utemp_flag; /**< Tracks TYPE_U temporary regs which are in use */
uint temp_flag; /**< Tracks temporary regs which are in use */
uint utemp_flag; /**< Tracks TYPE_U temporary regs which are in use */
uint register_phases[I915_MAX_TEMPORARY];
uint nr_tex_indirect;
@ -78,33 +75,32 @@ struct i915_fp_compile {
uint nr_alu_insn;
uint nr_decl_insn;
boolean error; /**< Set if i915_program_error() is called */
boolean error; /**< Set if i915_program_error() is called */
uint NumNativeInstructions;
uint NumNativeAluInstructions;
uint NumNativeTexInstructions;
uint NumNativeTexIndirections;
};
/* Having zero and one in here makes the definition of swizzle a lot
* easier.
*/
#define UREG_TYPE_SHIFT 29
#define UREG_NR_SHIFT 24
#define UREG_CHANNEL_X_NEGATE_SHIFT 23
#define UREG_CHANNEL_X_SHIFT 20
#define UREG_CHANNEL_Y_NEGATE_SHIFT 19
#define UREG_CHANNEL_Y_SHIFT 16
#define UREG_CHANNEL_Z_NEGATE_SHIFT 15
#define UREG_CHANNEL_Z_SHIFT 12
#define UREG_CHANNEL_W_NEGATE_SHIFT 11
#define UREG_CHANNEL_W_SHIFT 8
#define UREG_CHANNEL_ZERO_NEGATE_MBZ 5
#define UREG_CHANNEL_ZERO_SHIFT 4
#define UREG_CHANNEL_ONE_NEGATE_MBZ 1
#define UREG_CHANNEL_ONE_SHIFT 0
#define UREG_TYPE_SHIFT 29
#define UREG_NR_SHIFT 24
#define UREG_CHANNEL_X_NEGATE_SHIFT 23
#define UREG_CHANNEL_X_SHIFT 20
#define UREG_CHANNEL_Y_NEGATE_SHIFT 19
#define UREG_CHANNEL_Y_SHIFT 16
#define UREG_CHANNEL_Z_NEGATE_SHIFT 15
#define UREG_CHANNEL_Z_SHIFT 12
#define UREG_CHANNEL_W_NEGATE_SHIFT 11
#define UREG_CHANNEL_W_SHIFT 8
#define UREG_CHANNEL_ZERO_NEGATE_MBZ 5
#define UREG_CHANNEL_ZERO_SHIFT 4
#define UREG_CHANNEL_ONE_NEGATE_MBZ 1
#define UREG_CHANNEL_ONE_SHIFT 0
#define UREG_BAD 0xffffffff /* not a valid ureg */
#define UREG_BAD 0xffffffff /* not a valid ureg */
#define X SRC_X
#define Y SRC_Y
@ -115,26 +111,21 @@ struct i915_fp_compile {
/* Construct a ureg:
*/
#define UREG( type, nr ) (((type)<< UREG_TYPE_SHIFT) | \
((nr) << UREG_NR_SHIFT) | \
(X << UREG_CHANNEL_X_SHIFT) | \
(Y << UREG_CHANNEL_Y_SHIFT) | \
(Z << UREG_CHANNEL_Z_SHIFT) | \
(W << UREG_CHANNEL_W_SHIFT) | \
(ZERO << UREG_CHANNEL_ZERO_SHIFT) | \
(ONE << UREG_CHANNEL_ONE_SHIFT))
#define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20))
#define CHANNEL_SRC( src, channel ) (src>>(channel*4))
#define GET_UREG_TYPE(reg) (((reg)>>UREG_TYPE_SHIFT)&REG_TYPE_MASK)
#define GET_UREG_NR(reg) (((reg)>>UREG_NR_SHIFT)&REG_NR_MASK)
#define UREG(type, nr) \
(((type) << UREG_TYPE_SHIFT) | ((nr) << UREG_NR_SHIFT) | \
(X << UREG_CHANNEL_X_SHIFT) | (Y << UREG_CHANNEL_Y_SHIFT) | \
(Z << UREG_CHANNEL_Z_SHIFT) | (W << UREG_CHANNEL_W_SHIFT) | \
(ZERO << UREG_CHANNEL_ZERO_SHIFT) | (ONE << UREG_CHANNEL_ONE_SHIFT))
#define GET_CHANNEL_SRC(reg, channel) ((reg << (channel * 4)) & (0xf << 20))
#define CHANNEL_SRC(src, channel) (src >> (channel * 4))
#define GET_UREG_TYPE(reg) (((reg) >> UREG_TYPE_SHIFT) & REG_TYPE_MASK)
#define GET_UREG_NR(reg) (((reg) >> UREG_NR_SHIFT) & REG_NR_MASK)
#define UREG_XYZW_CHANNEL_MASK 0x00ffff00
/* One neat thing about the UREG representation:
/* One neat thing about the UREG representation:
*/
static inline int
swizzle(int reg, uint x, uint y, uint z, uint w)
@ -150,176 +141,145 @@ swizzle(int reg, uint x, uint y, uint z, uint w)
CHANNEL_SRC(GET_CHANNEL_SRC(reg, w), 3));
}
#define A0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
#define D0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
#define T0_DEST( reg ) (((reg)&UREG_TYPE_NR_MASK)>>UREG_A0_DEST_SHIFT_LEFT)
#define A0_SRC0( reg ) (((reg)&UREG_MASK)>>UREG_A0_SRC0_SHIFT_LEFT)
#define A1_SRC0( reg ) (((reg)&UREG_MASK)<<UREG_A1_SRC0_SHIFT_RIGHT)
#define A1_SRC1( reg ) (((reg)&UREG_MASK)>>UREG_A1_SRC1_SHIFT_LEFT)
#define A2_SRC1( reg ) (((reg)&UREG_MASK)<<UREG_A2_SRC1_SHIFT_RIGHT)
#define A2_SRC2( reg ) (((reg)&UREG_MASK)>>UREG_A2_SRC2_SHIFT_LEFT)
#define A0_DEST(reg) (((reg)&UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT)
#define D0_DEST(reg) (((reg)&UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT)
#define T0_DEST(reg) (((reg)&UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT)
#define A0_SRC0(reg) (((reg)&UREG_MASK) >> UREG_A0_SRC0_SHIFT_LEFT)
#define A1_SRC0(reg) (((reg)&UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT)
#define A1_SRC1(reg) (((reg)&UREG_MASK) >> UREG_A1_SRC1_SHIFT_LEFT)
#define A2_SRC1(reg) (((reg)&UREG_MASK) << UREG_A2_SRC1_SHIFT_RIGHT)
#define A2_SRC2(reg) (((reg)&UREG_MASK) >> UREG_A2_SRC2_SHIFT_LEFT)
/* These are special, and don't have swizzle/negate bits.
*/
#define T0_SAMPLER( reg ) (GET_UREG_NR(reg)<<T0_SAMPLER_NR_SHIFT)
#define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg)<<T1_ADDRESS_REG_NR_SHIFT) | \
(GET_UREG_TYPE(reg)<<T1_ADDRESS_REG_TYPE_SHIFT))
#define T0_SAMPLER(reg) (GET_UREG_NR(reg) << T0_SAMPLER_NR_SHIFT)
#define T1_ADDRESS_REG(reg) \
((GET_UREG_NR(reg) << T1_ADDRESS_REG_NR_SHIFT) | \
(GET_UREG_TYPE(reg) << T1_ADDRESS_REG_TYPE_SHIFT))
/* Macros for translating UREG's into the various register fields used
* by the I915 programmable unit.
*/
#define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
#define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
#define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
#define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
#define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
#define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
#define UREG_MASK 0xffffff00
#define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \
(REG_NR_MASK << UREG_NR_SHIFT))
#define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT)
#define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT)
#define UREG_A1_SRC0_SHIFT_RIGHT \
(A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
#define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT)
#define UREG_A2_SRC1_SHIFT_RIGHT \
(A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT)
#define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT)
#define UREG_MASK 0xffffff00
#define UREG_TYPE_NR_MASK \
((REG_TYPE_MASK << UREG_TYPE_SHIFT) | (REG_NR_MASK << UREG_NR_SHIFT))
/***********************************************************************
* Public interface for the compiler
*/
extern void
i915_translate_fragment_program( struct i915_context *i915,
struct i915_fragment_shader *fs);
extern void i915_translate_fragment_program(struct i915_context *i915,
struct i915_fragment_shader *fs);
extern uint i915_get_temp(struct i915_fp_compile *p);
extern uint i915_get_utemp(struct i915_fp_compile *p);
extern void i915_release_utemps(struct i915_fp_compile *p);
extern uint i915_emit_texld(struct i915_fp_compile *p, uint dest, uint destmask,
uint sampler, uint coord, uint op, uint num_coord);
extern uint i915_emit_texld(struct i915_fp_compile *p,
uint dest,
uint destmask,
uint sampler,
uint coord,
uint op,
uint num_coord);
extern uint i915_emit_arith(struct i915_fp_compile *p,
uint op,
uint dest,
uint mask,
uint saturate,
uint src0, uint src1, uint src2);
extern uint i915_emit_decl(struct i915_fp_compile *p,
uint type, uint nr, uint d0_flags);
extern uint i915_emit_arith(struct i915_fp_compile *p, uint op, uint dest,
uint mask, uint saturate, uint src0, uint src1,
uint src2);
extern uint i915_emit_decl(struct i915_fp_compile *p, uint type, uint nr,
uint d0_flags);
extern uint i915_emit_const1f(struct i915_fp_compile *p, float c0);
extern uint i915_emit_const2f(struct i915_fp_compile *p,
float c0, float c1);
extern uint i915_emit_const2f(struct i915_fp_compile *p, float c0, float c1);
extern uint i915_emit_const4fv(struct i915_fp_compile *p,
const float * c);
extern uint i915_emit_const4f(struct i915_fp_compile *p,
float c0, float c1,
float c2, float c3);
extern uint i915_emit_const4fv(struct i915_fp_compile *p, const float *c);
extern uint i915_emit_const4f(struct i915_fp_compile *p, float c0, float c1,
float c2, float c3);
/*======================================================================
* i915_fpc_translate.c
*/
extern void
i915_program_error(struct i915_fp_compile *p, const char *msg, ...);
extern void i915_program_error(struct i915_fp_compile *p, const char *msg, ...);
/*======================================================================
* i915_fpc_optimize.c
*/
struct i915_src_register
{
unsigned File : 4; /* TGSI_FILE_ */
unsigned Indirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
int Index : 16; /* SINT */
unsigned SwizzleX : 3; /* TGSI_SWIZZLE_ */
unsigned SwizzleY : 3; /* TGSI_SWIZZLE_ */
unsigned SwizzleZ : 3; /* TGSI_SWIZZLE_ */
unsigned SwizzleW : 3; /* TGSI_SWIZZLE_ */
unsigned Absolute : 1; /* BOOL */
unsigned Negate : 1; /* BOOL */
struct i915_src_register {
unsigned File : 4; /* TGSI_FILE_ */
unsigned Indirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
int Index : 16; /* SINT */
unsigned SwizzleX : 3; /* TGSI_SWIZZLE_ */
unsigned SwizzleY : 3; /* TGSI_SWIZZLE_ */
unsigned SwizzleZ : 3; /* TGSI_SWIZZLE_ */
unsigned SwizzleW : 3; /* TGSI_SWIZZLE_ */
unsigned Absolute : 1; /* BOOL */
unsigned Negate : 1; /* BOOL */
};
/* Additional swizzle supported in i915 */
#define TGSI_SWIZZLE_ZERO 4
#define TGSI_SWIZZLE_ONE 5
#define TGSI_SWIZZLE_ONE 5
struct i915_dst_register
{
unsigned File : 4; /* TGSI_FILE_ */
unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */
unsigned Indirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
int Index : 16; /* SINT */
unsigned Padding : 6;
struct i915_dst_register {
unsigned File : 4; /* TGSI_FILE_ */
unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */
unsigned Indirect : 1; /* BOOL */
unsigned Dimension : 1; /* BOOL */
int Index : 16; /* SINT */
unsigned Padding : 6;
};
struct i915_full_dst_register
{
struct i915_dst_register Register;
/*
struct tgsi_ind_register Indirect;
struct tgsi_dimension Dimension;
struct tgsi_ind_register DimIndirect;
*/
struct i915_full_dst_register {
struct i915_dst_register Register;
/*
struct tgsi_ind_register Indirect;
struct tgsi_dimension Dimension;
struct tgsi_ind_register DimIndirect;
*/
};
struct i915_full_src_register
{
struct i915_src_register Register;
/*
struct tgsi_ind_register Indirect;
struct tgsi_dimension Dimension;
struct tgsi_ind_register DimIndirect;
*/
struct i915_full_src_register {
struct i915_src_register Register;
/*
struct tgsi_ind_register Indirect;
struct tgsi_dimension Dimension;
struct tgsi_ind_register DimIndirect;
*/
};
struct i915_full_instruction
{
struct tgsi_instruction Instruction;
/*
struct tgsi_instruction_label Label;
*/
struct tgsi_instruction_texture Texture;
struct i915_full_dst_register Dst[1];
struct i915_full_src_register Src[3];
struct i915_full_instruction {
struct tgsi_instruction Instruction;
/*
struct tgsi_instruction_label Label;
*/
struct tgsi_instruction_texture Texture;
struct i915_full_dst_register Dst[1];
struct i915_full_src_register Src[3];
};
union i915_full_token
{
struct tgsi_token Token;
struct tgsi_full_declaration FullDeclaration;
struct tgsi_full_immediate FullImmediate;
struct i915_full_instruction FullInstruction;
struct tgsi_full_property FullProperty;
union i915_full_token {
struct tgsi_token Token;
struct tgsi_full_declaration FullDeclaration;
struct tgsi_full_immediate FullImmediate;
struct i915_full_instruction FullInstruction;
struct tgsi_full_property FullProperty;
};
struct i915_token_list
{
union i915_full_token* Tokens;
unsigned NumTokens;
struct i915_token_list {
union i915_full_token *Tokens;
unsigned NumTokens;
};
extern struct i915_token_list* i915_optimize(const struct tgsi_token *tokens);
extern struct i915_token_list *i915_optimize(const struct tgsi_token *tokens);
extern void i915_optimize_free(struct i915_token_list *tokens);

141
src/gallium/drivers/i915/i915_fpc_emit.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,13 +22,13 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_reg.h"
#include "util/u_math.h"
#include "i915_context.h"
#include "i915_fpc.h"
#include "util/u_math.h"
#include "i915_reg.h"
uint
i915_get_temp(struct i915_fp_compile *p)
@ -43,20 +43,18 @@ i915_get_temp(struct i915_fp_compile *p)
return bit - 1;
}
static void
i915_release_temp(struct i915_fp_compile *p, int reg)
{
p->temp_flag &= ~(1 << reg);
}
/**
* Get unpreserved temporary, a temp whose value is not preserved between
* PS program phases.
*/
uint
i915_get_utemp(struct i915_fp_compile * p)
i915_get_utemp(struct i915_fp_compile *p)
{
int bit = ffs(~p->utemp_flag);
if (!bit) {
@ -74,10 +72,8 @@ i915_release_utemps(struct i915_fp_compile *p)
p->utemp_flag = ~0x7;
}
uint
i915_emit_decl(struct i915_fp_compile *p,
uint type, uint nr, uint d0_flags)
i915_emit_decl(struct i915_fp_compile *p, uint type, uint nr, uint d0_flags)
{
uint reg = UREG(type, nr);
@ -86,22 +82,19 @@ i915_emit_decl(struct i915_fp_compile *p,
return reg;
p->decl_t |= (1 << nr);
}
else if (type == REG_TYPE_S) {
} else if (type == REG_TYPE_S) {
if (p->decl_s & (1 << nr))
return reg;
p->decl_s |= (1 << nr);
}
else
} else
return reg;
if (p->decl< p->declarations + I915_PROGRAM_SIZE) {
if (p->decl < p->declarations + I915_PROGRAM_SIZE) {
*(p->decl++) = (D0_DCL | D0_DEST(reg) | d0_flags);
*(p->decl++) = D1_MBZ;
*(p->decl++) = D2_MBZ;
}
else
} else
i915_program_error(p, "Out of declarations");
p->nr_decl_insn++;
@ -109,10 +102,7 @@ i915_emit_decl(struct i915_fp_compile *p,
}
uint
i915_emit_arith(struct i915_fp_compile * p,
uint op,
uint dest,
uint mask,
i915_emit_arith(struct i915_fp_compile *p, uint op, uint dest, uint mask,
uint saturate, uint src0, uint src1, uint src2)
{
uint c[3];
@ -147,8 +137,8 @@ i915_emit_arith(struct i915_fp_compile * p,
if (GET_UREG_NR(s[c[i]]) != first) {
uint tmp = i915_get_utemp(p);
i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0,
s[c[i]], 0, 0);
i915_emit_arith(p, A0_MOV, tmp, A0_DEST_CHANNEL_ALL, 0, s[c[i]], 0,
0);
s[c[i]] = tmp;
}
}
@ -156,15 +146,14 @@ i915_emit_arith(struct i915_fp_compile * p,
src0 = s[0];
src1 = s[1];
src2 = s[2];
p->utemp_flag = old_utemp_flag; /* restore */
p->utemp_flag = old_utemp_flag; /* restore */
}
if (p->csr< p->program + I915_PROGRAM_SIZE) {
if (p->csr < p->program + I915_PROGRAM_SIZE) {
*(p->csr++) = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
*(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1));
*(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));
}
else
} else
i915_program_error(p, "Out of instructions");
if (GET_UREG_TYPE(dest) == REG_TYPE_R)
@ -174,7 +163,6 @@ i915_emit_arith(struct i915_fp_compile * p,
return dest;
}
/**
* Emit a texture load or texkill instruction.
* \param dest the dest i915 register
@ -183,13 +171,9 @@ i915_emit_arith(struct i915_fp_compile * p,
* \param coord the i915 source texcoord operand
* \param opcode the instruction opcode
*/
uint i915_emit_texld( struct i915_fp_compile *p,
uint dest,
uint destmask,
uint sampler,
uint coord,
uint opcode,
uint num_coord )
uint
i915_emit_texld(struct i915_fp_compile *p, uint dest, uint destmask,
uint sampler, uint coord, uint opcode, uint num_coord)
{
const uint k = UREG(GET_UREG_TYPE(coord), GET_UREG_NR(coord));
@ -198,48 +182,49 @@ uint i915_emit_texld( struct i915_fp_compile *p,
/* Eliminate the useless texture coordinates. Otherwise we end up generating
* a swizzle for no reason below. */
switch(num_coord) {
case 0:
ignore |= (0xf << UREG_CHANNEL_X_SHIFT);
FALLTHROUGH;
case 1:
ignore |= (0xf << UREG_CHANNEL_Y_SHIFT);
FALLTHROUGH;
case 2:
ignore |= (0xf << UREG_CHANNEL_Z_SHIFT);
FALLTHROUGH;
case 3:
ignore |= (0xf << UREG_CHANNEL_W_SHIFT);
switch (num_coord) {
case 0:
ignore |= (0xf << UREG_CHANNEL_X_SHIFT);
FALLTHROUGH;
case 1:
ignore |= (0xf << UREG_CHANNEL_Y_SHIFT);
FALLTHROUGH;
case 2:
ignore |= (0xf << UREG_CHANNEL_Z_SHIFT);
FALLTHROUGH;
case 3:
ignore |= (0xf << UREG_CHANNEL_W_SHIFT);
}
if ( (coord & ~ignore ) != (k & ~ignore) || GET_UREG_TYPE(coord) == REG_TYPE_CONST) {
if ((coord & ~ignore) != (k & ~ignore) ||
GET_UREG_TYPE(coord) == REG_TYPE_CONST) {
/* texcoord is swizzled or negated. Need to allocate a new temporary
* register (a utemp / unpreserved temp) won't do.
*/
uint tempReg;
temp = i915_get_temp(p); /* get temp reg index */
tempReg = UREG(REG_TYPE_R, temp); /* make i915 register */
temp = i915_get_temp(p); /* get temp reg index */
tempReg = UREG(REG_TYPE_R, temp); /* make i915 register */
i915_emit_arith( p, A0_MOV,
tempReg, A0_DEST_CHANNEL_ALL, /* dest reg, writemask */
0, /* saturate */
coord, 0, 0 ); /* src0, src1, src2 */
i915_emit_arith(p, A0_MOV, tempReg,
A0_DEST_CHANNEL_ALL, /* dest reg, writemask */
0, /* saturate */
coord, 0, 0); /* src0, src1, src2 */
/* new src texcoord is tempReg */
coord = tempReg;
}
/* Don't worry about saturate as we only support
/* Don't worry about saturate as we only support
*/
if (destmask != A0_DEST_CHANNEL_ALL) {
/* if not writing to XYZW... */
uint tmp = i915_get_utemp(p);
i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, opcode, num_coord );
i915_emit_arith( p, A0_MOV, dest, destmask, 0, tmp, 0, 0 );
i915_emit_texld(p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, opcode,
num_coord);
i915_emit_arith(p, A0_MOV, dest, destmask, 0, tmp, 0, 0);
/* XXX release utemp here? */
}
else {
} else {
assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST);
assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)));
@ -255,15 +240,12 @@ uint i915_emit_texld( struct i915_fp_compile *p,
p->register_phases[GET_UREG_NR(coord)] == p->nr_tex_indirect)
p->nr_tex_indirect++;
if (p->csr< p->program + I915_PROGRAM_SIZE) {
*(p->csr++) = (opcode |
T0_DEST( dest ) |
T0_SAMPLER( sampler ));
if (p->csr < p->program + I915_PROGRAM_SIZE) {
*(p->csr++) = (opcode | T0_DEST(dest) | T0_SAMPLER(sampler));
*(p->csr++) = T1_ADDRESS_REG( coord );
*(p->csr++) = T1_ADDRESS_REG(coord);
*(p->csr++) = T2_MBZ;
}
else
} else
i915_program_error(p, "Out of instructions");
if (GET_UREG_TYPE(dest) == REG_TYPE_R)
@ -278,9 +260,8 @@ uint i915_emit_texld( struct i915_fp_compile *p,
return dest;
}
uint
i915_emit_const1f(struct i915_fp_compile * p, float c0)
i915_emit_const1f(struct i915_fp_compile *p, float c0)
{
struct i915_fragment_shader *ifs = p->shader;
unsigned reg, idx;
@ -310,7 +291,7 @@ i915_emit_const1f(struct i915_fp_compile * p, float c0)
}
uint
i915_emit_const2f(struct i915_fp_compile * p, float c0, float c1)
i915_emit_const2f(struct i915_fp_compile *p, float c0, float c1)
{
struct i915_fragment_shader *ifs = p->shader;
unsigned reg, idx;
@ -348,8 +329,8 @@ i915_emit_const2f(struct i915_fp_compile * p, float c0, float c1)
}
uint
i915_emit_const4f(struct i915_fp_compile * p,
float c0, float c1, float c2, float c3)
i915_emit_const4f(struct i915_fp_compile *p, float c0, float c1, float c2,
float c3)
{
struct i915_fragment_shader *ifs = p->shader;
unsigned reg;
@ -357,14 +338,11 @@ i915_emit_const4f(struct i915_fp_compile * p,
// XXX emit swizzle here for 0, 1, -1 and any combination thereof
// we can use swizzle + neg for that
for (reg = 0; reg < I915_MAX_CONSTANT; reg++) {
if (ifs->constant_flags[reg] == 0xf &&
ifs->constants[reg][0] == c0 &&
ifs->constants[reg][1] == c1 &&
ifs->constants[reg][2] == c2 &&
if (ifs->constant_flags[reg] == 0xf && ifs->constants[reg][0] == c0 &&
ifs->constants[reg][1] == c1 && ifs->constants[reg][2] == c2 &&
ifs->constants[reg][3] == c3) {
return UREG(REG_TYPE_CONST, reg);
}
else if (ifs->constant_flags[reg] == 0) {
} else if (ifs->constant_flags[reg] == 0) {
ifs->constants[reg][0] = c0;
ifs->constants[reg][1] = c1;
@ -381,9 +359,8 @@ i915_emit_const4f(struct i915_fp_compile * p,
return 0;
}
uint
i915_emit_const4fv(struct i915_fp_compile * p, const float * c)
i915_emit_const4fv(struct i915_fp_compile *p, const float *c)
{
return i915_emit_const4f(p, c[0], c[1], c[2], c[3]);
}

562
src/gallium/drivers/i915/i915_fpc_optimize.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2011 The Chromium OS authors.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,28 +22,29 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_reg.h"
#include "i915_context.h"
#include "i915_fpc.h"
#include "i915_reg.h"
#include "pipe/p_shader_tokens.h"
#include "tgsi/tgsi_dump.h"
#include "tgsi/tgsi_exec.h"
#include "tgsi/tgsi_parse.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_string.h"
#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_dump.h"
#include "tgsi/tgsi_exec.h"
struct i915_optimize_context
{
struct i915_optimize_context {
int first_write[TGSI_EXEC_NUM_TEMPS];
int last_read[TGSI_EXEC_NUM_TEMPS];
};
static boolean same_src_dst_reg(struct i915_full_src_register *s1, struct i915_full_dst_register *d1)
static boolean
same_src_dst_reg(struct i915_full_src_register *s1,
struct i915_full_dst_register *d1)
{
return (s1->Register.File == d1->Register.File &&
s1->Register.Indirect == d1->Register.Indirect &&
@ -51,7 +52,9 @@ static boolean same_src_dst_reg(struct i915_full_src_register *s1, struct i915_f
s1->Register.Index == d1->Register.Index);
}
static boolean same_dst_reg(struct i915_full_dst_register *d1, struct i915_full_dst_register *d2)
static boolean
same_dst_reg(struct i915_full_dst_register *d1,
struct i915_full_dst_register *d2)
{
return (d1->Register.File == d2->Register.File &&
d1->Register.Indirect == d2->Register.Indirect &&
@ -59,7 +62,9 @@ static boolean same_dst_reg(struct i915_full_dst_register *d1, struct i915_full_
d1->Register.Index == d2->Register.Index);
}
static boolean same_src_reg(struct i915_full_src_register *d1, struct i915_full_src_register *d2)
static boolean
same_src_reg(struct i915_full_src_register *d1,
struct i915_full_src_register *d2)
{
return (d1->Register.File == d2->Register.File &&
d1->Register.Indirect == d2->Register.Indirect &&
@ -75,114 +80,120 @@ static const struct {
unsigned neutral_element;
unsigned num_dst;
unsigned num_src;
} op_table [TGSI_OPCODE_LAST] = {
[ TGSI_OPCODE_ADD ] = { false, true, TGSI_SWIZZLE_ZERO, 1, 2 },
[ TGSI_OPCODE_CEIL ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_CMP ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_COS ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_DDX ] = { false, false, 0, 1, 0 },
[ TGSI_OPCODE_DDY ] = { false, false, 0, 1, 0 },
[ TGSI_OPCODE_DP2 ] = { false, true, TGSI_SWIZZLE_ONE, 1, 2 },
[ TGSI_OPCODE_DP3 ] = { false, true, TGSI_SWIZZLE_ONE, 1, 2 },
[ TGSI_OPCODE_DP4 ] = { false, true, TGSI_SWIZZLE_ONE, 1, 2 },
[ TGSI_OPCODE_DST ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_END ] = { false, false, 0, 0, 0 },
[ TGSI_OPCODE_EX2 ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_FLR ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_FRC ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_KILL_IF ] = { false, false, 0, 0, 1 },
[ TGSI_OPCODE_KILL ] = { false, false, 0, 0, 0 },
[ TGSI_OPCODE_LG2 ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_LIT ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_LRP ] = { false, false, 0, 1, 3 },
[ TGSI_OPCODE_MAX ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_MAD ] = { false, false, 0, 1, 3 },
[ TGSI_OPCODE_MIN ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_MOV ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_MUL ] = { false, true, TGSI_SWIZZLE_ONE, 1, 2 },
[ TGSI_OPCODE_NOP ] = { false, false, 0, 0, 0 },
[ TGSI_OPCODE_POW ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_RCP ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_RET ] = { false, false, 0, 0, 0 },
[ TGSI_OPCODE_RSQ ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_SEQ ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_SGE ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_SGT ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_SIN ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_SLE ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_SLT ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_SNE ] = { false, false, 0, 1, 2 },
[ TGSI_OPCODE_SSG ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_TEX ] = { true, false, 0, 1, 2 },
[ TGSI_OPCODE_TRUNC ] = { false, false, 0, 1, 1 },
[ TGSI_OPCODE_TXB ] = { true, false, 0, 1, 2 },
[ TGSI_OPCODE_TXP ] = { true, false, 0, 1, 2 },
} op_table[TGSI_OPCODE_LAST] = {
[TGSI_OPCODE_ADD] = {false, true, TGSI_SWIZZLE_ZERO, 1, 2},
[TGSI_OPCODE_CEIL] = {false, false, 0, 1, 1},
[TGSI_OPCODE_CMP] = {false, false, 0, 1, 2},
[TGSI_OPCODE_COS] = {false, false, 0, 1, 1},
[TGSI_OPCODE_DDX] = {false, false, 0, 1, 0},
[TGSI_OPCODE_DDY] = {false, false, 0, 1, 0},
[TGSI_OPCODE_DP2] = {false, true, TGSI_SWIZZLE_ONE, 1, 2},
[TGSI_OPCODE_DP3] = {false, true, TGSI_SWIZZLE_ONE, 1, 2},
[TGSI_OPCODE_DP4] = {false, true, TGSI_SWIZZLE_ONE, 1, 2},
[TGSI_OPCODE_DST] = {false, false, 0, 1, 2},
[TGSI_OPCODE_END] = {false, false, 0, 0, 0},
[TGSI_OPCODE_EX2] = {false, false, 0, 1, 1},
[TGSI_OPCODE_FLR] = {false, false, 0, 1, 1},
[TGSI_OPCODE_FRC] = {false, false, 0, 1, 1},
[TGSI_OPCODE_KILL_IF] = {false, false, 0, 0, 1},
[TGSI_OPCODE_KILL] = {false, false, 0, 0, 0},
[TGSI_OPCODE_LG2] = {false, false, 0, 1, 1},
[TGSI_OPCODE_LIT] = {false, false, 0, 1, 1},
[TGSI_OPCODE_LRP] = {false, false, 0, 1, 3},
[TGSI_OPCODE_MAX] = {false, false, 0, 1, 2},
[TGSI_OPCODE_MAD] = {false, false, 0, 1, 3},
[TGSI_OPCODE_MIN] = {false, false, 0, 1, 2},
[TGSI_OPCODE_MOV] = {false, false, 0, 1, 1},
[TGSI_OPCODE_MUL] = {false, true, TGSI_SWIZZLE_ONE, 1, 2},
[TGSI_OPCODE_NOP] = {false, false, 0, 0, 0},
[TGSI_OPCODE_POW] = {false, false, 0, 1, 2},
[TGSI_OPCODE_RCP] = {false, false, 0, 1, 1},
[TGSI_OPCODE_RET] = {false, false, 0, 0, 0},
[TGSI_OPCODE_RSQ] = {false, false, 0, 1, 1},
[TGSI_OPCODE_SEQ] = {false, false, 0, 1, 2},
[TGSI_OPCODE_SGE] = {false, false, 0, 1, 2},
[TGSI_OPCODE_SGT] = {false, false, 0, 1, 2},
[TGSI_OPCODE_SIN] = {false, false, 0, 1, 1},
[TGSI_OPCODE_SLE] = {false, false, 0, 1, 2},
[TGSI_OPCODE_SLT] = {false, false, 0, 1, 2},
[TGSI_OPCODE_SNE] = {false, false, 0, 1, 2},
[TGSI_OPCODE_SSG] = {false, false, 0, 1, 1},
[TGSI_OPCODE_TEX] = {true, false, 0, 1, 2},
[TGSI_OPCODE_TRUNC] = {false, false, 0, 1, 1},
[TGSI_OPCODE_TXB] = {true, false, 0, 1, 2},
[TGSI_OPCODE_TXP] = {true, false, 0, 1, 2},
};
static boolean op_has_dst(unsigned opcode)
static boolean
op_has_dst(unsigned opcode)
{
return (op_table[opcode].num_dst > 0);
}
static int op_num_dst(unsigned opcode)
static int
op_num_dst(unsigned opcode)
{
return op_table[opcode].num_dst;
}
static int op_num_src(unsigned opcode)
static int
op_num_src(unsigned opcode)
{
return op_table[opcode].num_src;
}
static boolean op_commutes(unsigned opcode)
static boolean
op_commutes(unsigned opcode)
{
return op_table[opcode].commutes;
}
static unsigned mask_for_unswizzled(int num_components)
static unsigned
mask_for_unswizzled(int num_components)
{
unsigned mask = 0;
switch(num_components)
{
case 4:
mask |= TGSI_WRITEMASK_W;
FALLTHROUGH;
case 3:
mask |= TGSI_WRITEMASK_Z;
FALLTHROUGH;
case 2:
mask |= TGSI_WRITEMASK_Y;
FALLTHROUGH;
case 1:
mask |= TGSI_WRITEMASK_X;
switch (num_components) {
case 4:
mask |= TGSI_WRITEMASK_W;
FALLTHROUGH;
case 3:
mask |= TGSI_WRITEMASK_Z;
FALLTHROUGH;
case 2:
mask |= TGSI_WRITEMASK_Y;
FALLTHROUGH;
case 1:
mask |= TGSI_WRITEMASK_X;
}
return mask;
}
static boolean is_unswizzled(struct i915_full_src_register *r,
unsigned write_mask)
static boolean
is_unswizzled(struct i915_full_src_register *r, unsigned write_mask)
{
if ( write_mask & TGSI_WRITEMASK_X && r->Register.SwizzleX != TGSI_SWIZZLE_X)
if (write_mask & TGSI_WRITEMASK_X && r->Register.SwizzleX != TGSI_SWIZZLE_X)
return FALSE;
if ( write_mask & TGSI_WRITEMASK_Y && r->Register.SwizzleY != TGSI_SWIZZLE_Y)
if (write_mask & TGSI_WRITEMASK_Y && r->Register.SwizzleY != TGSI_SWIZZLE_Y)
return FALSE;
if ( write_mask & TGSI_WRITEMASK_Z && r->Register.SwizzleZ != TGSI_SWIZZLE_Z)
if (write_mask & TGSI_WRITEMASK_Z && r->Register.SwizzleZ != TGSI_SWIZZLE_Z)
return FALSE;
if ( write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W)
if (write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W)
return FALSE;
return TRUE;
}
static boolean op_is_texture(unsigned opcode)
static boolean
op_is_texture(unsigned opcode)
{
return op_table[opcode].is_texture;
}
static unsigned op_neutral_element(unsigned opcode)
static unsigned
op_neutral_element(unsigned opcode)
{
unsigned ne = op_table[opcode].neutral_element;
if (!ne) {
debug_printf("No neutral element for opcode %d\n",opcode);
debug_printf("No neutral element for opcode %d\n", opcode);
ne = TGSI_SWIZZLE_ZERO;
}
return ne;
@ -192,55 +203,59 @@ static unsigned op_neutral_element(unsigned opcode)
* Sets the swizzle to the neutral element for the operation for the bits
* of writemask which are set, swizzle to identity otherwise.
*/
static void set_neutral_element_swizzle(struct i915_full_src_register *r,
unsigned write_mask,
unsigned neutral)
static void
set_neutral_element_swizzle(struct i915_full_src_register *r,
unsigned write_mask, unsigned neutral)
{
if ( write_mask & TGSI_WRITEMASK_X )
if (write_mask & TGSI_WRITEMASK_X)
r->Register.SwizzleX = neutral;
else
r->Register.SwizzleX = TGSI_SWIZZLE_X;
if ( write_mask & TGSI_WRITEMASK_Y )
if (write_mask & TGSI_WRITEMASK_Y)
r->Register.SwizzleY = neutral;
else
r->Register.SwizzleY = TGSI_SWIZZLE_Y;
if ( write_mask & TGSI_WRITEMASK_Z )
if (write_mask & TGSI_WRITEMASK_Z)
r->Register.SwizzleZ = neutral;
else
r->Register.SwizzleZ = TGSI_SWIZZLE_Z;
if ( write_mask & TGSI_WRITEMASK_W )
if (write_mask & TGSI_WRITEMASK_W)
r->Register.SwizzleW = neutral;
else
r->Register.SwizzleW = TGSI_SWIZZLE_W;
}
static void copy_src_reg(struct i915_src_register *o, const struct tgsi_src_register *i)
static void
copy_src_reg(struct i915_src_register *o, const struct tgsi_src_register *i)
{
o->File = i->File;
o->Indirect = i->Indirect;
o->File = i->File;
o->Indirect = i->Indirect;
o->Dimension = i->Dimension;
o->Index = i->Index;
o->SwizzleX = i->SwizzleX;
o->SwizzleY = i->SwizzleY;
o->SwizzleZ = i->SwizzleZ;
o->SwizzleW = i->SwizzleW;
o->Absolute = i->Absolute;
o->Negate = i->Negate;
o->Index = i->Index;
o->SwizzleX = i->SwizzleX;
o->SwizzleY = i->SwizzleY;
o->SwizzleZ = i->SwizzleZ;
o->SwizzleW = i->SwizzleW;
o->Absolute = i->Absolute;
o->Negate = i->Negate;
}
static void copy_dst_reg(struct i915_dst_register *o, const struct tgsi_dst_register *i)
static void
copy_dst_reg(struct i915_dst_register *o, const struct tgsi_dst_register *i)
{
o->File = i->File;
o->File = i->File;
o->WriteMask = i->WriteMask;
o->Indirect = i->Indirect;
o->Indirect = i->Indirect;
o->Dimension = i->Dimension;
o->Index = i->Index;
o->Index = i->Index;
}
static void copy_instruction(struct i915_full_instruction *o, const struct tgsi_full_instruction *i)
static void
copy_instruction(struct i915_full_instruction *o,
const struct tgsi_full_instruction *i)
{
memcpy(&o->Instruction, &i->Instruction, sizeof(o->Instruction));
memcpy(&o->Texture, &i->Texture, sizeof(o->Texture));
@ -252,18 +267,18 @@ static void copy_instruction(struct i915_full_instruction *o, const struct tgsi_
copy_src_reg(&o->Src[2].Register, &i->Src[2].Register);
}
static void copy_token(union i915_full_token *o, union tgsi_full_token *i)
static void
copy_token(union i915_full_token *o, union tgsi_full_token *i)
{
if (i->Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
memcpy(o, i, sizeof(*o));
else
copy_instruction(&o->FullInstruction, &i->FullInstruction);
}
static void liveness_mark_written(struct i915_optimize_context *ctx,
struct i915_full_dst_register *dst_reg,
int pos)
static void
liveness_mark_written(struct i915_optimize_context *ctx,
struct i915_full_dst_register *dst_reg, int pos)
{
int dst_reg_index;
if (dst_reg->Register.File == TGSI_FILE_TEMPORARY) {
@ -275,9 +290,9 @@ static void liveness_mark_written(struct i915_optimize_context *ctx,
}
}
static void liveness_mark_read(struct i915_optimize_context *ctx,
struct i915_full_src_register *src_reg,
int pos)
static void
liveness_mark_read(struct i915_optimize_context *ctx,
struct i915_full_src_register *src_reg, int pos)
{
int src_reg_index;
if (src_reg->Register.File == TGSI_FILE_TEMPORARY) {
@ -289,8 +304,9 @@ static void liveness_mark_read(struct i915_optimize_context *ctx,
}
}
static void liveness_analysis(struct i915_optimize_context *ctx,
struct i915_token_list *tokens)
static void
liveness_analysis(struct i915_optimize_context *ctx,
struct i915_token_list *tokens)
{
struct i915_full_dst_register *dst_reg;
struct i915_full_src_register *src_reg;
@ -299,14 +315,12 @@ static void liveness_analysis(struct i915_optimize_context *ctx,
int num_dst, num_src;
int i = 0;
for(i = 0; i < TGSI_EXEC_NUM_TEMPS; i++)
{
for (i = 0; i < TGSI_EXEC_NUM_TEMPS; i++) {
ctx->first_write[i] = -1;
ctx->last_read[i] = -1;
}
for(i = 0; i < tokens->NumTokens; i++)
{
for (i = 0; i < tokens->NumTokens; i++) {
current = &tokens->Tokens[i];
if (current->Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
@ -315,21 +329,19 @@ static void liveness_analysis(struct i915_optimize_context *ctx,
opcode = current->FullInstruction.Instruction.Opcode;
num_dst = op_num_dst(opcode);
switch(num_dst)
{
case 1:
dst_reg = &current->FullInstruction.Dst[0];
liveness_mark_written(ctx, dst_reg, i);
case 0:
break;
default:
debug_printf("Op %d has %d dst regs\n", opcode, num_dst);
break;
switch (num_dst) {
case 1:
dst_reg = &current->FullInstruction.Dst[0];
liveness_mark_written(ctx, dst_reg, i);
case 0:
break;
default:
debug_printf("Op %d has %d dst regs\n", opcode, num_dst);
break;
}
}
for(i = tokens->NumTokens - 1; i >= 0; i--)
{
for (i = tokens->NumTokens - 1; i >= 0; i--) {
current = &tokens->Tokens[i];
if (current->Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
@ -338,30 +350,31 @@ static void liveness_analysis(struct i915_optimize_context *ctx,
opcode = current->FullInstruction.Instruction.Opcode;
num_src = op_num_src(opcode);
switch(num_src)
{
case 3:
src_reg = &current->FullInstruction.Src[2];
liveness_mark_read(ctx, src_reg, i);
FALLTHROUGH;
case 2:
src_reg = &current->FullInstruction.Src[1];
liveness_mark_read(ctx, src_reg, i);
FALLTHROUGH;
case 1:
src_reg = &current->FullInstruction.Src[0];
liveness_mark_read(ctx, src_reg, i);
FALLTHROUGH;
case 0:
break;
default:
debug_printf("Op %d has %d src regs\n", opcode, num_src);
break;
switch (num_src) {
case 3:
src_reg = &current->FullInstruction.Src[2];
liveness_mark_read(ctx, src_reg, i);
FALLTHROUGH;
case 2:
src_reg = &current->FullInstruction.Src[1];
liveness_mark_read(ctx, src_reg, i);
FALLTHROUGH;
case 1:
src_reg = &current->FullInstruction.Src[0];
liveness_mark_read(ctx, src_reg, i);
FALLTHROUGH;
case 0:
break;
default:
debug_printf("Op %d has %d src regs\n", opcode, num_src);
break;
}
}
}
static int unused_from(struct i915_optimize_context *ctx, struct i915_full_dst_register *dst_reg, int from)
static int
unused_from(struct i915_optimize_context *ctx,
struct i915_full_dst_register *dst_reg, int from)
{
int dst_reg_index = dst_reg->Register.Index;
assert(dst_reg_index < TGSI_EXEC_NUM_TEMPS);
@ -369,12 +382,14 @@ static int unused_from(struct i915_optimize_context *ctx, struct i915_full_dst_r
}
/* Returns a mask with the components used for a texture access instruction */
static unsigned i915_tex_mask(union i915_full_token *instr)
static unsigned
i915_tex_mask(union i915_full_token *instr)
{
unsigned mask;
/* Get the number of coords */
mask = mask_for_unswizzled(i915_num_coords(instr->FullInstruction.Texture.Texture));
mask = mask_for_unswizzled(
i915_num_coords(instr->FullInstruction.Texture.Texture));
/* Add the W component if projective */
if (instr->FullInstruction.Instruction.Opcode == TGSI_OPCODE_TXP)
@ -383,7 +398,8 @@ static unsigned i915_tex_mask(union i915_full_token *instr)
return mask;
}
static boolean target_is_texture2d(uint tex)
static boolean
target_is_texture2d(uint tex)
{
switch (tex) {
case TGSI_TEXTURE_2D:
@ -394,7 +410,6 @@ static boolean target_is_texture2d(uint tex)
}
}
/*
* Optimize away useless indirect texture reads:
* MOV TEMP[0].xy, IN[0].xyyy
@ -404,23 +419,24 @@ static boolean target_is_texture2d(uint tex)
*
* note: this only seems to work on 2D/RECT textures, but not SHAADOW2D/1D/..
*/
static void i915_fpc_optimize_mov_before_tex(struct i915_optimize_context *ctx,
struct i915_token_list *tokens,
int index)
static void
i915_fpc_optimize_mov_before_tex(struct i915_optimize_context *ctx,
struct i915_token_list *tokens, int index)
{
union i915_full_token *current = &tokens->Tokens[index - 1];
union i915_full_token *next = &tokens->Tokens[index];
if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
current->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
op_is_texture(next->FullInstruction.Instruction.Opcode) &&
target_is_texture2d(next->FullInstruction.Texture.Texture) &&
same_src_dst_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) &&
is_unswizzled(&current->FullInstruction.Src[0], i915_tex_mask(next)) &&
unused_from(ctx, &current->FullInstruction.Dst[0], index))
{
memcpy(&next->FullInstruction.Src[0], &current->FullInstruction.Src[0], sizeof(struct i915_src_register));
if (current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
current->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
op_is_texture(next->FullInstruction.Instruction.Opcode) &&
target_is_texture2d(next->FullInstruction.Texture.Texture) &&
same_src_dst_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Dst[0]) &&
is_unswizzled(&current->FullInstruction.Src[0], i915_tex_mask(next)) &&
unused_from(ctx, &current->FullInstruction.Dst[0], index)) {
memcpy(&next->FullInstruction.Src[0], &current->FullInstruction.Src[0],
sizeof(struct i915_src_register));
current->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
}
}
@ -433,21 +449,26 @@ static void i915_fpc_optimize_mov_before_tex(struct i915_optimize_context *ctx,
* NOP
* MOV OUT[0].xyw, TEMP[1].xyww
*/
static void i915_fpc_optimize_mov_after_mov(union i915_full_token *current, union i915_full_token *next)
static void
i915_fpc_optimize_mov_after_mov(union i915_full_token *current,
union i915_full_token *next)
{
struct i915_full_src_register *src_reg1, *src_reg2;
struct i915_full_dst_register *dst_reg1, *dst_reg2;
unsigned swizzle_x, swizzle_y, swizzle_z, swizzle_w;
if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
current->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
same_dst_reg(&next->FullInstruction.Dst[0], &current->FullInstruction.Dst[0]) &&
same_src_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Src[0]) &&
!same_src_dst_reg(&current->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) )
{
if (current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
current->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
current->FullInstruction.Instruction.Saturate ==
next->FullInstruction.Instruction.Saturate &&
same_dst_reg(&next->FullInstruction.Dst[0],
&current->FullInstruction.Dst[0]) &&
same_src_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Src[0]) &&
!same_src_dst_reg(&current->FullInstruction.Src[0],
&current->FullInstruction.Dst[0])) {
src_reg1 = &current->FullInstruction.Src[0];
dst_reg1 = &current->FullInstruction.Dst[0];
src_reg2 = &next->FullInstruction.Src[0];
@ -489,53 +510,71 @@ static void i915_fpc_optimize_mov_after_mov(union i915_full_token *current, unio
* MUL OUT[0].xyzw, TEMP[1].xyz1, TEMP[2]
* This is useful for optimizing texenv.
*/
static void i915_fpc_optimize_mov_after_alu(union i915_full_token *current, union i915_full_token *next)
static void
i915_fpc_optimize_mov_after_alu(union i915_full_token *current,
union i915_full_token *next)
{
if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
op_commutes(current->FullInstruction.Instruction.Opcode) &&
current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
same_dst_reg(&next->FullInstruction.Dst[0], &current->FullInstruction.Dst[0]) &&
same_src_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Src[1]) &&
!same_src_dst_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) &&
is_unswizzled(&current->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&current->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
{
if (current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
op_commutes(current->FullInstruction.Instruction.Opcode) &&
current->FullInstruction.Instruction.Saturate ==
next->FullInstruction.Instruction.Saturate &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
same_dst_reg(&next->FullInstruction.Dst[0],
&current->FullInstruction.Dst[0]) &&
same_src_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Src[1]) &&
!same_src_dst_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Dst[0]) &&
is_unswizzled(&current->FullInstruction.Src[0],
current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&current->FullInstruction.Src[1],
current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&next->FullInstruction.Src[0],
next->FullInstruction.Dst[0].Register.WriteMask)) {
next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
set_neutral_element_swizzle(&current->FullInstruction.Src[1], 0, 0);
set_neutral_element_swizzle(&current->FullInstruction.Src[0],
next->FullInstruction.Dst[0].Register.WriteMask,
op_neutral_element(current->FullInstruction.Instruction.Opcode));
set_neutral_element_swizzle(
&current->FullInstruction.Src[0],
next->FullInstruction.Dst[0].Register.WriteMask,
op_neutral_element(current->FullInstruction.Instruction.Opcode));
current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
next->FullInstruction.Dst[0].Register.WriteMask;
current->FullInstruction.Dst[0].Register.WriteMask =
current->FullInstruction.Dst[0].Register.WriteMask |
next->FullInstruction.Dst[0].Register.WriteMask;
return;
}
if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
op_commutes(current->FullInstruction.Instruction.Opcode) &&
current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
same_dst_reg(&next->FullInstruction.Dst[0], &current->FullInstruction.Dst[0]) &&
same_src_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Src[0]) &&
!same_src_dst_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) &&
is_unswizzled(&current->FullInstruction.Src[0], current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&current->FullInstruction.Src[1], current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) )
{
if (current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
op_commutes(current->FullInstruction.Instruction.Opcode) &&
current->FullInstruction.Instruction.Saturate ==
next->FullInstruction.Instruction.Saturate &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
same_dst_reg(&next->FullInstruction.Dst[0],
&current->FullInstruction.Dst[0]) &&
same_src_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Src[0]) &&
!same_src_dst_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Dst[0]) &&
is_unswizzled(&current->FullInstruction.Src[0],
current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&current->FullInstruction.Src[1],
current->FullInstruction.Dst[0].Register.WriteMask) &&
is_unswizzled(&next->FullInstruction.Src[0],
next->FullInstruction.Dst[0].Register.WriteMask)) {
next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
set_neutral_element_swizzle(&current->FullInstruction.Src[0], 0, 0);
set_neutral_element_swizzle(&current->FullInstruction.Src[1],
next->FullInstruction.Dst[0].Register.WriteMask,
op_neutral_element(current->FullInstruction.Instruction.Opcode));
set_neutral_element_swizzle(
&current->FullInstruction.Src[1],
next->FullInstruction.Dst[0].Register.WriteMask,
op_neutral_element(current->FullInstruction.Instruction.Opcode));
current->FullInstruction.Dst[0].Register.WriteMask = current->FullInstruction.Dst[0].Register.WriteMask |
next->FullInstruction.Dst[0].Register.WriteMask;
current->FullInstruction.Dst[0].Register.WriteMask =
current->FullInstruction.Dst[0].Register.WriteMask |
next->FullInstruction.Dst[0].Register.WriteMask;
return;
}
}
@ -546,19 +585,21 @@ static void i915_fpc_optimize_mov_after_alu(union i915_full_token *current, unio
* into:
* NOP
*/
static boolean i915_fpc_useless_mov(union tgsi_full_token *tgsi_current)
static boolean
i915_fpc_useless_mov(union tgsi_full_token *tgsi_current)
{
union i915_full_token current;
copy_token(&current , tgsi_current);
if ( current.Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
current.FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
op_has_dst(current.FullInstruction.Instruction.Opcode) &&
!current.FullInstruction.Instruction.Saturate &&
current.FullInstruction.Src[0].Register.Absolute == 0 &&
current.FullInstruction.Src[0].Register.Negate == 0 &&
is_unswizzled(&current.FullInstruction.Src[0], current.FullInstruction.Dst[0].Register.WriteMask) &&
same_src_dst_reg(&current.FullInstruction.Src[0], &current.FullInstruction.Dst[0]) )
{
copy_token(&current, tgsi_current);
if (current.Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
current.FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
op_has_dst(current.FullInstruction.Instruction.Opcode) &&
!current.FullInstruction.Instruction.Saturate &&
current.FullInstruction.Src[0].Register.Absolute == 0 &&
current.FullInstruction.Src[0].Register.Negate == 0 &&
is_unswizzled(&current.FullInstruction.Src[0],
current.FullInstruction.Dst[0].Register.WriteMask) &&
same_src_dst_reg(&current.FullInstruction.Src[0],
&current.FullInstruction.Dst[0])) {
return TRUE;
}
return FALSE;
@ -571,27 +612,31 @@ static boolean i915_fpc_useless_mov(union tgsi_full_token *tgsi_current)
* into:
* *** OUT[0], TEMP[1], TEMP[2]
*/
static void i915_fpc_optimize_useless_mov_after_inst(struct i915_optimize_context *ctx,
struct i915_token_list *tokens,
int index)
static void
i915_fpc_optimize_useless_mov_after_inst(struct i915_optimize_context *ctx,
struct i915_token_list *tokens,
int index)
{
union i915_full_token *current = &tokens->Tokens[index - 1];
union i915_full_token *next = &tokens->Tokens[index];
// &out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
if ( current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
op_has_dst(current->FullInstruction.Instruction.Opcode) &&
!next->FullInstruction.Instruction.Saturate &&
next->FullInstruction.Src[0].Register.Absolute == 0 &&
next->FullInstruction.Src[0].Register.Negate == 0 &&
unused_from(ctx, &current->FullInstruction.Dst[0], index) &&
current->FullInstruction.Dst[0].Register.WriteMask == TGSI_WRITEMASK_XYZW &&
is_unswizzled(&next->FullInstruction.Src[0], next->FullInstruction.Dst[0].Register.WriteMask) &&
current->FullInstruction.Dst[0].Register.WriteMask == next->FullInstruction.Dst[0].Register.WriteMask &&
same_src_dst_reg(&next->FullInstruction.Src[0], &current->FullInstruction.Dst[0]) )
{
if (current->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->Token.Type == TGSI_TOKEN_TYPE_INSTRUCTION &&
next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
op_has_dst(current->FullInstruction.Instruction.Opcode) &&
!next->FullInstruction.Instruction.Saturate &&
next->FullInstruction.Src[0].Register.Absolute == 0 &&
next->FullInstruction.Src[0].Register.Negate == 0 &&
unused_from(ctx, &current->FullInstruction.Dst[0], index) &&
current->FullInstruction.Dst[0].Register.WriteMask ==
TGSI_WRITEMASK_XYZW &&
is_unswizzled(&next->FullInstruction.Src[0],
next->FullInstruction.Dst[0].Register.WriteMask) &&
current->FullInstruction.Dst[0].Register.WriteMask ==
next->FullInstruction.Dst[0].Register.WriteMask &&
same_src_dst_reg(&next->FullInstruction.Src[0],
&current->FullInstruction.Dst[0])) {
next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
current->FullInstruction.Dst[0] = next->FullInstruction.Dst[0];
@ -599,7 +644,8 @@ static void i915_fpc_optimize_useless_mov_after_inst(struct i915_optimize_contex
}
}
struct i915_token_list* i915_optimize(const struct tgsi_token *tokens)
struct i915_token_list *
i915_optimize(const struct tgsi_token *tokens)
{
struct i915_token_list *out_tokens = MALLOC(sizeof(struct i915_token_list));
struct tgsi_parse_context parse;
@ -611,38 +657,41 @@ struct i915_token_list* i915_optimize(const struct tgsi_token *tokens)
out_tokens->NumTokens = 0;
/* Count the tokens */
tgsi_parse_init( &parse, tokens );
while( !tgsi_parse_end_of_tokens( &parse ) ) {
tgsi_parse_token( &parse );
tgsi_parse_init(&parse, tokens);
while (!tgsi_parse_end_of_tokens(&parse)) {
tgsi_parse_token(&parse);
out_tokens->NumTokens++;
}
tgsi_parse_free (&parse);
tgsi_parse_free(&parse);
/* Allocate our tokens */
out_tokens->Tokens = MALLOC(sizeof(union i915_full_token) * out_tokens->NumTokens);
out_tokens->Tokens =
MALLOC(sizeof(union i915_full_token) * out_tokens->NumTokens);
tgsi_parse_init( &parse, tokens );
while( !tgsi_parse_end_of_tokens( &parse ) ) {
tgsi_parse_token( &parse );
tgsi_parse_init(&parse, tokens);
while (!tgsi_parse_end_of_tokens(&parse)) {
tgsi_parse_token(&parse);
if (i915_fpc_useless_mov(&parse.FullToken)) {
out_tokens->NumTokens--;
continue;
}
copy_token(&out_tokens->Tokens[i] , &parse.FullToken);
copy_token(&out_tokens->Tokens[i], &parse.FullToken);
i++;
}
tgsi_parse_free (&parse);
tgsi_parse_free(&parse);
liveness_analysis(ctx, out_tokens);
i = 1;
while( i < out_tokens->NumTokens) {
while (i < out_tokens->NumTokens) {
i915_fpc_optimize_useless_mov_after_inst(ctx, out_tokens, i);
i915_fpc_optimize_mov_after_alu(&out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
i915_fpc_optimize_mov_after_mov(&out_tokens->Tokens[i-1], &out_tokens->Tokens[i]);
i915_fpc_optimize_mov_after_alu(&out_tokens->Tokens[i - 1],
&out_tokens->Tokens[i]);
i915_fpc_optimize_mov_after_mov(&out_tokens->Tokens[i - 1],
&out_tokens->Tokens[i]);
i915_fpc_optimize_mov_before_tex(ctx, out_tokens, i);
i++;
}
@ -652,10 +701,9 @@ struct i915_token_list* i915_optimize(const struct tgsi_token *tokens)
return out_tokens;
}
void i915_optimize_free(struct i915_token_list *tokens)
void
i915_optimize_free(struct i915_token_list *tokens)
{
free(tokens->Tokens);
free(tokens);
}

592
src/gallium/drivers/i915/i915_fpc_translate.c
View File

File diff suppressed because it is too large Load Diff

119
src/gallium/drivers/i915/i915_prim_emit.c
View File

@ -1,5 +1,5 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,21 +22,18 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "draw/draw_pipe.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_pack_color.h"
#include "i915_batch.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_state.h"
#include "i915_batch.h"
/**
* Primitive emit to hardware. No support for vertex buffers or any
@ -45,20 +42,18 @@
struct setup_stage {
struct draw_stage stage; /**< This must be first (base class) */
struct i915_context *i915;
struct i915_context *i915;
};
/**
* Basically a cast wrapper.
*/
static inline struct setup_stage *setup_stage( struct draw_stage *stage )
static inline struct setup_stage *
setup_stage(struct draw_stage *stage)
{
return (struct setup_stage *)stage;
}
/**
* Extract the needed fields from vertex_header and emit i915 dwords.
* Recall that the vertices are constructed by the 'draw' module and
@ -66,12 +61,11 @@ static inline struct setup_stage *setup_stage( struct draw_stage *stage )
* clip pos) that we ignore here.
*/
static inline void
emit_hw_vertex( struct i915_context *i915,
const struct vertex_header *vertex)
emit_hw_vertex(struct i915_context *i915, const struct vertex_header *vertex)
{
const struct vertex_info *vinfo = &i915->current.vertex_info;
uint i;
uint count = 0; /* for debug/sanity */
uint count = 0; /* for debug/sanity */
assert(!i915->dirty);
@ -80,39 +74,37 @@ emit_hw_vertex( struct i915_context *i915,
const float *attrib = vertex->data[j];
switch (vinfo->attrib[i].emit) {
case EMIT_1F:
OUT_BATCH( fui(attrib[0]) );
OUT_BATCH(fui(attrib[0]));
count++;
break;
case EMIT_2F:
OUT_BATCH( fui(attrib[0]) );
OUT_BATCH( fui(attrib[1]) );
OUT_BATCH(fui(attrib[0]));
OUT_BATCH(fui(attrib[1]));
count += 2;
break;
case EMIT_3F:
OUT_BATCH( fui(attrib[0]) );
OUT_BATCH( fui(attrib[1]) );
OUT_BATCH( fui(attrib[2]) );
OUT_BATCH(fui(attrib[0]));
OUT_BATCH(fui(attrib[1]));
OUT_BATCH(fui(attrib[2]));
count += 3;
break;
case EMIT_4F:
OUT_BATCH( fui(attrib[0]) );
OUT_BATCH( fui(attrib[1]) );
OUT_BATCH( fui(attrib[2]) );
OUT_BATCH( fui(attrib[3]) );
OUT_BATCH(fui(attrib[0]));
OUT_BATCH(fui(attrib[1]));
OUT_BATCH(fui(attrib[2]));
OUT_BATCH(fui(attrib[3]));
count += 4;
break;
case EMIT_4UB:
OUT_BATCH( pack_ub4(float_to_ubyte( attrib[0] ),
float_to_ubyte( attrib[1] ),
float_to_ubyte( attrib[2] ),
float_to_ubyte( attrib[3] )) );
OUT_BATCH(
pack_ub4(float_to_ubyte(attrib[0]), float_to_ubyte(attrib[1]),
float_to_ubyte(attrib[2]), float_to_ubyte(attrib[3])));
count += 1;
break;
case EMIT_4UB_BGRA:
OUT_BATCH( pack_ub4(float_to_ubyte( attrib[2] ),
float_to_ubyte( attrib[1] ),
float_to_ubyte( attrib[0] ),
float_to_ubyte( attrib[3] )) );
OUT_BATCH(
pack_ub4(float_to_ubyte(attrib[2]), float_to_ubyte(attrib[1]),
float_to_ubyte(attrib[0]), float_to_ubyte(attrib[3])));
count += 1;
break;
default:
@ -122,93 +114,86 @@ emit_hw_vertex( struct i915_context *i915,
assert(count == vinfo->size);
}
static inline void
emit_prim( struct draw_stage *stage,
struct prim_header *prim,
unsigned hwprim,
unsigned nr )
static inline void
emit_prim(struct draw_stage *stage, struct prim_header *prim, unsigned hwprim,
unsigned nr)
{
struct i915_context *i915 = setup_stage(stage)->i915;
unsigned vertex_size;
unsigned i;
if (i915->dirty)
i915_update_derived( i915 );
i915_update_derived(i915);
if (i915->hardware_dirty)
i915_emit_hardware_state( i915 );
i915_emit_hardware_state(i915);
/* need to do this after validation! */
vertex_size = i915->current.vertex_info.size * 4; /* in bytes */
assert(vertex_size >= 12); /* never smaller than 12 bytes */
if (!BEGIN_BATCH( 1 + nr * vertex_size / 4)) {
if (!BEGIN_BATCH(1 + nr * vertex_size / 4)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
/* Make sure state is re-emitted after a flush:
/* Make sure state is re-emitted after a flush:
*/
i915_emit_hardware_state( i915 );
i915_emit_hardware_state(i915);
if (!BEGIN_BATCH( 1 + nr * vertex_size / 4)) {
assert(0);
return;
if (!BEGIN_BATCH(1 + nr * vertex_size / 4)) {
assert(0);
return;
}
}
/* Emit each triangle as a single primitive. I told you this was
* simple.
*/
OUT_BATCH(_3DPRIMITIVE |
hwprim |
((4 + vertex_size * nr)/4 - 2));
OUT_BATCH(_3DPRIMITIVE | hwprim | ((4 + vertex_size * nr) / 4 - 2));
for (i = 0; i < nr; i++)
emit_hw_vertex(i915, prim->v[i]);
}
static void
setup_tri( struct draw_stage *stage, struct prim_header *prim )
static void
setup_tri(struct draw_stage *stage, struct prim_header *prim)
{
emit_prim( stage, prim, PRIM3D_TRILIST, 3 );
emit_prim(stage, prim, PRIM3D_TRILIST, 3);
}
static void
setup_line(struct draw_stage *stage, struct prim_header *prim)
{
emit_prim( stage, prim, PRIM3D_LINELIST, 2 );
emit_prim(stage, prim, PRIM3D_LINELIST, 2);
}
static void
setup_point(struct draw_stage *stage, struct prim_header *prim)
{
emit_prim( stage, prim, PRIM3D_POINTLIST, 1 );
emit_prim(stage, prim, PRIM3D_POINTLIST, 1);
}
static void setup_flush( struct draw_stage *stage, unsigned flags )
static void
setup_flush(struct draw_stage *stage, unsigned flags)
{
}
static void reset_stipple_counter( struct draw_stage *stage )
static void
reset_stipple_counter(struct draw_stage *stage)
{
}
static void render_destroy( struct draw_stage *stage )
static void
render_destroy(struct draw_stage *stage)
{
FREE( stage );
FREE(stage);
}
/**
* Create a new primitive setup/render stage. This gets plugged into
* the 'draw' module's pipeline.
*/
struct draw_stage *i915_draw_render_stage( struct i915_context *i915 )
struct draw_stage *
i915_draw_render_stage(struct i915_context *i915)
{
struct setup_stage *setup = CALLOC_STRUCT(setup_stage);

171
src/gallium/drivers/i915/i915_prim_vbuf.c
View File

@ -1,5 +1,5 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/**
@ -31,27 +31,25 @@
* lists by hooking into the end of the primitive pipeline and
* manipulating the vertex_id field in the vertex headers.
*
* XXX: work in progress
*
* XXX: work in progress
*
* \author José Fonseca <jfonseca@vmware.com>
* \author Keith Whitwell <keithw@vmware.com>
*/
#include "draw/draw_context.h"
#include "draw/draw_vbuf.h"
#include "util/u_debug.h"
#include "util/u_fifo.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_fifo.h"
#include "i915_batch.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_batch.h"
#include "i915_state.h"
#define VBUF_MAP_BUFFER
/**
@ -76,11 +74,11 @@ struct i915_vbuf_render {
/* Stuff for the vbo */
struct i915_winsys_buffer *vbo;
size_t vbo_size; /**< current size of allocated buffer */
size_t vbo_size; /**< current size of allocated buffer */
size_t vbo_alloc_size; /**< minimum buffer size to allocate */
size_t vbo_hw_offset; /**< offset that we program the hardware with */
size_t vbo_sw_offset; /**< offset that we work with */
size_t vbo_index; /**< index offset to be added to all indices */
size_t vbo_hw_offset; /**< offset that we program the hardware with */
size_t vbo_sw_offset; /**< offset that we work with */
size_t vbo_index; /**< index offset to be added to all indices */
void *vbo_ptr;
size_t vbo_max_used;
size_t vbo_max_index; /**< index offset to be added to all indices */
@ -92,7 +90,6 @@ struct i915_vbuf_render {
#endif
};
/**
* Basically a cast wrapper.
*/
@ -207,8 +204,8 @@ i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size)
}
#endif
i915_render->vbo = iws->buffer_create(iws, i915_render->vbo_size,
I915_NEW_VERTEX);
i915_render->vbo =
iws->buffer_create(iws, i915_render->vbo_size, I915_NEW_VERTEX);
i915_render->vbo_ptr = iws->buffer_map(iws, i915_render->vbo, TRUE);
}
@ -222,8 +219,7 @@ i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size)
*/
static boolean
i915_vbuf_render_allocate_vertices(struct vbuf_render *render,
ushort vertex_size,
ushort nr_vertices)
ushort vertex_size, ushort nr_vertices)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
size_t size = (size_t)vertex_size * (size_t)nr_vertices;
@ -276,8 +272,7 @@ i915_vbuf_render_map_vertices(struct vbuf_render *render)
}
static void
i915_vbuf_render_unmap_vertices(struct vbuf_render *render,
ushort min_index,
i915_vbuf_render_unmap_vertices(struct vbuf_render *render, ushort min_index,
ushort max_index)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
@ -285,16 +280,18 @@ i915_vbuf_render_unmap_vertices(struct vbuf_render *render,
struct i915_winsys *iws = i915->iws;
i915_render->vbo_max_index = max_index;
i915_render->vbo_max_used = MAX2(i915_render->vbo_max_used, i915_render->vertex_size * (max_index + 1));
i915_render->vbo_max_used = MAX2(i915_render->vbo_max_used,
i915_render->vertex_size * (max_index + 1));
#ifdef VBUF_MAP_BUFFER
(void)iws;
#else
i915_render->map_used_start = i915_render->vertex_size * min_index;
i915_render->map_used_end = i915_render->vertex_size * (max_index + 1);
iws->buffer_write(iws, i915_render->vbo,
i915_render->map_used_start + i915_render->vbo_sw_offset,
i915_render->map_used_end - i915_render->map_used_start,
(unsigned char *)i915_render->vbo_ptr + i915_render->map_used_start);
iws->buffer_write(
iws, i915_render->vbo,
i915_render->map_used_start + i915_render->vbo_sw_offset,
i915_render->map_used_end - i915_render->map_used_start,
(unsigned char *)i915_render->vbo_ptr + i915_render->map_used_start);
#endif
}
@ -308,8 +305,7 @@ i915_vbuf_render_unmap_vertices(struct vbuf_render *render,
* On failure update hw_offset and index.
*/
static void
i915_vbuf_ensure_index_bounds(struct vbuf_render *render,
unsigned max_index)
i915_vbuf_ensure_index_bounds(struct vbuf_render *render, unsigned max_index)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
@ -323,13 +319,13 @@ i915_vbuf_ensure_index_bounds(struct vbuf_render *render,
}
static void
i915_vbuf_render_set_primitive(struct vbuf_render *render,
i915_vbuf_render_set_primitive(struct vbuf_render *render,
enum pipe_prim_type prim)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
i915_render->prim = prim;
switch(prim) {
switch (prim) {
case PIPE_PRIM_POINTS:
i915_render->hwprim = PRIM3D_POINTLIST;
i915_render->fallback = 0;
@ -380,9 +376,8 @@ i915_vbuf_render_set_primitive(struct vbuf_render *render,
* Used for fallbacks in draw_arrays
*/
static void
draw_arrays_generate_indices(struct vbuf_render *render,
unsigned start, uint nr,
unsigned type)
draw_arrays_generate_indices(struct vbuf_render *render, unsigned start,
uint nr, unsigned type)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
struct i915_context *i915 = i915_render->i915;
@ -390,32 +385,32 @@ draw_arrays_generate_indices(struct vbuf_render *render,
unsigned end = start + nr + i915_render->vbo_index;
start += i915_render->vbo_index;
switch(type) {
switch (type) {
case 0:
for (i = start; i+1 < end; i += 2)
OUT_BATCH((i+0) | (i+1) << 16);
for (i = start; i + 1 < end; i += 2)
OUT_BATCH((i + 0) | (i + 1) << 16);
if (i < end)
OUT_BATCH(i);
break;
case PIPE_PRIM_LINE_LOOP:
if (nr >= 2) {
for (i = start + 1; i < end; i++)
OUT_BATCH((i-1) | (i+0) << 16);
OUT_BATCH((i-1) | ( start) << 16);
OUT_BATCH((i - 1) | (i + 0) << 16);
OUT_BATCH((i - 1) | (start) << 16);
}
break;
case PIPE_PRIM_QUADS:
for (i = start; i + 3 < end; i += 4) {
OUT_BATCH((i+0) | (i+1) << 16);
OUT_BATCH((i+3) | (i+1) << 16);
OUT_BATCH((i+2) | (i+3) << 16);
OUT_BATCH((i + 0) | (i + 1) << 16);
OUT_BATCH((i + 3) | (i + 1) << 16);
OUT_BATCH((i + 2) | (i + 3) << 16);
}
break;
case PIPE_PRIM_QUAD_STRIP:
for (i = start; i + 3 < end; i += 2) {
OUT_BATCH((i+0) | (i+1) << 16);
OUT_BATCH((i+3) | (i+2) << 16);
OUT_BATCH((i+0) | (i+3) << 16);
OUT_BATCH((i + 0) | (i + 1) << 16);
OUT_BATCH((i + 3) | (i + 2) << 16);
OUT_BATCH((i + 0) | (i + 3) << 16);
}
break;
default:
@ -445,9 +440,7 @@ draw_arrays_calc_nr_indices(uint nr, unsigned type)
}
static void
draw_arrays_fallback(struct vbuf_render *render,
unsigned start,
uint nr)
draw_arrays_fallback(struct vbuf_render *render, unsigned start, uint nr)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
struct i915_context *i915 = i915_render->i915;
@ -465,7 +458,7 @@ draw_arrays_fallback(struct vbuf_render *render,
if (i915->hardware_dirty)
i915_emit_hardware_state(i915);
if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) {
if (!BEGIN_BATCH(1 + (nr_indices + 1) / 2)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
/* Make sure state is re-emitted after a flush:
@ -473,17 +466,14 @@ draw_arrays_fallback(struct vbuf_render *render,
i915_emit_hardware_state(i915);
i915->vbo_flushed = 1;
if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) {
if (!BEGIN_BATCH(1 + (nr_indices + 1) / 2)) {
assert(0);
goto out;
}
}
OUT_BATCH(_3DPRIMITIVE |
PRIM_INDIRECT |
i915_render->hwprim |
PRIM_INDIRECT_ELTS |
nr_indices);
OUT_BATCH(_3DPRIMITIVE | PRIM_INDIRECT | i915_render->hwprim |
PRIM_INDIRECT_ELTS | nr_indices);
draw_arrays_generate_indices(render, start, nr, i915_render->fallback);
@ -492,8 +482,7 @@ out:
}
static void
i915_vbuf_render_draw_arrays(struct vbuf_render *render,
unsigned start,
i915_vbuf_render_draw_arrays(struct vbuf_render *render, unsigned start,
uint nr)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
@ -527,11 +516,8 @@ i915_vbuf_render_draw_arrays(struct vbuf_render *render,
}
}
OUT_BATCH(_3DPRIMITIVE |
PRIM_INDIRECT |
PRIM_INDIRECT_SEQUENTIAL |
i915_render->hwprim |
nr);
OUT_BATCH(_3DPRIMITIVE | PRIM_INDIRECT | PRIM_INDIRECT_SEQUENTIAL |
i915_render->hwprim | nr);
OUT_BATCH(start); /* Beginning vertex index */
out:
@ -543,44 +529,42 @@ out:
* If type is zero normal operation assumed.
*/
static void
draw_generate_indices(struct vbuf_render *render,
const ushort *indices,
uint nr_indices,
unsigned type)
draw_generate_indices(struct vbuf_render *render, const ushort *indices,
uint nr_indices, unsigned type)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
struct i915_context *i915 = i915_render->i915;
unsigned i;
unsigned o = i915_render->vbo_index;
switch(type) {
switch (type) {
case 0:
for (i = 0; i + 1 < nr_indices; i += 2) {
OUT_BATCH((o+indices[i]) | (o+indices[i+1]) << 16);
OUT_BATCH((o + indices[i]) | (o + indices[i + 1]) << 16);
}
if (i < nr_indices) {
OUT_BATCH((o+indices[i]));
OUT_BATCH((o + indices[i]));
}
break;
case PIPE_PRIM_LINE_LOOP:
if (nr_indices >= 2) {
for (i = 1; i < nr_indices; i++)
OUT_BATCH((o+indices[i-1]) | (o+indices[i]) << 16);
OUT_BATCH((o+indices[i-1]) | (o+indices[0]) << 16);
OUT_BATCH((o + indices[i - 1]) | (o + indices[i]) << 16);
OUT_BATCH((o + indices[i - 1]) | (o + indices[0]) << 16);
}
break;
case PIPE_PRIM_QUADS:
for (i = 0; i + 3 < nr_indices; i += 4) {
OUT_BATCH((o+indices[i+0]) | (o+indices[i+1]) << 16);
OUT_BATCH((o+indices[i+3]) | (o+indices[i+1]) << 16);
OUT_BATCH((o+indices[i+2]) | (o+indices[i+3]) << 16);
OUT_BATCH((o + indices[i + 0]) | (o + indices[i + 1]) << 16);
OUT_BATCH((o + indices[i + 3]) | (o + indices[i + 1]) << 16);
OUT_BATCH((o + indices[i + 2]) | (o + indices[i + 3]) << 16);
}
break;
case PIPE_PRIM_QUAD_STRIP:
for (i = 0; i + 3 < nr_indices; i += 2) {
OUT_BATCH((o+indices[i+0]) | (o+indices[i+1]) << 16);
OUT_BATCH((o+indices[i+3]) | (o+indices[i+2]) << 16);
OUT_BATCH((o+indices[i+0]) | (o+indices[i+3]) << 16);
OUT_BATCH((o + indices[i + 0]) | (o + indices[i + 1]) << 16);
OUT_BATCH((o + indices[i + 3]) | (o + indices[i + 2]) << 16);
OUT_BATCH((o + indices[i + 0]) | (o + indices[i + 3]) << 16);
}
break;
default:
@ -610,10 +594,9 @@ draw_calc_nr_indices(uint nr_indices, unsigned type)
}
}
static void
static void
i915_vbuf_render_draw_elements(struct vbuf_render *render,
const ushort *indices,
uint nr_indices)
const ushort *indices, uint nr_indices)
{
struct i915_vbuf_render *i915_render = i915_vbuf_render(render);
struct i915_context *i915 = i915_render->i915;
@ -633,28 +616,23 @@ i915_vbuf_render_draw_elements(struct vbuf_render *render,
if (i915->hardware_dirty)
i915_emit_hardware_state(i915);
if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) {
if (!BEGIN_BATCH(1 + (nr_indices + 1) / 2)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
/* Make sure state is re-emitted after a flush:
/* Make sure state is re-emitted after a flush:
*/
i915_emit_hardware_state(i915);
i915->vbo_flushed = 1;
if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) {
if (!BEGIN_BATCH(1 + (nr_indices + 1) / 2)) {
assert(0);
goto out;
}
}
OUT_BATCH(_3DPRIMITIVE |
PRIM_INDIRECT |
i915_render->hwprim |
PRIM_INDIRECT_ELTS |
nr_indices);
draw_generate_indices(render,
indices,
save_nr_indices,
OUT_BATCH(_3DPRIMITIVE | PRIM_INDIRECT | i915_render->hwprim |
PRIM_INDIRECT_ELTS | nr_indices);
draw_generate_indices(render, indices, save_nr_indices,
i915_render->fallback);
out:
@ -704,10 +682,10 @@ i915_vbuf_render_create(struct i915_context *i915)
i915_render->i915 = i915;
i915_render->base.max_vertex_buffer_bytes = 4*4096;
i915_render->base.max_vertex_buffer_bytes = 4 * 4096;
/* NOTE: it must be such that state and vertices indices fit in a single
* batch buffer. 4096 is one batch buffer and 430 is the max amount of
/* NOTE: it must be such that state and vertices indices fit in a single
* batch buffer. 4096 is one batch buffer and 430 is the max amount of
* state in dwords. The result is the number of 16-bit indices which can
* fit in a single batch buffer.
*/
@ -755,15 +733,16 @@ i915_vbuf_render_create(struct i915_context *i915)
/**
* Create a new primitive vbuf/render stage.
*/
struct draw_stage *i915_draw_vbuf_stage(struct i915_context *i915)
struct draw_stage *
i915_draw_vbuf_stage(struct i915_context *i915)
{
struct vbuf_render *render;
struct draw_stage *stage;
render = i915_vbuf_render_create(i915);
if (!render)
return NULL;
stage = draw_vbuf_stage(i915->draw, render);
if (!stage) {
render->destroy(render);

2
src/gallium/drivers/i915/i915_public.h
View File

@ -8,6 +8,6 @@ struct pipe_screen;
/**
* Create i915 pipe_screen.
*/
struct pipe_screen * i915_screen_create(struct i915_winsys *iws);
struct pipe_screen *i915_screen_create(struct i915_winsys *iws);
#endif

43
src/gallium/drivers/i915/i915_query.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2011 The Chromium OS authors.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Fake occlusion queries which return 0, it's better than crashing */
@ -34,46 +34,44 @@
#include "i915_context.h"
#include "i915_query.h"
struct i915_query
{
struct i915_query {
unsigned query;
};
static struct pipe_query *i915_create_query(struct pipe_context *ctx,
unsigned query_type,
unsigned index)
static struct pipe_query *
i915_create_query(struct pipe_context *ctx, unsigned query_type, unsigned index)
{
struct i915_query *query = CALLOC_STRUCT( i915_query );
struct i915_query *query = CALLOC_STRUCT(i915_query);
return (struct pipe_query *)query;
}
static void i915_destroy_query(struct pipe_context *ctx,
struct pipe_query *query)
static void
i915_destroy_query(struct pipe_context *ctx, struct pipe_query *query)
{
FREE(query);
}
static bool i915_begin_query(struct pipe_context *ctx,
struct pipe_query *query)
static bool
i915_begin_query(struct pipe_context *ctx, struct pipe_query *query)
{
return true;
}
static bool i915_end_query(struct pipe_context *ctx, struct pipe_query *query)
static bool
i915_end_query(struct pipe_context *ctx, struct pipe_query *query)
{
return true;
}
static bool i915_get_query_result(struct pipe_context *ctx,
struct pipe_query *query,
bool wait,
union pipe_query_result *vresult)
static bool
i915_get_query_result(struct pipe_context *ctx, struct pipe_query *query,
bool wait, union pipe_query_result *vresult)
{
uint64_t *result = (uint64_t*)vresult;
uint64_t *result = (uint64_t *)vresult;
/* 2* viewport Max */
*result = 512*1024*1024;
*result = 512 * 1024 * 1024;
return true;
}
@ -92,4 +90,3 @@ i915_init_query_functions(struct i915_context *i915)
i915->base.get_query_result = i915_get_query_result;
i915->base.set_active_query_state = i915_set_active_query_state;
}

12
src/gallium/drivers/i915/i915_query.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2011 The Chromium OS authors.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_QUERY_H
@ -31,6 +31,6 @@
struct i915_context;
struct pipe_context;
void i915_init_query_functions( struct i915_context *i915 );
void i915_init_query_functions(struct i915_context *i915);
#endif /* I915_QUERY_H */

1477
src/gallium/drivers/i915/i915_reg.h
View File

File diff suppressed because it is too large Load Diff

16
src/gallium/drivers/i915/i915_resource.c
View File

@ -1,18 +1,16 @@
#include "util/u_debug.h"
#include "i915_resource.h"
#include "i915_context.h"
#include "i915_resource.h"
#include "i915_screen.h"
static struct pipe_resource *
i915_resource_create(struct pipe_screen *screen,
const struct pipe_resource *template)
{
if (template->target == PIPE_BUFFER)
return i915_buffer_create(screen, template);
else
{
else {
if (!(template->bind & PIPE_BIND_LINEAR))
return i915_texture_create(screen, template, FALSE);
else
@ -21,10 +19,9 @@ i915_resource_create(struct pipe_screen *screen,
}
static struct pipe_resource *
i915_resource_from_handle(struct pipe_screen * screen,
const struct pipe_resource *template,
struct winsys_handle *whandle,
unsigned usage)
i915_resource_from_handle(struct pipe_screen *screen,
const struct pipe_resource *template,
struct winsys_handle *whandle, unsigned usage)
{
if (template->target == PIPE_BUFFER)
return NULL;
@ -32,9 +29,8 @@ i915_resource_from_handle(struct pipe_screen * screen,
return i915_texture_from_handle(screen, template, whandle);
}
void
i915_init_resource_functions(struct i915_context *i915 )
i915_init_resource_functions(struct i915_context *i915)
{
i915->base.buffer_map = i915_buffer_transfer_map;
i915->base.texture_map = i915_texture_transfer_map;

119
src/gallium/drivers/i915/i915_resource.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2008 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_RESOURCE_H
@ -30,22 +30,19 @@
struct i915_screen;
#include "util/u_transfer.h"
#include "util/u_debug.h"
#include "util/u_transfer.h"
#include "i915_winsys.h"
struct i915_context;
struct i915_screen;
struct i915_buffer {
struct pipe_resource b;
uint8_t *data;
boolean free_on_destroy;
};
/* Texture transfer. */
struct i915_transfer {
/* Base class. */
@ -53,14 +50,12 @@ struct i915_transfer {
struct pipe_resource *staging_texture;
};
#define I915_MAX_TEXTURE_2D_LEVELS 12 /* max 2048x2048 */
#define I915_MAX_TEXTURE_3D_LEVELS 9 /* max 256x256x256 */
#define I915_MAX_TEXTURE_2D_LEVELS 12 /* max 2048x2048 */
#define I915_MAX_TEXTURE_3D_LEVELS 9 /* max 256x256x256 */
struct offset_pair {
unsigned short nblocksx;
unsigned short nblocksy;
unsigned short nblocksx;
unsigned short nblocksy;
};
struct i915_texture {
@ -69,7 +64,7 @@ struct i915_texture {
/* tiling flags */
enum i915_winsys_buffer_tile tiling;
unsigned stride;
unsigned depth_stride; /* per-image on i945? */
unsigned depth_stride; /* per-image on i945? */
unsigned total_nblocksy;
unsigned nr_images[I915_MAX_TEXTURE_2D_LEVELS];
@ -86,85 +81,69 @@ struct i915_texture {
struct i915_winsys_buffer *buffer;
};
unsigned i915_texture_offset(const struct i915_texture *tex,
unsigned level, unsigned layer);
unsigned i915_texture_offset(const struct i915_texture *tex, unsigned level,
unsigned layer);
void i915_init_screen_resource_functions(struct i915_screen *is);
void i915_init_resource_functions(struct i915_context *i915);
static inline struct i915_texture *i915_texture(struct pipe_resource *resource)
static inline struct i915_texture *
i915_texture(struct pipe_resource *resource)
{
struct i915_texture *tex = (struct i915_texture *)resource;
assert(tex->b.target != PIPE_BUFFER);
return tex;
}
static inline struct i915_buffer *i915_buffer(struct pipe_resource *resource)
static inline struct i915_buffer *
i915_buffer(struct pipe_resource *resource)
{
struct i915_buffer *tex = (struct i915_buffer *)resource;
assert(tex->b.target == PIPE_BUFFER);
return tex;
}
struct pipe_resource *
i915_texture_create(struct pipe_screen *screen,
const struct pipe_resource *template,
boolean force_untiled);
struct pipe_resource *i915_texture_create(struct pipe_screen *screen,
const struct pipe_resource *template,
boolean force_untiled);
bool
i915_resource_get_handle(struct pipe_screen *screen,
struct pipe_context *context,
struct pipe_resource *texture,
struct winsys_handle *whandle,
unsigned usage);
bool i915_resource_get_handle(struct pipe_screen *screen,
struct pipe_context *context,
struct pipe_resource *texture,
struct winsys_handle *whandle, unsigned usage);
struct pipe_resource *
i915_texture_from_handle(struct pipe_screen * screen,
const struct pipe_resource *template,
struct winsys_handle *whandle);
i915_texture_from_handle(struct pipe_screen *screen,
const struct pipe_resource *template,
struct winsys_handle *whandle);
struct pipe_resource *i915_user_buffer_create(struct pipe_screen *screen,
void *ptr, unsigned bytes,
unsigned usage);
struct pipe_resource *
i915_user_buffer_create(struct pipe_screen *screen,
void *ptr,
unsigned bytes,
unsigned usage);
struct pipe_resource *i915_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *template);
struct pipe_resource *
i915_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *template);
void i915_resource_destroy(struct pipe_screen *screen,
struct pipe_resource *resource);
void
i915_resource_destroy(struct pipe_screen *screen,
struct pipe_resource *resource);
void i915_buffer_subdata(struct pipe_context *rm_ctx,
struct pipe_resource *resource, unsigned usage,
unsigned offset, unsigned size, const void *data);
void
i915_buffer_subdata(struct pipe_context *rm_ctx,
struct pipe_resource *resource,
unsigned usage, unsigned offset,
unsigned size, const void *data);
void *i915_buffer_transfer_map(struct pipe_context *pipe,
struct pipe_resource *resource, unsigned level,
unsigned usage, const struct pipe_box *box,
struct pipe_transfer **ptransfer);
void *
i915_buffer_transfer_map(struct pipe_context *pipe,
struct pipe_resource *resource,
unsigned level,
unsigned usage,
const struct pipe_box *box,
struct pipe_transfer **ptransfer);
void i915_buffer_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer);
void
i915_buffer_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer);
void *i915_texture_transfer_map(struct pipe_context *pipe,
struct pipe_resource *resource, unsigned level,
unsigned usage, const struct pipe_box *box,
struct pipe_transfer **ptransfer);
void *
i915_texture_transfer_map(struct pipe_context *pipe,
struct pipe_resource *resource,
unsigned level,
unsigned usage,
const struct pipe_box *box,
struct pipe_transfer **ptransfer);
void
i915_texture_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer);
void i915_texture_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer);
#endif /* I915_RESOURCE_H */

43
src/gallium/drivers/i915/i915_resource_buffer.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2006 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,13 +22,13 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
* Michel Dänzer <daenzer@vmware.com>
*/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
* Michel Dänzer <daenzer@vmware.com>
*/
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
@ -40,7 +40,6 @@
#include "i915_resource.h"
#include "i915_screen.h"
void
i915_resource_destroy(struct pipe_screen *screen,
struct pipe_resource *resource)
@ -65,13 +64,10 @@ i915_resource_destroy(struct pipe_screen *screen,
}
}
void *
i915_buffer_transfer_map(struct pipe_context *pipe,
struct pipe_resource *resource,
unsigned level,
unsigned usage,
const struct pipe_box *box,
struct pipe_resource *resource, unsigned level,
unsigned usage, const struct pipe_box *box,
struct pipe_transfer **ptransfer)
{
struct i915_context *i915 = i915_context(pipe);
@ -99,10 +95,9 @@ i915_buffer_transfer_unmap(struct pipe_context *pipe,
}
void
i915_buffer_subdata(struct pipe_context *rm_ctx,
struct pipe_resource *resource,
unsigned usage, unsigned offset,
unsigned size, const void *data)
i915_buffer_subdata(struct pipe_context *rm_ctx, struct pipe_resource *resource,
unsigned usage, unsigned offset, unsigned size,
const void *data)
{
struct i915_buffer *buffer = i915_buffer(resource);
@ -111,7 +106,7 @@ i915_buffer_subdata(struct pipe_context *rm_ctx,
struct pipe_resource *
i915_buffer_create(struct pipe_screen *screen,
const struct pipe_resource *template)
const struct pipe_resource *template)
{
struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer);
@ -134,12 +129,8 @@ err:
return NULL;
}
struct pipe_resource *
i915_user_buffer_create(struct pipe_screen *screen,
void *ptr,
unsigned bytes,
i915_user_buffer_create(struct pipe_screen *screen, void *ptr, unsigned bytes,
unsigned bind)
{
struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer);

199
src/gallium/drivers/i915/i915_resource_texture.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2006 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,29 +22,28 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
* Michel Dänzer <daenzer@vmware.com>
*/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
* Michel Dänzer <daenzer@vmware.com>
*/
#include "pipe/p_state.h"
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
#include "util/u_inlines.h"
#include "pipe/p_state.h"
#include "util/format/u_format.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_rect.h"
#include "i915_context.h"
#include "i915_debug.h"
#include "i915_resource.h"
#include "i915_screen.h"
#include "i915_winsys.h"
#include "i915_debug.h"
#define DEBUG_TEXTURES 0
@ -52,41 +51,31 @@
* Helper function and arrays
*/
/**
* Initial offset for Cube map.
*/
static const int initial_offsets[6][2] = {
[PIPE_TEX_FACE_POS_X] = {0, 0},
[PIPE_TEX_FACE_POS_Y] = {1, 0},
[PIPE_TEX_FACE_POS_Z] = {1, 1},
[PIPE_TEX_FACE_NEG_X] = {0, 2},
[PIPE_TEX_FACE_NEG_Y] = {1, 2},
[PIPE_TEX_FACE_NEG_Z] = {1, 3},
[PIPE_TEX_FACE_POS_X] = {0, 0}, [PIPE_TEX_FACE_POS_Y] = {1, 0},
[PIPE_TEX_FACE_POS_Z] = {1, 1}, [PIPE_TEX_FACE_NEG_X] = {0, 2},
[PIPE_TEX_FACE_NEG_Y] = {1, 2}, [PIPE_TEX_FACE_NEG_Z] = {1, 3},
};
/**
* Step offsets for Cube map.
*/
static const int step_offsets[6][2] = {
[PIPE_TEX_FACE_POS_X] = { 0, 2},
[PIPE_TEX_FACE_POS_Y] = {-1, 2},
[PIPE_TEX_FACE_POS_Z] = {-1, 1},
[PIPE_TEX_FACE_NEG_X] = { 0, 2},
[PIPE_TEX_FACE_NEG_Y] = {-1, 2},
[PIPE_TEX_FACE_NEG_Z] = {-1, 1},
[PIPE_TEX_FACE_POS_X] = {0, 2}, [PIPE_TEX_FACE_POS_Y] = {-1, 2},
[PIPE_TEX_FACE_POS_Z] = {-1, 1}, [PIPE_TEX_FACE_NEG_X] = {0, 2},
[PIPE_TEX_FACE_NEG_Y] = {-1, 2}, [PIPE_TEX_FACE_NEG_Z] = {-1, 1},
};
/**
* For compressed level 2
*/
static const int bottom_offsets[6] = {
[PIPE_TEX_FACE_POS_X] = 16 + 0 * 8,
[PIPE_TEX_FACE_POS_Y] = 16 + 1 * 8,
[PIPE_TEX_FACE_POS_Z] = 16 + 2 * 8,
[PIPE_TEX_FACE_NEG_X] = 16 + 3 * 8,
[PIPE_TEX_FACE_NEG_Y] = 16 + 4 * 8,
[PIPE_TEX_FACE_NEG_Z] = 16 + 5 * 8,
[PIPE_TEX_FACE_POS_X] = 16 + 0 * 8, [PIPE_TEX_FACE_POS_Y] = 16 + 1 * 8,
[PIPE_TEX_FACE_POS_Z] = 16 + 2 * 8, [PIPE_TEX_FACE_NEG_X] = 16 + 3 * 8,
[PIPE_TEX_FACE_NEG_Y] = 16 + 4 * 8, [PIPE_TEX_FACE_NEG_Z] = 16 + 5 * 8,
};
static inline unsigned
@ -107,10 +96,10 @@ get_pot_stride(enum pipe_format format, unsigned width)
return util_next_power_of_two(util_format_get_stride(format, width));
}
static inline const char*
static inline const char *
get_tiling_string(enum i915_winsys_buffer_tile tile)
{
switch(tile) {
switch (tile) {
case I915_TILE_NONE:
return "none";
case I915_TILE_X:
@ -123,15 +112,13 @@ get_tiling_string(enum i915_winsys_buffer_tile tile)
}
}
/*
* More advanced helper funcs
*/
static void
i915_texture_set_level_info(struct i915_texture *tex,
unsigned level, unsigned nr_images)
i915_texture_set_level_info(struct i915_texture *tex, unsigned level,
unsigned nr_images)
{
assert(level < ARRAY_SIZE(tex->nr_images));
assert(nr_images);
@ -143,21 +130,22 @@ i915_texture_set_level_info(struct i915_texture *tex,
tex->image_offset[level][0].nblocksy = 0;
}
unsigned i915_texture_offset(const struct i915_texture *tex,
unsigned level, unsigned layer)
unsigned
i915_texture_offset(const struct i915_texture *tex, unsigned level,
unsigned layer)
{
unsigned x, y;
x = tex->image_offset[level][layer].nblocksx
* util_format_get_blocksize(tex->b.format);
x = tex->image_offset[level][layer].nblocksx *
util_format_get_blocksize(tex->b.format);
y = tex->image_offset[level][layer].nblocksy;
return y * tex->stride + x;
}
static void
i915_texture_set_image_offset(struct i915_texture *tex,
unsigned level, unsigned img,
unsigned nblocksx, unsigned nblocksy)
i915_texture_set_image_offset(struct i915_texture *tex, unsigned level,
unsigned img, unsigned nblocksx,
unsigned nblocksy)
{
/* for the first image and level make sure offset is zero */
assert(!(img == 0 && level == 0) || (nblocksx == 0 && nblocksy == 0));
@ -167,8 +155,8 @@ i915_texture_set_image_offset(struct i915_texture *tex,
tex->image_offset[level][img].nblocksy = nblocksy;
#if DEBUG_TEXTURES
debug_printf("%s: %p level %u, img %u (%u, %u)\n", __FUNCTION__,
tex, level, img, x, y);
debug_printf("%s: %p level %u, img %u (%u, %u)\n", __FUNCTION__, tex, level,
img, x, y);
#endif
}
@ -190,12 +178,10 @@ i915_texture_tiling(struct i915_screen *is, struct i915_texture *tex)
return I915_TILE_Y;
}
/*
* Shared layout functions
*/
/**
* Special case to deal with scanout textures.
*/
@ -214,7 +200,7 @@ i9x5_scanout_layout(struct i915_texture *tex)
tex->stride = align(util_format_get_stride(pt->format, pt->width0), 64);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
tex->tiling = I915_TILE_X;
/* special case for cursors */
/* special case for cursors */
} else if (pt->width0 == 64 && pt->height0 == 64) {
tex->stride = get_pot_stride(pt->format, pt->width0);
tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
@ -224,8 +210,9 @@ i9x5_scanout_layout(struct i915_texture *tex)
#if DEBUG_TEXTURE
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
pt->width0, pt->height0, util_format_get_blocksize(pt->format),
tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy);
pt->width0, pt->height0, util_format_get_blocksize(pt->format),
tex->stride, tex->total_nblocksy,
tex->stride * tex->total_nblocksy);
#endif
return TRUE;
@ -255,8 +242,9 @@ i9x5_display_target_layout(struct i915_texture *tex)
#if DEBUG_TEXTURE
debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
pt->width0, pt->height0, util_format_get_blocksize(pt->format),
tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy);
pt->width0, pt->height0, util_format_get_blocksize(pt->format),
tex->stride, tex->total_nblocksy,
tex->stride * tex->total_nblocksy);
#endif
return TRUE;
@ -323,12 +311,10 @@ i9x5_texture_layout_cube(struct i915_texture *tex)
}
}
/*
* i915 layout functions
*/
static void
i915_texture_layout_2d(struct i915_texture *tex)
{
@ -369,7 +355,7 @@ i915_texture_layout_3d(struct i915_texture *tex)
unsigned nblocksy = util_format_get_nblocksy(pt->format, height);
unsigned stack_nblocksy = 0;
/* Calculate the size of a single slice.
/* Calculate the size of a single slice.
*/
tex->stride = align(util_format_get_stride(pt->format, width), 4);
@ -385,11 +371,11 @@ i915_texture_layout_3d(struct i915_texture *tex)
nblocksy = util_format_get_nblocksy(pt->format, height);
}
/* Fixup depth image_offsets:
/* Fixup depth image_offsets:
*/
for (level = 0; level <= pt->last_level; level++) {
unsigned i;
for (i = 0; i < depth; i++)
for (i = 0; i < depth; i++)
i915_texture_set_image_offset(tex, level, i, 0, i * stack_nblocksy);
depth = u_minify(depth, 1);
@ -403,7 +389,7 @@ i915_texture_layout_3d(struct i915_texture *tex)
}
static boolean
i915_texture_layout(struct i915_texture * tex)
i915_texture_layout(struct i915_texture *tex)
{
switch (tex->b.target) {
case PIPE_TEXTURE_1D:
@ -426,12 +412,10 @@ i915_texture_layout(struct i915_texture * tex)
return TRUE;
}
/*
* i945 layout functions
*/
static void
i945_texture_layout_2d(struct i915_texture *tex)
{
@ -488,7 +472,7 @@ i945_texture_layout_2d(struct i915_texture *tex)
y += nblocksy;
}
width = u_minify(width, 1);
width = u_minify(width, 1);
height = u_minify(height, 1);
nblocksx = align_nblocksx(pt->format, width, align_x);
nblocksy = align_nblocksy(pt->format, height, align_y);
@ -523,7 +507,8 @@ i945_texture_layout_3d(struct i915_texture *tex)
for (q = 0; q < depth;) {
for (j = 0; j < pack_x_nr && q < depth; j++, q++) {
i915_texture_set_image_offset(tex, level, q, x, y + tex->total_nblocksy);
i915_texture_set_image_offset(tex, level, q, x,
y + tex->total_nblocksy);
x += pack_x_pitch;
}
@ -536,7 +521,9 @@ i945_texture_layout_3d(struct i915_texture *tex)
if (pack_x_pitch > 4) {
pack_x_pitch >>= 1;
pack_x_nr <<= 1;
assert(pack_x_pitch * pack_x_nr * util_format_get_blocksize(pt->format) <= tex->stride);
assert(pack_x_pitch * pack_x_nr *
util_format_get_blocksize(pt->format) <=
tex->stride);
}
if (pack_y_pitch > 2) {
@ -560,7 +547,7 @@ i945_texture_layout_cube(struct i915_texture *tex)
unsigned level;
unsigned face;
assert(pt->width0 == pt->height0); /* cubemap images are square */
assert(pt->width0 == pt->height0); /* cubemap images are square */
assert(util_format_is_s3tc(pt->format)); /* compressed only */
/*
@ -647,7 +634,7 @@ i945_texture_layout_cube(struct i915_texture *tex)
}
static boolean
i945_texture_layout(struct i915_texture * tex)
i945_texture_layout(struct i915_texture *tex)
{
switch (tex->b.target) {
case PIPE_TEXTURE_1D:
@ -673,20 +660,15 @@ i945_texture_layout(struct i915_texture * tex)
return TRUE;
}
/*
* Screen texture functions
*/
bool
i915_resource_get_handle(struct pipe_screen *screen,
struct pipe_context *context,
struct pipe_resource *texture,
struct winsys_handle *whandle,
unsigned usage)
struct winsys_handle *whandle, unsigned usage)
{
if (texture->target == PIPE_BUFFER)
return false;
@ -700,10 +682,8 @@ i915_resource_get_handle(struct pipe_screen *screen,
void *
i915_texture_transfer_map(struct pipe_context *pipe,
struct pipe_resource *resource,
unsigned level,
unsigned usage,
const struct pipe_box *box,
struct pipe_resource *resource, unsigned level,
unsigned usage, const struct pipe_box *box,
struct pipe_transfer **ptransfer)
{
struct i915_context *i915 = i915_context(pipe);
@ -732,17 +712,20 @@ i915_texture_transfer_map(struct pipe_context *pipe,
if (i915->blitter &&
util_blitter_is_copy_supported(i915->blitter, resource, resource) &&
(usage & PIPE_MAP_WRITE) &&
!(usage & (PIPE_MAP_READ | PIPE_MAP_DONTBLOCK | PIPE_MAP_UNSYNCHRONIZED)))
!(usage &
(PIPE_MAP_READ | PIPE_MAP_DONTBLOCK | PIPE_MAP_UNSYNCHRONIZED)))
use_staging_texture = TRUE;
use_staging_texture = FALSE;
if (use_staging_texture) {
/*
/*
* Allocate the untiled staging texture.
* If the alloc fails, transfer->staging_texture is NULL and we fallback to a map()
* If the alloc fails, transfer->staging_texture is NULL and we fallback
* to a map()
*/
transfer->staging_texture = i915_texture_create(pipe->screen, resource, TRUE);
transfer->staging_texture =
i915_texture_create(pipe->screen, resource, TRUE);
}
if (resource->target != PIPE_TEXTURE_3D &&
@ -770,16 +753,17 @@ i915_texture_transfer_map(struct pipe_context *pipe,
*ptransfer = &transfer->b;
return map + offset +
box->y / util_format_get_blockheight(format) * transfer->b.stride +
box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
box->y / util_format_get_blockheight(format) * transfer->b.stride +
box->x / util_format_get_blockwidth(format) *
util_format_get_blocksize(format);
}
void
i915_texture_transfer_unmap(struct pipe_context *pipe,
struct pipe_transfer *transfer)
struct pipe_transfer *transfer)
{
struct i915_context *i915 = i915_context(pipe);
struct i915_transfer *itransfer = (struct i915_transfer*)transfer;
struct i915_transfer *itransfer = (struct i915_transfer *)transfer;
struct i915_texture *tex = i915_texture(itransfer->b.resource);
struct i915_winsys *iws = i915_screen(tex->b.screen)->iws;
@ -788,15 +772,14 @@ i915_texture_transfer_unmap(struct pipe_context *pipe,
iws->buffer_unmap(iws, tex->buffer);
if ((itransfer->staging_texture) &&
(transfer->usage & PIPE_MAP_WRITE)) {
if ((itransfer->staging_texture) && (transfer->usage & PIPE_MAP_WRITE)) {
struct pipe_box sbox;
u_box_origin_2d(itransfer->b.box.width, itransfer->b.box.height, &sbox);
pipe->resource_copy_region(pipe, itransfer->b.resource, itransfer->b.level,
itransfer->b.box.x, itransfer->b.box.y, itransfer->b.box.z,
itransfer->staging_texture,
0, &sbox);
pipe->resource_copy_region(pipe, itransfer->b.resource,
itransfer->b.level, itransfer->b.box.x,
itransfer->b.box.y, itransfer->b.box.z,
itransfer->staging_texture, 0, &sbox);
pipe->flush(pipe, NULL, 0);
pipe_resource_reference(&itransfer->staging_texture, NULL);
}
@ -895,8 +878,7 @@ out:
struct pipe_resource *
i915_texture_create(struct pipe_screen *screen,
const struct pipe_resource *template,
boolean force_untiled)
const struct pipe_resource *template, boolean force_untiled)
{
struct i915_screen *is = i915_screen(screen);
struct i915_winsys *iws = is->iws;
@ -910,7 +892,7 @@ i915_texture_create(struct pipe_screen *screen,
pipe_reference_init(&tex->b.reference, 1);
tex->b.screen = screen;
if ( (force_untiled) || (template->usage == PIPE_USAGE_STREAM) )
if ((force_untiled) || (template->usage == PIPE_USAGE_STREAM))
tex->tiling = I915_TILE_NONE;
else
tex->tiling = i915_texture_tiling(is, tex);
@ -933,13 +915,13 @@ i915_texture_create(struct pipe_screen *screen,
else
buf_usage = I915_NEW_TEXTURE;
tex->buffer = iws->buffer_create_tiled(iws, &tex->stride, tex->total_nblocksy,
&tex->tiling, buf_usage);
tex->buffer = iws->buffer_create_tiled(
iws, &tex->stride, tex->total_nblocksy, &tex->tiling, buf_usage);
if (!tex->buffer)
goto fail;
I915_DBG(DBG_TEXTURE, "%s: %p stride %u, blocks (%u, %u) tiling %s\n", __func__,
tex, tex->stride,
I915_DBG(DBG_TEXTURE, "%s: %p stride %u, blocks (%u, %u) tiling %s\n",
__func__, tex, tex->stride,
tex->stride / util_format_get_blocksize(tex->b.format),
tex->total_nblocksy, get_tiling_string(tex->tiling));
@ -951,9 +933,9 @@ fail:
}
struct pipe_resource *
i915_texture_from_handle(struct pipe_screen * screen,
const struct pipe_resource *template,
struct winsys_handle *whandle)
i915_texture_from_handle(struct pipe_screen *screen,
const struct pipe_resource *template,
struct winsys_handle *whandle)
{
struct i915_screen *is = i915_screen(screen);
struct i915_texture *tex;
@ -964,13 +946,13 @@ i915_texture_from_handle(struct pipe_screen * screen,
assert(screen);
buffer = iws->buffer_from_handle(iws, whandle, template->height0, &tiling, &stride);
buffer = iws->buffer_from_handle(iws, whandle, template->height0, &tiling,
&stride);
/* Only supports one type */
if ((template->target != PIPE_TEXTURE_2D &&
template->target != PIPE_TEXTURE_RECT) ||
template->last_level != 0 ||
template->depth0 != 1) {
template->target != PIPE_TEXTURE_RECT) ||
template->last_level != 0 || template->depth0 != 1) {
return NULL;
}
@ -991,11 +973,10 @@ i915_texture_from_handle(struct pipe_screen * screen,
tex->buffer = buffer;
I915_DBG(DBG_TEXTURE, "%s: %p stride %u, blocks (%u, %u) tiling %s\n", __func__,
tex, tex->stride,
I915_DBG(DBG_TEXTURE, "%s: %p stride %u, blocks (%u, %u) tiling %s\n",
__func__, tex, tex->stride,
tex->stride / util_format_get_blocksize(tex->b.format),
tex->total_nblocksy, get_tiling_string(tex->tiling));
return &tex->b;
}

170
src/gallium/drivers/i915/i915_screen.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2008 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,34 +22,31 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "compiler/nir/nir.h"
#include "draw/draw_context.h"
#include "util/os_misc.h"
#include "util/format/u_format.h"
#include "util/format/u_format_s3tc.h"
#include "util/os_misc.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
#include "util/u_screen.h"
#include "util/u_string.h"
#include "i915_reg.h"
#include "i915_debug.h"
#include "i915_context.h"
#include "i915_screen.h"
#include "i915_resource.h"
#include "i915_winsys.h"
#include "i915_debug.h"
#include "i915_public.h"
#include "i915_reg.h"
#include "i915_resource.h"
#include "i915_screen.h"
#include "i915_winsys.h"
/*
* Probe functions
*/
static const char *
i915_get_vendor(struct pipe_screen *screen)
{
@ -167,9 +164,8 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
};
static const void *
i915_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_ir ir,
enum pipe_shader_type shader)
i915_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir,
enum pipe_shader_type shader)
{
assert(ir == PIPE_SHADER_IR_NIR);
if (shader == PIPE_SHADER_FRAGMENT)
@ -179,37 +175,36 @@ i915_get_compiler_options(struct pipe_screen *pscreen,
}
static int
i915_get_shader_param(struct pipe_screen *screen,
enum pipe_shader_type shader,
i915_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
enum pipe_shader_cap cap)
{
switch (cap) {
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
case PIPE_SHADER_CAP_INTEGERS:
/* mesa/st requires that this cap is the same across stages, and the FS
* can't do ints.
*/
return 0;
case PIPE_SHADER_CAP_INTEGERS:
/* mesa/st requires that this cap is the same across stages, and the FS
* can't do ints.
*/
return 0;
case PIPE_SHADER_CAP_INT16:
return 0;
case PIPE_SHADER_CAP_INT16:
return 0;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
/* While draw could normally handle this for the VS, the NIR lowering
* to regs can't handle our non-native-integers, so we have to lower to
* if ladders.
*/
return 0;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
/* While draw could normally handle this for the VS, the NIR lowering
* to regs can't handle our non-native-integers, so we have to lower to
* if ladders.
*/
return 0;
default:
break;
default:
break;
}
switch(shader) {
switch (shader) {
case PIPE_SHADER_VERTEX:
switch (cap) {
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
@ -218,12 +213,12 @@ i915_get_shader_param(struct pipe_screen *screen,
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
return 0;
default:
default:
return draw_get_shader_param(shader, cap);
}
case PIPE_SHADER_FRAGMENT:
/* XXX: some of these are just shader model 2.0 values, fix this! */
switch(cap) {
switch (cap) {
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
@ -286,7 +281,6 @@ i915_get_shader_param(struct pipe_screen *screen,
default:
return 0;
}
}
static int
@ -388,7 +382,8 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
* assume that there's some fragmentation, and we start doing extra
* flushing, etc. That's the big cliff apps will care about.
*/
const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
const int gpu_mappable_megabytes =
is->iws->aperture_size(is->iws) * 3 / 4;
uint64_t system_memory;
if (!os_get_total_physical_memory(&system_memory))
@ -407,7 +402,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
static float
i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
{
switch(cap) {
switch (cap) {
case PIPE_CAPF_MAX_LINE_WIDTH:
FALLTHROUGH;
case PIPE_CAPF_MAX_LINE_WIDTH_AA:
@ -438,59 +433,37 @@ i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
}
bool
i915_is_format_supported(struct pipe_screen *screen,
enum pipe_format format,
enum pipe_texture_target target,
unsigned sample_count,
unsigned storage_sample_count,
unsigned tex_usage)
i915_is_format_supported(struct pipe_screen *screen, enum pipe_format format,
enum pipe_texture_target target, unsigned sample_count,
unsigned storage_sample_count, unsigned tex_usage)
{
static const enum pipe_format tex_supported[] = {
PIPE_FORMAT_B8G8R8A8_UNORM,
PIPE_FORMAT_B8G8R8A8_SRGB,
PIPE_FORMAT_B8G8R8X8_UNORM,
PIPE_FORMAT_R8G8B8A8_UNORM,
PIPE_FORMAT_R8G8B8X8_UNORM,
PIPE_FORMAT_B4G4R4A4_UNORM,
PIPE_FORMAT_B5G6R5_UNORM,
PIPE_FORMAT_B5G5R5A1_UNORM,
PIPE_FORMAT_B10G10R10A2_UNORM,
PIPE_FORMAT_L8_UNORM,
PIPE_FORMAT_A8_UNORM,
PIPE_FORMAT_I8_UNORM,
PIPE_FORMAT_L8A8_UNORM,
PIPE_FORMAT_UYVY,
PIPE_FORMAT_B8G8R8A8_UNORM, PIPE_FORMAT_B8G8R8A8_SRGB,
PIPE_FORMAT_B8G8R8X8_UNORM, PIPE_FORMAT_R8G8B8A8_UNORM,
PIPE_FORMAT_R8G8B8X8_UNORM, PIPE_FORMAT_B4G4R4A4_UNORM,
PIPE_FORMAT_B5G6R5_UNORM, PIPE_FORMAT_B5G5R5A1_UNORM,
PIPE_FORMAT_B10G10R10A2_UNORM, PIPE_FORMAT_L8_UNORM, PIPE_FORMAT_A8_UNORM,
PIPE_FORMAT_I8_UNORM, PIPE_FORMAT_L8A8_UNORM, PIPE_FORMAT_UYVY,
PIPE_FORMAT_YUYV,
/* XXX why not?
PIPE_FORMAT_Z16_UNORM, */
PIPE_FORMAT_DXT1_RGB,
PIPE_FORMAT_DXT1_RGBA,
PIPE_FORMAT_DXT3_RGBA,
PIPE_FORMAT_DXT5_RGBA,
PIPE_FORMAT_Z24X8_UNORM,
PIPE_FORMAT_Z24_UNORM_S8_UINT,
PIPE_FORMAT_NONE /* list terminator */
PIPE_FORMAT_DXT1_RGB, PIPE_FORMAT_DXT1_RGBA, PIPE_FORMAT_DXT3_RGBA,
PIPE_FORMAT_DXT5_RGBA, PIPE_FORMAT_Z24X8_UNORM,
PIPE_FORMAT_Z24_UNORM_S8_UINT, PIPE_FORMAT_NONE /* list terminator */
};
static const enum pipe_format render_supported[] = {
PIPE_FORMAT_B8G8R8A8_UNORM,
PIPE_FORMAT_B8G8R8X8_UNORM,
PIPE_FORMAT_R8G8B8A8_UNORM,
PIPE_FORMAT_R8G8B8X8_UNORM,
PIPE_FORMAT_B5G6R5_UNORM,
PIPE_FORMAT_B5G5R5A1_UNORM,
PIPE_FORMAT_B4G4R4A4_UNORM,
PIPE_FORMAT_B10G10R10A2_UNORM,
PIPE_FORMAT_L8_UNORM,
PIPE_FORMAT_A8_UNORM,
PIPE_FORMAT_I8_UNORM,
PIPE_FORMAT_NONE /* list terminator */
PIPE_FORMAT_B8G8R8A8_UNORM, PIPE_FORMAT_B8G8R8X8_UNORM,
PIPE_FORMAT_R8G8B8A8_UNORM, PIPE_FORMAT_R8G8B8X8_UNORM,
PIPE_FORMAT_B5G6R5_UNORM, PIPE_FORMAT_B5G5R5A1_UNORM,
PIPE_FORMAT_B4G4R4A4_UNORM, PIPE_FORMAT_B10G10R10A2_UNORM,
PIPE_FORMAT_L8_UNORM, PIPE_FORMAT_A8_UNORM,
PIPE_FORMAT_I8_UNORM, PIPE_FORMAT_NONE /* list terminator */
};
static const enum pipe_format depth_supported[] = {
/* XXX why not?
PIPE_FORMAT_Z16_UNORM, */
PIPE_FORMAT_Z24X8_UNORM,
PIPE_FORMAT_Z24_UNORM_S8_UINT,
PIPE_FORMAT_NONE /* list terminator */
PIPE_FORMAT_Z24X8_UNORM, PIPE_FORMAT_Z24_UNORM_S8_UINT,
PIPE_FORMAT_NONE /* list terminator */
};
const enum pipe_format *list;
uint i;
@ -501,7 +474,7 @@ i915_is_format_supported(struct pipe_screen *screen,
if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
return false;
if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
if (tex_usage & PIPE_BIND_DEPTH_STENCIL)
list = depth_supported;
else if (tex_usage & PIPE_BIND_RENDER_TARGET)
list = render_supported;
@ -518,15 +491,12 @@ i915_is_format_supported(struct pipe_screen *screen,
return false;
}
/*
* Fence functions
*/
static void
i915_fence_reference(struct pipe_screen *screen,
struct pipe_fence_handle **ptr,
i915_fence_reference(struct pipe_screen *screen, struct pipe_fence_handle **ptr,
struct pipe_fence_handle *fence)
{
struct i915_screen *is = i915_screen(screen);
@ -535,10 +505,8 @@ i915_fence_reference(struct pipe_screen *screen,
}
static bool
i915_fence_finish(struct pipe_screen *screen,
struct pipe_context *ctx,
struct pipe_fence_handle *fence,
uint64_t timeout)
i915_fence_finish(struct pipe_screen *screen, struct pipe_context *ctx,
struct pipe_fence_handle *fence, uint64_t timeout)
{
struct i915_screen *is = i915_screen(screen);
@ -548,18 +516,14 @@ i915_fence_finish(struct pipe_screen *screen,
return is->iws->fence_finish(is->iws, fence) == 1;
}
/*
* Generic functions
*/
static void
i915_flush_frontbuffer(struct pipe_screen *screen,
struct pipe_context *pipe,
struct pipe_resource *resource,
unsigned level, unsigned layer,
void *winsys_drawable_handle,
i915_flush_frontbuffer(struct pipe_screen *screen, struct pipe_context *pipe,
struct pipe_resource *resource, unsigned level,
unsigned layer, void *winsys_drawable_handle,
struct pipe_box *sub_box)
{
/* XXX: Dummy right now. */
@ -612,7 +576,7 @@ i915_screen_create(struct i915_winsys *iws)
break;
default:
debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
__FUNCTION__, iws->pci_id);
FREE(is);
return NULL;

30
src/gallium/drivers/i915/i915_screen.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2008 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,24 +22,21 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_SCREEN_H
#define I915_SCREEN_H
#include "pipe/p_state.h"
#include "pipe/p_screen.h"
#include "pipe/p_state.h"
struct i915_winsys;
/**
* Subclass of pipe_screen
*/
struct i915_screen
{
struct i915_screen {
struct pipe_screen base;
struct i915_winsys *iws;
@ -53,24 +50,19 @@ struct i915_screen
} debug;
};
/*
* Cast wrappers
*/
static inline struct i915_screen *
i915_screen(struct pipe_screen *pscreen)
{
return (struct i915_screen *) pscreen;
return (struct i915_screen *)pscreen;
}
bool
i915_is_format_supported(struct pipe_screen *screen,
enum pipe_format format,
enum pipe_texture_target target,
unsigned sample_count,
unsigned storage_sample_count,
unsigned tex_usage);
i915_is_format_supported(struct pipe_screen *screen, enum pipe_format format,
enum pipe_texture_target target, unsigned sample_count,
unsigned storage_sample_count, unsigned tex_usage);
#endif /* I915_SCREEN_H */

412
src/gallium/drivers/i915/i915_state.c
View File

@ -1,5 +1,5 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,29 +22,28 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Authors: Keith Whitwell <keithw@vmware.com>
*/
#include "draw/draw_context.h"
#include "nir.h"
#include "nir/nir_to_tgsi.h"
#include "tgsi/tgsi_parse.h"
#include "util/u_helpers.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_transfer.h"
#include "tgsi/tgsi_parse.h"
#include "nir.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_state_inlines.h"
#include "i915_fpc.h"
#include "i915_reg.h"
#include "i915_resource.h"
#include "i915_state.h"
#include "i915_state_inlines.h"
/* The i915 (and related graphics cores) do not support GL_CLAMP. The
* Intel drivers for "other operating systems" implement GL_CLAMP as
@ -57,7 +56,7 @@ translate_wrap_mode(unsigned wrap)
case PIPE_TEX_WRAP_REPEAT:
return TEXCOORDMODE_WRAP;
case PIPE_TEX_WRAP_CLAMP:
return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
return TEXCOORDMODE_CLAMP_EDGE;
case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
@ -69,7 +68,8 @@ translate_wrap_mode(unsigned wrap)
}
}
static unsigned translate_img_filter( unsigned filter )
static unsigned
translate_img_filter(unsigned filter)
{
switch (filter) {
case PIPE_TEX_FILTER_NEAREST:
@ -82,7 +82,8 @@ static unsigned translate_img_filter( unsigned filter )
}
}
static unsigned translate_mip_filter( unsigned filter )
static unsigned
translate_mip_filter(unsigned filter)
{
switch (filter) {
case PIPE_TEX_MIPFILTER_NONE:
@ -147,45 +148,38 @@ static void *
i915_create_blend_state(struct pipe_context *pipe,
const struct pipe_blend_state *blend)
{
struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
struct i915_blend_state *cso_data = CALLOC_STRUCT(i915_blend_state);
{
unsigned eqRGB = blend->rt[0].rgb_func;
unsigned eqRGB = blend->rt[0].rgb_func;
unsigned srcRGB = blend->rt[0].rgb_src_factor;
unsigned dstRGB = blend->rt[0].rgb_dst_factor;
unsigned eqA = blend->rt[0].alpha_func;
unsigned srcA = blend->rt[0].alpha_src_factor;
unsigned dstA = blend->rt[0].alpha_dst_factor;
unsigned eqA = blend->rt[0].alpha_func;
unsigned srcA = blend->rt[0].alpha_src_factor;
unsigned dstA = blend->rt[0].alpha_dst_factor;
/* Special handling for MIN/MAX filter modes handled at
* frontend level.
*/
if (srcA != srcRGB ||
dstA != dstRGB ||
eqA != eqRGB) {
if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
IAB_MODIFY_ENABLE |
IAB_ENABLE |
IAB_MODIFY_FUNC |
IAB_MODIFY_SRC_FACTOR |
IAB_MODIFY_DST_FACTOR |
IAB_MODIFY_ENABLE | IAB_ENABLE | IAB_MODIFY_FUNC |
IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR |
SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
(i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
}
else {
cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
IAB_MODIFY_ENABLE |
0);
} else {
cso_data->iab =
(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | 0);
}
}
cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
ENABLE_LOGIC_OP_FUNC |
LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
cso_data->modes4 |=
(_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC |
LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
if (blend->logicop_enable)
cso_data->LIS5 |= S5_LOGICOP_ENABLE;
@ -208,49 +202,51 @@ i915_create_blend_state(struct pipe_context *pipe,
if (blend->rt[0].blend_enable) {
unsigned funcRGB = blend->rt[0].rgb_func;
unsigned srcRGB = blend->rt[0].rgb_src_factor;
unsigned dstRGB = blend->rt[0].rgb_dst_factor;
unsigned srcRGB = blend->rt[0].rgb_src_factor;
unsigned dstRGB = blend->rt[0].rgb_dst_factor;
cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
(i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
cso_data->LIS6 |=
(S6_CBUF_BLEND_ENABLE |
SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
(i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
}
cso_data->LIS6_alpha_in_g =
i915_remap_lis6_blend_dst_alpha(cso_data->LIS6, BLENDFACT_DST_COLR, BLENDFACT_INV_DST_COLR);
cso_data->LIS6_alpha_is_x =
i915_remap_lis6_blend_dst_alpha(cso_data->LIS6, BLENDFACT_ONE, BLENDFACT_ZERO);
cso_data->LIS6_alpha_in_g = i915_remap_lis6_blend_dst_alpha(
cso_data->LIS6, BLENDFACT_DST_COLR, BLENDFACT_INV_DST_COLR);
cso_data->LIS6_alpha_is_x = i915_remap_lis6_blend_dst_alpha(
cso_data->LIS6, BLENDFACT_ONE, BLENDFACT_ZERO);
cso_data->iab_alpha_in_g =
i915_remap_iab_blend_dst_alpha(cso_data->iab, BLENDFACT_DST_COLR, BLENDFACT_INV_DST_COLR);
cso_data->iab_alpha_is_x =
i915_remap_iab_blend_dst_alpha(cso_data->iab, BLENDFACT_ONE, BLENDFACT_ZERO);
cso_data->iab_alpha_in_g = i915_remap_iab_blend_dst_alpha(
cso_data->iab, BLENDFACT_DST_COLR, BLENDFACT_INV_DST_COLR);
cso_data->iab_alpha_is_x = i915_remap_iab_blend_dst_alpha(
cso_data->iab, BLENDFACT_ONE, BLENDFACT_ZERO);
return cso_data;
}
static void i915_bind_blend_state(struct pipe_context *pipe,
void *blend)
static void
i915_bind_blend_state(struct pipe_context *pipe, void *blend)
{
struct i915_context *i915 = i915_context(pipe);
if (i915->blend == blend)
return;
i915->blend = (struct i915_blend_state*)blend;
i915->blend = (struct i915_blend_state *)blend;
i915->dirty |= I915_NEW_BLEND;
}
static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
static void
i915_delete_blend_state(struct pipe_context *pipe, void *blend)
{
FREE(blend);
}
static void i915_set_blend_color( struct pipe_context *pipe,
const struct pipe_blend_color *blend_color )
static void
i915_set_blend_color(struct pipe_context *pipe,
const struct pipe_blend_color *blend_color)
{
struct i915_context *i915 = i915_context(pipe);
@ -262,8 +258,9 @@ static void i915_set_blend_color( struct pipe_context *pipe,
i915->dirty |= I915_NEW_BLEND;
}
static void i915_set_stencil_ref( struct pipe_context *pipe,
const struct pipe_stencil_ref stencil_ref )
static void
i915_set_stencil_ref(struct pipe_context *pipe,
const struct pipe_stencil_ref stencil_ref)
{
struct i915_context *i915 = i915_context(pipe);
@ -276,7 +273,7 @@ static void *
i915_create_sampler_state(struct pipe_context *pipe,
const struct pipe_sampler_state *sampler)
{
struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
struct i915_sampler_state *cso = CALLOC_STRUCT(i915_sampler_state);
const unsigned ws = sampler->wrap_s;
const unsigned wt = sampler->wrap_t;
const unsigned wr = sampler->wrap_r;
@ -286,8 +283,8 @@ i915_create_sampler_state(struct pipe_context *pipe,
cso->templ = *sampler;
mipFilt = translate_mip_filter(sampler->min_mip_filter);
minFilt = translate_img_filter( sampler->min_img_filter );
magFilt = translate_img_filter( sampler->mag_img_filter );
minFilt = translate_img_filter(sampler->min_img_filter);
magFilt = translate_img_filter(sampler->mag_img_filter);
if (sampler->max_anisotropy > 1)
minFilt = magFilt = FILTER_ANISOTROPIC;
@ -297,37 +294,35 @@ i915_create_sampler_state(struct pipe_context *pipe,
}
{
int b = (int) (sampler->lod_bias * 16.0);
int b = (int)(sampler->lod_bias * 16.0);
b = CLAMP(b, -256, 255);
cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
}
/* Shadow:
*/
if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
{
cso->state[0] |= (SS2_SHADOW_ENABLE |
i915_translate_shadow_compare_func(sampler->compare_func));
if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
cso->state[0] |= (SS2_SHADOW_ENABLE | i915_translate_shadow_compare_func(
sampler->compare_func));
minFilt = FILTER_4X4_FLAT;
magFilt = FILTER_4X4_FLAT;
}
cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
(mipFilt << SS2_MIP_FILTER_SHIFT) |
(magFilt << SS2_MAG_FILTER_SHIFT));
cso->state[0] |=
((minFilt << SS2_MIN_FILTER_SHIFT) | (mipFilt << SS2_MIP_FILTER_SHIFT) |
(magFilt << SS2_MAG_FILTER_SHIFT));
cso->state[1] |=
((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
(translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
(translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
cso->state[1] |= ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
(translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
(translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
if (sampler->normalized_coords)
cso->state[1] |= SS3_NORMALIZED_COORDS;
{
int minlod = (int) (16.0 * sampler->min_lod);
int maxlod = (int) (16.0 * sampler->max_lod);
int minlod = (int)(16.0 * sampler->min_lod);
int maxlod = (int)(16.0 * sampler->max_lod);
minlod = CLAMP(minlod, 0, 16 * 11);
maxlod = CLAMP(maxlod, 0, 16 * 11);
@ -350,9 +345,8 @@ i915_create_sampler_state(struct pipe_context *pipe,
static void
i915_bind_sampler_states(struct pipe_context *pipe,
enum pipe_shader_type shader,
unsigned start, unsigned num,
void **samplers)
enum pipe_shader_type shader, unsigned start,
unsigned num, void **samplers)
{
if (shader != PIPE_SHADER_FRAGMENT) {
assert(num == 0);
@ -364,8 +358,7 @@ i915_bind_sampler_states(struct pipe_context *pipe,
/* Check for no-op */
if (num == i915->num_samplers &&
!memcmp(i915->fragment_sampler + start, samplers,
num * sizeof(void *)))
!memcmp(i915->fragment_sampler + start, samplers, num * sizeof(void *)))
return;
for (i = 0; i < num; ++i)
@ -382,90 +375,83 @@ i915_bind_sampler_states(struct pipe_context *pipe,
i915->dirty |= I915_NEW_SAMPLER;
}
static void i915_delete_sampler_state(struct pipe_context *pipe,
void *sampler)
static void
i915_delete_sampler_state(struct pipe_context *pipe, void *sampler)
{
FREE(sampler);
}
/** XXX move someday? Or consolidate all these simple state setters
* into one file.
*/
static void *
i915_create_depth_stencil_state(struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *depth_stencil)
i915_create_depth_stencil_state(
struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *depth_stencil)
{
struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
struct i915_depth_stencil_state *cso =
CALLOC_STRUCT(i915_depth_stencil_state);
{
int testmask = depth_stencil->stencil[0].valuemask & 0xff;
int writemask = depth_stencil->stencil[0].writemask & 0xff;
cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
ENABLE_STENCIL_TEST_MASK |
STENCIL_TEST_MASK(testmask) |
ENABLE_STENCIL_WRITE_MASK |
STENCIL_WRITE_MASK(writemask));
cso->stencil_modes4 |=
(_3DSTATE_MODES_4_CMD | ENABLE_STENCIL_TEST_MASK |
STENCIL_TEST_MASK(testmask) | ENABLE_STENCIL_WRITE_MASK |
STENCIL_WRITE_MASK(writemask));
}
if (depth_stencil->stencil[0].enabled) {
int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE |
cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE |
(test << S5_STENCIL_TEST_FUNC_SHIFT) |
(fop << S5_STENCIL_FAIL_SHIFT) |
(fop << S5_STENCIL_FAIL_SHIFT) |
(dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
(dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
}
if (depth_stencil->stencil[1].enabled) {
int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
int tmask = depth_stencil->stencil[1].valuemask & 0xff;
int wmask = depth_stencil->stencil[1].writemask & 0xff;
cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
BFO_ENABLE_STENCIL_FUNCS |
BFO_ENABLE_STENCIL_TWO_SIDE |
BFO_ENABLE_STENCIL_REF |
BFO_STENCIL_TWO_SIDE |
(test << BFO_STENCIL_TEST_SHIFT) |
(fop << BFO_STENCIL_FAIL_SHIFT) |
cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_FUNCS |
BFO_ENABLE_STENCIL_TWO_SIDE | BFO_ENABLE_STENCIL_REF |
BFO_STENCIL_TWO_SIDE | (test << BFO_STENCIL_TEST_SHIFT) |
(fop << BFO_STENCIL_FAIL_SHIFT) |
(dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
(dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
BFM_ENABLE_STENCIL_TEST_MASK |
BFM_ENABLE_STENCIL_WRITE_MASK |
(tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
(wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
}
else {
cso->bfo[1] =
(_3DSTATE_BACKFACE_STENCIL_MASKS | BFM_ENABLE_STENCIL_TEST_MASK |
BFM_ENABLE_STENCIL_WRITE_MASK |
(tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
(wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
} else {
/* This actually disables two-side stencil: The bit set is a
* modify-enable bit to indicate we are changing the two-side
* setting. Then there is a symbolic zero to show that we are
* setting the flag to zero/off.
*/
cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
BFO_ENABLE_STENCIL_TWO_SIDE |
0);
cso->bfo[0] =
(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0);
cso->bfo[1] = 0;
}
if (depth_stencil->depth_enabled) {
int func = i915_translate_compare_func(depth_stencil->depth_func);
cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
(func << S6_DEPTH_TEST_FUNC_SHIFT));
cso->depth_LIS6 |=
(S6_DEPTH_TEST_ENABLE | (func << S6_DEPTH_TEST_FUNC_SHIFT));
if (depth_stencil->depth_writemask)
cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
@ -475,16 +461,16 @@ i915_create_depth_stencil_state(struct pipe_context *pipe,
int test = i915_translate_compare_func(depth_stencil->alpha_func);
ubyte refByte = float_to_ubyte(depth_stencil->alpha_ref_value);
cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
(test << S6_ALPHA_TEST_FUNC_SHIFT) |
(((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
cso->depth_LIS6 |=
(S6_ALPHA_TEST_ENABLE | (test << S6_ALPHA_TEST_FUNC_SHIFT) |
(((unsigned)refByte) << S6_ALPHA_REF_SHIFT));
}
return cso;
}
static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
void *depth_stencil)
static void
i915_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
{
struct i915_context *i915 = i915_context(pipe);
@ -496,32 +482,29 @@ static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
i915->dirty |= I915_NEW_DEPTH_STENCIL;
}
static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
void *depth_stencil)
static void
i915_delete_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil)
{
FREE(depth_stencil);
}
static void i915_set_scissor_states( struct pipe_context *pipe,
unsigned start_slot,
unsigned num_scissors,
const struct pipe_scissor_state *scissor )
static void
i915_set_scissor_states(struct pipe_context *pipe, unsigned start_slot,
unsigned num_scissors,
const struct pipe_scissor_state *scissor)
{
struct i915_context *i915 = i915_context(pipe);
memcpy( &i915->scissor, scissor, sizeof(*scissor) );
memcpy(&i915->scissor, scissor, sizeof(*scissor));
i915->dirty |= I915_NEW_SCISSOR;
}
static void i915_set_polygon_stipple( struct pipe_context *pipe,
const struct pipe_poly_stipple *stipple )
static void
i915_set_polygon_stipple(struct pipe_context *pipe,
const struct pipe_poly_stipple *stipple)
{
}
static void *
i915_create_fs_state(struct pipe_context *pipe,
const struct pipe_shader_state *templ)
@ -559,17 +542,18 @@ i915_bind_fs_state(struct pipe_context *pipe, void *shader)
if (i915->fs == shader)
return;
i915->fs = (struct i915_fragment_shader*) shader;
i915->fs = (struct i915_fragment_shader *)shader;
draw_bind_fragment_shader(i915->draw, (i915->fs ? i915->fs->draw_data : NULL));
draw_bind_fragment_shader(i915->draw,
(i915->fs ? i915->fs->draw_data : NULL));
i915->dirty |= I915_NEW_FS;
}
static
void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
static void
i915_delete_fs_state(struct pipe_context *pipe, void *shader)
{
struct i915_fragment_shader *ifs = (struct i915_fragment_shader *) shader;
struct i915_fragment_shader *ifs = (struct i915_fragment_shader *)shader;
FREE(ifs->decl);
ifs->decl = NULL;
@ -585,7 +569,6 @@ void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
FREE(ifs);
}
static void *
i915_create_vs_state(struct pipe_context *pipe,
const struct pipe_shader_state *templ)
@ -607,7 +590,8 @@ i915_create_vs_state(struct pipe_context *pipe,
return draw_create_vertex_shader(i915->draw, templ);
}
static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
static void
i915_bind_vs_state(struct pipe_context *pipe, void *shader)
{
struct i915_context *i915 = i915_context(pipe);
@ -617,23 +601,25 @@ static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
i915->vs = shader;
/* just pass-through to draw module */
draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *)shader);
i915->dirty |= I915_NEW_VS;
}
static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
static void
i915_delete_vs_state(struct pipe_context *pipe, void *shader)
{
struct i915_context *i915 = i915_context(pipe);
/* just pass-through to draw module */
draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *)shader);
}
static void i915_set_constant_buffer(struct pipe_context *pipe,
enum pipe_shader_type shader, uint index,
bool take_ownership,
const struct pipe_constant_buffer *cb)
static void
i915_set_constant_buffer(struct pipe_context *pipe,
enum pipe_shader_type shader, uint index,
bool take_ownership,
const struct pipe_constant_buffer *cb)
{
struct i915_context *i915 = i915_context(pipe);
struct pipe_resource *buf = cb ? cb->buffer : NULL;
@ -645,9 +631,8 @@ static void i915_set_constant_buffer(struct pipe_context *pipe,
return;
if (cb && cb->user_buffer) {
buf = i915_user_buffer_create(pipe->screen, (void *) cb->user_buffer,
cb->buffer_size,
PIPE_BIND_CONSTANT_BUFFER);
buf = i915_user_buffer_create(pipe->screen, (void *)cb->user_buffer,
cb->buffer_size, PIPE_BIND_CONSTANT_BUFFER);
}
/* if we have a new buffer compare it with the old one */
@ -684,17 +669,18 @@ static void i915_set_constant_buffer(struct pipe_context *pipe,
i915->current.num_user_constants[shader] = new_num;
if (diff)
i915->dirty |= shader == PIPE_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS : I915_NEW_FS_CONSTANTS;
i915->dirty |= shader == PIPE_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS
: I915_NEW_FS_CONSTANTS;
if (cb && cb->user_buffer) {
pipe_resource_reference(&buf, NULL);
}
}
static void
i915_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
unsigned start, unsigned num, unsigned unbind_num_trailing_slots,
unsigned start, unsigned num,
unsigned unbind_num_trailing_slots,
struct pipe_sampler_view **views)
{
if (shader != PIPE_SHADER_FRAGMENT) {
@ -712,7 +698,8 @@ i915_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
/* Check for no-op */
if (views && num == i915->num_fragment_sampler_views &&
!memcmp(i915->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *)))
!memcmp(i915->fragment_sampler_views, views,
num * sizeof(struct pipe_sampler_view *)))
return;
for (i = 0; i < num; i++) {
@ -727,13 +714,11 @@ i915_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
i915->dirty |= I915_NEW_SAMPLER_VIEW;
}
struct pipe_sampler_view *
i915_create_sampler_view_custom(struct pipe_context *pipe,
struct pipe_resource *texture,
const struct pipe_sampler_view *templ,
unsigned width0,
unsigned height0)
unsigned width0, unsigned height0)
{
struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
@ -766,7 +751,6 @@ i915_create_sampler_view(struct pipe_context *pipe,
return view;
}
static void
i915_sampler_view_destroy(struct pipe_context *pipe,
struct pipe_sampler_view *view)
@ -775,9 +759,9 @@ i915_sampler_view_destroy(struct pipe_context *pipe,
FREE(view);
}
static void i915_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *fb)
static void
i915_set_framebuffer_state(struct pipe_context *pipe,
const struct pipe_framebuffer_state *fb)
{
struct i915_context *i915 = i915_context(pipe);
@ -790,21 +774,21 @@ static void i915_set_framebuffer_state(struct pipe_context *pipe,
struct i915_surface *surf = i915_surface(i915->framebuffer.cbufs[0]);
if (i915->current.fixup_swizzle != surf->oc_swizzle) {
i915->current.fixup_swizzle = surf->oc_swizzle;
memcpy(i915->current.color_swizzle, surf->color_swizzle, sizeof(surf->color_swizzle));
memcpy(i915->current.color_swizzle, surf->color_swizzle,
sizeof(surf->color_swizzle));
i915->dirty |= I915_NEW_COLOR_SWIZZLE;
}
} else {
pipe_surface_reference(&i915->framebuffer.cbufs[0], NULL);
pipe_surface_reference(&i915->framebuffer.cbufs[0], NULL);
}
pipe_surface_reference(&i915->framebuffer.zsbuf, fb->zsbuf);
i915->dirty |= I915_NEW_FRAMEBUFFER;
}
static void i915_set_clip_state( struct pipe_context *pipe,
const struct pipe_clip_state *clip )
static void
i915_set_clip_state(struct pipe_context *pipe,
const struct pipe_clip_state *clip)
{
struct i915_context *i915 = i915_context(pipe);
@ -815,15 +799,13 @@ static void i915_set_clip_state( struct pipe_context *pipe,
i915->dirty |= I915_NEW_CLIP;
}
/* Called when gallium frontends notice changes to the viewport
* matrix:
*/
static void i915_set_viewport_states( struct pipe_context *pipe,
unsigned start_slot,
unsigned num_viewports,
const struct pipe_viewport_state *viewport )
static void
i915_set_viewport_states(struct pipe_context *pipe, unsigned start_slot,
unsigned num_viewports,
const struct pipe_viewport_state *viewport)
{
struct i915_context *i915 = i915_context(pipe);
@ -836,12 +818,11 @@ static void i915_set_viewport_states( struct pipe_context *pipe,
i915->dirty |= I915_NEW_VIEWPORT;
}
static void *
i915_create_rasterizer_state(struct pipe_context *pipe,
const struct pipe_rasterizer_state *rasterizer)
{
struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
struct i915_rasterizer_state *cso = CALLOC_STRUCT(i915_rasterizer_state);
cso->templ = *rasterizer;
cso->light_twoside = rasterizer->light_twoside;
@ -863,13 +844,13 @@ i915_create_rasterizer_state(struct pipe_context *pipe,
case PIPE_FACE_FRONT:
if (rasterizer->front_ccw)
cso->LIS4 |= S4_CULLMODE_CCW;
else
else
cso->LIS4 |= S4_CULLMODE_CW;
break;
case PIPE_FACE_BACK:
if (rasterizer->front_ccw)
cso->LIS4 |= S4_CULLMODE_CW;
else
else
cso->LIS4 |= S4_CULLMODE_CCW;
break;
case PIPE_FACE_FRONT_AND_BACK:
@ -883,31 +864,30 @@ i915_create_rasterizer_state(struct pipe_context *pipe,
cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
if (rasterizer->line_smooth)
cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
}
{
int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
int point_size = CLAMP((int)rasterizer->point_size, 1, 0xff);
cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
}
if (rasterizer->flatshade) {
cso->LIS4 |= (S4_FLATSHADE_ALPHA |
S4_FLATSHADE_COLOR |
S4_FLATSHADE_SPECULAR);
cso->LIS4 |=
(S4_FLATSHADE_ALPHA | S4_FLATSHADE_COLOR | S4_FLATSHADE_SPECULAR);
}
if (!rasterizer->flatshade_first)
cso->LIS6 |= (2 << S6_TRISTRIP_PV_SHIFT);
cso->LIS7 = fui( rasterizer->offset_units );
cso->LIS7 = fui(rasterizer->offset_units);
return cso;
}
static void i915_bind_rasterizer_state( struct pipe_context *pipe,
void *raster )
static void
i915_bind_rasterizer_state(struct pipe_context *pipe, void *raster)
{
struct i915_context *i915 = i915_context(pipe);
@ -917,47 +897,45 @@ static void i915_bind_rasterizer_state( struct pipe_context *pipe,
i915->rasterizer = (struct i915_rasterizer_state *)raster;
/* pass-through to draw module */
draw_set_rasterizer_state(i915->draw,
(i915->rasterizer ? &(i915->rasterizer->templ) : NULL),
raster);
draw_set_rasterizer_state(
i915->draw, (i915->rasterizer ? &(i915->rasterizer->templ) : NULL),
raster);
i915->dirty |= I915_NEW_RASTERIZER;
}
static void i915_delete_rasterizer_state(struct pipe_context *pipe,
void *raster)
static void
i915_delete_rasterizer_state(struct pipe_context *pipe, void *raster)
{
FREE(raster);
}
static void i915_set_vertex_buffers(struct pipe_context *pipe,
unsigned start_slot, unsigned count,
unsigned unbind_num_trailing_slots,
bool take_ownership,
const struct pipe_vertex_buffer *buffers)
static void
i915_set_vertex_buffers(struct pipe_context *pipe, unsigned start_slot,
unsigned count, unsigned unbind_num_trailing_slots,
bool take_ownership,
const struct pipe_vertex_buffer *buffers)
{
struct i915_context *i915 = i915_context(pipe);
struct draw_context *draw = i915->draw;
util_set_vertex_buffers_count(i915->vertex_buffers,
&i915->nr_vertex_buffers,
util_set_vertex_buffers_count(i915->vertex_buffers, &i915->nr_vertex_buffers,
buffers, start_slot, count,
unbind_num_trailing_slots,
take_ownership);
unbind_num_trailing_slots, take_ownership);
/* pass-through to draw module */
draw_set_vertex_buffers(draw, start_slot, count,
unbind_num_trailing_slots, buffers);
draw_set_vertex_buffers(draw, start_slot, count, unbind_num_trailing_slots,
buffers);
}
static void *
i915_create_vertex_elements_state(struct pipe_context *pipe,
unsigned count,
i915_create_vertex_elements_state(struct pipe_context *pipe, unsigned count,
const struct pipe_vertex_element *attribs)
{
struct i915_velems_state *velems;
assert(count <= PIPE_MAX_ATTRIBS);
velems = (struct i915_velems_state *) MALLOC(sizeof(struct i915_velems_state));
velems =
(struct i915_velems_state *)MALLOC(sizeof(struct i915_velems_state));
if (velems) {
velems->count = count;
memcpy(velems->velem, attribs, sizeof(*attribs) * count);
@ -966,11 +944,10 @@ i915_create_vertex_elements_state(struct pipe_context *pipe,
}
static void
i915_bind_vertex_elements_state(struct pipe_context *pipe,
void *velems)
i915_bind_vertex_elements_state(struct pipe_context *pipe, void *velems)
{
struct i915_context *i915 = i915_context(pipe);
struct i915_velems_state *i915_velems = (struct i915_velems_state *) velems;
struct i915_velems_state *i915_velems = (struct i915_velems_state *)velems;
if (i915->velems == velems)
return;
@ -979,25 +956,24 @@ i915_bind_vertex_elements_state(struct pipe_context *pipe,
/* pass-through to draw module */
if (i915_velems) {
draw_set_vertex_elements(i915->draw,
i915_velems->count, i915_velems->velem);
draw_set_vertex_elements(i915->draw, i915_velems->count,
i915_velems->velem);
}
}
static void
i915_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
{
FREE( velems );
FREE(velems);
}
static void
i915_set_sample_mask(struct pipe_context *pipe,
unsigned sample_mask)
i915_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
{
}
void
i915_init_state_functions( struct i915_context *i915 )
i915_init_state_functions(struct i915_context *i915)
{
i915->base.create_blend_state = i915_create_blend_state;
i915->base.bind_blend_state = i915_bind_blend_state;
@ -1007,9 +983,11 @@ i915_init_state_functions( struct i915_context *i915 )
i915->base.bind_sampler_states = i915_bind_sampler_states;
i915->base.delete_sampler_state = i915_delete_sampler_state;
i915->base.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
i915->base.create_depth_stencil_alpha_state =
i915_create_depth_stencil_state;
i915->base.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
i915->base.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
i915->base.delete_depth_stencil_alpha_state =
i915_delete_depth_stencil_state;
i915->base.create_rasterizer_state = i915_create_rasterizer_state;
i915->base.bind_rasterizer_state = i915_bind_rasterizer_state;

18
src/gallium/drivers/i915/i915_state.h
View File

@ -1,5 +1,5 @@
/**************************************************************************
*
*
* Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
/* Authors: Keith Whitwell <keithw@vmware.com>
@ -33,7 +33,6 @@
struct i915_context;
struct i915_tracked_state {
const char *name;
void (*update)(struct i915_context *);
@ -53,11 +52,8 @@ extern struct i915_tracked_state i915_hw_constants;
void i915_update_derived(struct i915_context *i915);
void i915_emit_hardware_state(struct i915_context *i915);
struct pipe_sampler_view *
i915_create_sampler_view_custom(struct pipe_context *pipe,
struct pipe_resource *texture,
const struct pipe_sampler_view *templ,
unsigned width0,
unsigned height0);
struct pipe_sampler_view *i915_create_sampler_view_custom(
struct pipe_context *pipe, struct pipe_resource *texture,
const struct pipe_sampler_view *templ, unsigned width0, unsigned height0);
#endif

99
src/gallium/drivers/i915/i915_state_derived.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,25 +22,24 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "util/u_memory.h"
#include "pipe/p_shader_tokens.h"
#include "draw/draw_context.h"
#include "draw/draw_vertex.h"
#include "pipe/p_shader_tokens.h"
#include "util/u_memory.h"
#include "i915_context.h"
#include "i915_state.h"
#include "i915_debug.h"
#include "i915_fpc.h"
#include "i915_reg.h"
#include "i915_state.h"
static uint find_mapping(const struct i915_fragment_shader* fs, int unit)
static uint
find_mapping(const struct i915_fragment_shader *fs, int unit)
{
int i;
for (i = 0; i < I915_TEX_UNITS ; i++)
{
for (i = 0; i < I915_TEX_UNITS; i++) {
if (fs->generic_mapping[i] == unit)
return i;
}
@ -48,13 +47,12 @@ static uint find_mapping(const struct i915_fragment_shader* fs, int unit)
return 0;
}
/***********************************************************************
* Determine the hardware vertex layout.
* Depends on vertex/fragment shader state.
*/
static void calculate_vertex_layout(struct i915_context *i915)
static void
calculate_vertex_layout(struct i915_context *i915)
{
const struct i915_fragment_shader *fs = i915->fs;
struct vertex_info vinfo;
@ -71,25 +69,21 @@ static void calculate_vertex_layout(struct i915_context *i915)
*/
for (i = 0; i < fs->info.num_inputs; i++) {
switch (fs->info.input_semantic_name[i]) {
case TGSI_SEMANTIC_POSITION:
{
uint unit = I915_SEMANTIC_POS;
texCoords[find_mapping(fs, unit)] = TRUE;
}
break;
case TGSI_SEMANTIC_POSITION: {
uint unit = I915_SEMANTIC_POS;
texCoords[find_mapping(fs, unit)] = TRUE;
} break;
case TGSI_SEMANTIC_COLOR:
assert(fs->info.input_semantic_index[i] < 2);
colors[fs->info.input_semantic_index[i]] = TRUE;
break;
case TGSI_SEMANTIC_GENERIC:
{
/* texcoords/varyings/other generic */
uint unit = fs->info.input_semantic_index[i];
case TGSI_SEMANTIC_GENERIC: {
/* texcoords/varyings/other generic */
uint unit = fs->info.input_semantic_index[i];
texCoords[find_mapping(fs, unit)] = TRUE;
needW = TRUE;
}
break;
texCoords[find_mapping(fs, unit)] = TRUE;
needW = TRUE;
} break;
case TGSI_SEMANTIC_FOG:
fog = TRUE;
break;
@ -97,20 +91,19 @@ static void calculate_vertex_layout(struct i915_context *i915)
face = TRUE;
break;
default:
debug_printf("Unknown input type %d\n", fs->info.input_semantic_name[i]);
debug_printf("Unknown input type %d\n",
fs->info.input_semantic_name[i]);
assert(0);
}
}
/* pos */
src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_POSITION, 0);
if (needW) {
draw_emit_vertex_attr(&vinfo, EMIT_4F, src);
vinfo.hwfmt[0] |= S4_VFMT_XYZW;
vinfo.attrib[0].emit = EMIT_4F;
}
else {
} else {
draw_emit_vertex_attr(&vinfo, EMIT_3F, src);
vinfo.hwfmt[0] |= S4_VFMT_XYZ;
vinfo.attrib[0].emit = EMIT_3F;
@ -146,14 +139,14 @@ static void calculate_vertex_layout(struct i915_context *i915)
if (texCoords[i]) {
hwtc = TEXCOORDFMT_4D;
if (fs->generic_mapping[i] == I915_SEMANTIC_POS) {
src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_POSITION, 0);
}
else {
src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_GENERIC, fs->generic_mapping[i]);
src =
draw_find_shader_output(i915->draw, TGSI_SEMANTIC_POSITION, 0);
} else {
src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_GENERIC,
fs->generic_mapping[i]);
}
draw_emit_vertex_attr(&vinfo, EMIT_4F, src);
}
else {
} else {
hwtc = TEXCOORDFMT_NOT_PRESENT;
}
vinfo.hwfmt[1] |= hwtc << (i * 4);
@ -187,29 +180,21 @@ static void calculate_vertex_layout(struct i915_context *i915)
}
struct i915_tracked_state i915_update_vertex_layout = {
"vertex_layout",
calculate_vertex_layout,
I915_NEW_RASTERIZER | I915_NEW_FS | I915_NEW_VS
};
"vertex_layout", calculate_vertex_layout,
I915_NEW_RASTERIZER | I915_NEW_FS | I915_NEW_VS};
/***********************************************************************
*/
static struct i915_tracked_state *atoms[] = {
&i915_update_vertex_layout,
&i915_hw_samplers,
&i915_hw_sampler_views,
&i915_hw_immediate,
&i915_hw_dynamic,
&i915_hw_fs,
&i915_hw_framebuffer,
&i915_hw_dst_buf_vars,
&i915_hw_constants,
NULL,
&i915_update_vertex_layout, &i915_hw_samplers,
&i915_hw_sampler_views, &i915_hw_immediate,
&i915_hw_dynamic, &i915_hw_fs,
&i915_hw_framebuffer, &i915_hw_dst_buf_vars,
&i915_hw_constants, NULL,
};
void i915_update_derived(struct i915_context *i915)
void
i915_update_derived(struct i915_context *i915)
{
int i;
@ -232,7 +217,7 @@ void i915_update_derived(struct i915_context *i915)
if (!i915->depth_stencil)
i915->dirty &= ~I915_NEW_DEPTH_STENCIL;
for (i = 0; atoms[i]; i++)
if (atoms[i]->dirty & i915->dirty)
atoms[i]->update(i915);

130
src/gallium/drivers/i915/i915_state_dynamic.c
View File

@ -26,15 +26,14 @@
**************************************************************************/
#include "i915_batch.h"
#include "i915_state_inlines.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_state.h"
#include "i915_state_inlines.h"
#include "util/u_memory.h"
#include "util/u_pack_color.h"
/* State that we have chosen to store in the DYNAMIC segment of the
* i915 indirect state mechanism.
*
@ -46,9 +45,8 @@
* (active) state every time a 4kb boundary is crossed.
*/
static inline void set_dynamic(struct i915_context *i915,
unsigned offset,
const unsigned state)
static inline void
set_dynamic(struct i915_context *i915, unsigned offset, const unsigned state)
{
if (i915->current.dynamic[offset] == state)
return;
@ -58,12 +56,9 @@ static inline void set_dynamic(struct i915_context *i915,
i915->hardware_dirty |= I915_HW_DYNAMIC;
}
static inline void set_dynamic_array(struct i915_context *i915,
unsigned offset,
const unsigned *src,
unsigned dwords)
static inline void
set_dynamic_array(struct i915_context *i915, unsigned offset,
const unsigned *src, unsigned dwords)
{
unsigned i;
@ -78,12 +73,11 @@ static inline void set_dynamic_array(struct i915_context *i915,
i915->hardware_dirty |= I915_HW_DYNAMIC;
}
/***********************************************************************
* Modes4: stencil masks and logicop
*/
static void upload_MODES4(struct i915_context *i915)
static void
upload_MODES4(struct i915_context *i915)
{
unsigned modes4 = 0;
@ -92,28 +86,25 @@ static void upload_MODES4(struct i915_context *i915)
modes4 |= i915->depth_stencil->stencil_modes4;
/* I915_NEW_BLEND
*/
*/
modes4 |= i915->blend->modes4;
set_dynamic(i915, I915_DYNAMIC_MODES4, modes4);
}
const struct i915_tracked_state i915_upload_MODES4 = {
"MODES4",
upload_MODES4,
I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL
};
"MODES4", upload_MODES4, I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL};
/***********************************************************************
*/
static void upload_BFO(struct i915_context *i915)
static void
upload_BFO(struct i915_context *i915)
{
unsigned bfo[2];
bfo[0] = i915->depth_stencil->bfo[0];
bfo[1] = i915->depth_stencil->bfo[1];
/* I don't get it only allowed to set a ref mask when the enable bit is set? */
/* I don't get it only allowed to set a ref mask when the enable bit is set?
*/
if (bfo[0] & BFO_ENABLE_STENCIL_REF) {
bfo[0] |= i915->stencil_ref.ref_value[1] << BFO_STENCIL_REF_SHIFT;
}
@ -121,17 +112,13 @@ static void upload_BFO(struct i915_context *i915)
set_dynamic_array(i915, I915_DYNAMIC_BFO_0, bfo, 2);
}
const struct i915_tracked_state i915_upload_BFO = {
"BFO",
upload_BFO,
I915_NEW_DEPTH_STENCIL
};
const struct i915_tracked_state i915_upload_BFO = {"BFO", upload_BFO,
I915_NEW_DEPTH_STENCIL};
/***********************************************************************
*/
static void upload_BLENDCOLOR(struct i915_context *i915)
static void
upload_BLENDCOLOR(struct i915_context *i915)
{
unsigned bc[2];
@ -153,16 +140,12 @@ static void upload_BLENDCOLOR(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_BLENDCOLOR = {
"BLENDCOLOR",
upload_BLENDCOLOR,
I915_NEW_BLEND | I915_NEW_COLOR_SWIZZLE
};
"BLENDCOLOR", upload_BLENDCOLOR, I915_NEW_BLEND | I915_NEW_COLOR_SWIZZLE};
/***********************************************************************
*/
static void upload_IAB(struct i915_context *i915)
static void
upload_IAB(struct i915_context *i915)
{
unsigned iab = 0;
@ -180,28 +163,19 @@ static void upload_IAB(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_IAB = {
"IAB",
upload_IAB,
I915_NEW_BLEND | I915_NEW_FRAMEBUFFER
};
"IAB", upload_IAB, I915_NEW_BLEND | I915_NEW_FRAMEBUFFER};
/***********************************************************************
*/
static void upload_DEPTHSCALE(struct i915_context *i915)
static void
upload_DEPTHSCALE(struct i915_context *i915)
{
set_dynamic_array(i915, I915_DYNAMIC_DEPTHSCALE_0,
&i915->rasterizer->ds[0].u, 2);
}
const struct i915_tracked_state i915_upload_DEPTHSCALE = {
"DEPTHSCALE",
upload_DEPTHSCALE,
I915_NEW_RASTERIZER
};
"DEPTHSCALE", upload_DEPTHSCALE, I915_NEW_RASTERIZER};
/***********************************************************************
* Polygon stipple
@ -214,7 +188,8 @@ const struct i915_tracked_state i915_upload_DEPTHSCALE = {
*
* XXX: possibly need workaround for conform paths test.
*/
static void upload_STIPPLE(struct i915_context *i915)
static void
upload_STIPPLE(struct i915_context *i915)
{
unsigned st[2];
@ -239,43 +214,32 @@ static void upload_STIPPLE(struct i915_context *i915)
/* Not sure what to do about fallbacks, so for now just dont:
*/
st[1] |= ((p[0] << 0) |
(p[1] << 4) |
(p[2] << 8) |
(p[3] << 12));
st[1] |= ((p[0] << 0) | (p[1] << 4) | (p[2] << 8) | (p[3] << 12));
}
set_dynamic_array(i915, I915_DYNAMIC_STP_0, st, 2);
}
const struct i915_tracked_state i915_upload_STIPPLE = {
"STIPPLE",
upload_STIPPLE,
I915_NEW_RASTERIZER | I915_NEW_STIPPLE
};
"STIPPLE", upload_STIPPLE, I915_NEW_RASTERIZER | I915_NEW_STIPPLE};
/***********************************************************************
* Scissor enable
*/
static void upload_SCISSOR_ENABLE( struct i915_context *i915 )
static void
upload_SCISSOR_ENABLE(struct i915_context *i915)
{
set_dynamic(i915, I915_DYNAMIC_SC_ENA_0, i915->rasterizer->sc[0]);
}
const struct i915_tracked_state i915_upload_SCISSOR_ENABLE = {
"SCISSOR ENABLE",
upload_SCISSOR_ENABLE,
I915_NEW_RASTERIZER
};
"SCISSOR ENABLE", upload_SCISSOR_ENABLE, I915_NEW_RASTERIZER};
/***********************************************************************
* Scissor rect
*/
static void upload_SCISSOR_RECT(struct i915_context *i915)
static void
upload_SCISSOR_RECT(struct i915_context *i915)
{
unsigned x1 = i915->scissor.minx;
unsigned y1 = i915->scissor.miny;
@ -291,30 +255,21 @@ static void upload_SCISSOR_RECT(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_SCISSOR_RECT = {
"SCISSOR RECT",
upload_SCISSOR_RECT,
I915_NEW_SCISSOR
};
"SCISSOR RECT", upload_SCISSOR_RECT, I915_NEW_SCISSOR};
/***********************************************************************
*/
static const struct i915_tracked_state *atoms[] = {
&i915_upload_MODES4,
&i915_upload_BFO,
&i915_upload_BLENDCOLOR,
&i915_upload_IAB,
&i915_upload_DEPTHSCALE,
&i915_upload_STIPPLE,
&i915_upload_SCISSOR_ENABLE,
&i915_upload_SCISSOR_RECT
};
&i915_upload_MODES4, &i915_upload_BFO,
&i915_upload_BLENDCOLOR, &i915_upload_IAB,
&i915_upload_DEPTHSCALE, &i915_upload_STIPPLE,
&i915_upload_SCISSOR_ENABLE, &i915_upload_SCISSOR_RECT};
/* These will be dynamic indirect state commands, but for now just end
* up on the batch buffer with everything else.
*/
static void update_dynamic(struct i915_context *i915)
static void
update_dynamic(struct i915_context *i915)
{
int i;
@ -324,7 +279,6 @@ static void update_dynamic(struct i915_context *i915)
}
struct i915_tracked_state i915_hw_dynamic = {
"dynamic",
update_dynamic,
"dynamic", update_dynamic,
~0 /* all state atoms, because we do internal checking */
};

165
src/gallium/drivers/i915/i915_state_emit.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,15 +22,14 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_reg.h"
#include "i915_context.h"
#include "i915_batch.h"
#include "i915_context.h"
#include "i915_debug.h"
#include "i915_fpc.h"
#include "i915_reg.h"
#include "i915_resource.h"
#include "pipe/p_context.h"
@ -48,7 +47,6 @@ struct i915_tracked_hw_state {
unsigned dirty, batch_space;
};
static void
validate_flush(struct i915_context *i915, unsigned *batch_space)
{
@ -72,7 +70,7 @@ emit_flush(struct i915_context *i915)
uint32_t invariant_state[] = {
_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 |
AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0,
AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0,
_3DSTATE_DFLT_DIFFUSE_CMD, 0,
@ -80,25 +78,14 @@ uint32_t invariant_state[] = {
_3DSTATE_DFLT_Z_CMD, 0,
_3DSTATE_COORD_SET_BINDINGS |
CSB_TCB(0, 0) |
CSB_TCB(1, 1) |
CSB_TCB(2, 2) |
CSB_TCB(3, 3) |
CSB_TCB(4, 4) |
CSB_TCB(5, 5) |
CSB_TCB(6, 6) |
CSB_TCB(7, 7),
_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) |
CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) |
CSB_TCB(7, 7),
_3DSTATE_RASTER_RULES_CMD |
ENABLE_POINT_RASTER_RULE |
OGL_POINT_RASTER_RULE |
ENABLE_LINE_STRIP_PROVOKE_VRTX |
ENABLE_TRI_FAN_PROVOKE_VRTX |
LINE_STRIP_PROVOKE_VRTX(1) |
TRI_FAN_PROVOKE_VRTX(2) |
ENABLE_TEXKILL_3D_4D |
TEXKILL_4D,
_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE |
OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX |
ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) |
TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D,
_3DSTATE_DEPTH_SUBRECT_DISABLE,
@ -109,8 +96,9 @@ uint32_t invariant_state[] = {
static void
emit_invariant(struct i915_context *i915)
{
i915_winsys_batchbuffer_write(i915->batch, invariant_state,
ARRAY_SIZE(invariant_state)*sizeof(uint32_t));
i915_winsys_batchbuffer_write(
i915->batch, invariant_state,
ARRAY_SIZE(invariant_state) * sizeof(uint32_t));
}
static void
@ -128,8 +116,8 @@ validate_immediate(struct i915_context *i915, unsigned *batch_space)
*batch_space = 1 + util_bitcount(dirty);
}
static void emit_immediate_s5(struct i915_context *i915, uint imm)
static void
emit_immediate_s5(struct i915_context *i915, uint imm)
{
struct i915_surface *surf = i915_surface(i915->framebuffer.cbufs[0]);
@ -166,8 +154,7 @@ emit_immediate(struct i915_context *i915)
int i, num = util_bitcount(dirty);
assert(num && num <= I915_MAX_IMMEDIATE);
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
dirty << 4 | (num - 1));
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | dirty << 4 | (num - 1));
if (i915->immediate_dirty & (1 << I915_IMMEDIATE_S0)) {
if (i915->vbo)
@ -190,7 +177,8 @@ emit_immediate(struct i915_context *i915)
static void
validate_dynamic(struct i915_context *i915, unsigned *batch_space)
{
*batch_space = util_bitcount(i915->dynamic_dirty & ((1 << I915_MAX_DYNAMIC) - 1));
*batch_space =
util_bitcount(i915->dynamic_dirty & ((1 << I915_MAX_DYNAMIC) - 1));
}
static void
@ -209,14 +197,14 @@ validate_static(struct i915_context *i915, unsigned *batch_space)
*batch_space = 0;
if (i915->current.cbuf_bo && (i915->static_dirty & I915_DST_BUF_COLOR)) {
i915->validation_buffers[i915->num_validation_buffers++]
= i915->current.cbuf_bo;
i915->validation_buffers[i915->num_validation_buffers++] =
i915->current.cbuf_bo;
*batch_space += 3;
}
if (i915->current.depth_bo && (i915->static_dirty & I915_DST_BUF_DEPTH)) {
i915->validation_buffers[i915->num_validation_buffers++]
= i915->current.depth_bo;
i915->validation_buffers[i915->num_validation_buffers++] =
i915->current.depth_bo;
*batch_space += 3;
}
@ -233,9 +221,7 @@ emit_static(struct i915_context *i915)
if (i915->current.cbuf_bo && (i915->static_dirty & I915_DST_BUF_COLOR)) {
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(i915->current.cbuf_flags);
OUT_RELOC(i915->current.cbuf_bo,
I915_USAGE_RENDER,
0);
OUT_RELOC(i915->current.cbuf_bo, I915_USAGE_RENDER, 0);
}
/* What happens if no zbuf??
@ -243,9 +229,7 @@ emit_static(struct i915_context *i915)
if (i915->current.depth_bo && (i915->static_dirty & I915_DST_BUF_DEPTH)) {
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(i915->current.depth_flags);
OUT_RELOC(i915->current.depth_bo,
I915_USAGE_RENDER,
0);
OUT_RELOC(i915->current.depth_bo, I915_USAGE_RENDER, 0);
}
if (i915->static_dirty & I915_DST_VARS) {
@ -261,8 +245,9 @@ validate_map(struct i915_context *i915, unsigned *batch_space)
uint unit;
struct i915_texture *tex;
*batch_space = i915->current.sampler_enable_nr ?
2 + 3*i915->current.sampler_enable_nr : 0;
*batch_space = i915->current.sampler_enable_nr
? 2 + 3 * i915->current.sampler_enable_nr
: 0;
for (unit = 0; unit < I915_TEX_UNITS; unit++) {
if (enabled & (1 << unit)) {
@ -284,7 +269,8 @@ emit_map(struct i915_context *i915)
OUT_BATCH(enabled);
for (unit = 0; unit < I915_TEX_UNITS; unit++) {
if (enabled & (1 << unit)) {
struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
struct i915_texture *texture =
i915_texture(i915->fragment_sampler_views[unit]->texture);
struct i915_winsys_buffer *buf = texture->buffer;
unsigned offset = i915->current.texbuffer[unit][2];
@ -304,8 +290,9 @@ emit_map(struct i915_context *i915)
static void
validate_sampler(struct i915_context *i915, unsigned *batch_space)
{
*batch_space = i915->current.sampler_enable_nr ?
2 + 3*i915->current.sampler_enable_nr : 0;
*batch_space = i915->current.sampler_enable_nr
? 2 + 3 * i915->current.sampler_enable_nr
: 0;
}
static void
@ -314,16 +301,15 @@ emit_sampler(struct i915_context *i915)
if (i915->current.sampler_enable_nr) {
int i;
OUT_BATCH( _3DSTATE_SAMPLER_STATE |
(3 * i915->current.sampler_enable_nr) );
OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * i915->current.sampler_enable_nr));
OUT_BATCH( i915->current.sampler_enable_flags );
OUT_BATCH(i915->current.sampler_enable_flags);
for (i = 0; i < I915_TEX_UNITS; i++) {
if (i915->current.sampler_enable_flags & (1<<i)) {
OUT_BATCH( i915->current.sampler[i][0] );
OUT_BATCH( i915->current.sampler[i][1] );
OUT_BATCH( i915->current.sampler[i][2] );
if (i915->current.sampler_enable_flags & (1 << i)) {
OUT_BATCH(i915->current.sampler[i][0]);
OUT_BATCH(i915->current.sampler[i][1]);
OUT_BATCH(i915->current.sampler[i][2]);
}
}
}
@ -332,8 +318,7 @@ emit_sampler(struct i915_context *i915)
static void
validate_constants(struct i915_context *i915, unsigned *batch_space)
{
int nr = i915->fs->num_constants ?
2 + 4*i915->fs->num_constants : 0;
int nr = i915->fs->num_constants ? 2 + 4 * i915->fs->num_constants : 0;
*batch_space = nr;
}
@ -350,19 +335,19 @@ emit_constants(struct i915_context *i915)
if (nr) {
uint i;
OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4));
OUT_BATCH((1 << nr) - 1);
for (i = 0; i < nr; i++) {
const uint *c;
if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
/* grab user-defined constant */
c = (uint *) i915_buffer(i915->constants[PIPE_SHADER_FRAGMENT])->data;
c =
(uint *)i915_buffer(i915->constants[PIPE_SHADER_FRAGMENT])->data;
c += 4 * i;
}
else {
} else {
/* emit program constant */
c = (uint *) i915->fs->constants[i];
c = (uint *)i915->fs->constants[i];
}
#if 0 /* debug */
{
@ -412,24 +397,22 @@ emit_program(struct i915_context *i915)
OUT_BATCH(size);
}
for (i = 1 ; i < i915->fs->decl_len; i++)
for (i = 1; i < i915->fs->decl_len; i++)
OUT_BATCH(i915->fs->decl[i]);
/* output the program */
assert(i915->fs->program_len % 3 == 0);
for (i = 0 ; i < i915->fs->program_len; i+=3) {
for (i = 0; i < i915->fs->program_len; i += 3) {
OUT_BATCH(i915->fs->program[i]);
OUT_BATCH(i915->fs->program[i+1]);
OUT_BATCH(i915->fs->program[i+2]);
OUT_BATCH(i915->fs->program[i + 1]);
OUT_BATCH(i915->fs->program[i + 2]);
}
/* we emit an additional mov with swizzle to fake RGBA framebuffers */
if (i915->current.fixup_swizzle) {
/* mov out_color, out_color.zyxw */
OUT_BATCH(A0_MOV |
(REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
A0_DEST_CHANNEL_ALL |
(REG_TYPE_OC << A0_SRC0_TYPE_SHIFT) |
OUT_BATCH(A0_MOV | (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
A0_DEST_CHANNEL_ALL | (REG_TYPE_OC << A0_SRC0_TYPE_SHIFT) |
(T_DIFFUSE << A0_SRC0_NR_SHIFT));
OUT_BATCH(i915->current.fixup_swizzle);
OUT_BATCH(0);
@ -461,19 +444,22 @@ i915_validate_state(struct i915_context *i915, unsigned *batch_space)
#if 0
static int counter_total = 0;
#define VALIDATE_ATOM(atom, hw_dirty) \
if (i915->hardware_dirty & hw_dirty) { \
static int counter_##atom = 0;\
validate_##atom(i915, &tmp); \
*batch_space += tmp;\
counter_##atom += tmp;\
counter_total += tmp;\
printf("%s: \t%d/%d \t%2.2f\n",#atom, counter_##atom, counter_total, counter_##atom*100.f/counter_total);}
#define VALIDATE_ATOM(atom, hw_dirty) \
if (i915->hardware_dirty & hw_dirty) { \
static int counter_##atom = 0; \
validate_##atom(i915, &tmp); \
*batch_space += tmp; \
counter_##atom += tmp; \
counter_total += tmp; \
printf("%s: \t%d/%d \t%2.2f\n", #atom, counter_##atom, counter_total, \
counter_##atom * 100.f / counter_total); \
}
#else
#define VALIDATE_ATOM(atom, hw_dirty) \
if (i915->hardware_dirty & hw_dirty) { \
validate_##atom(i915, &tmp); \
*batch_space += tmp; }
#define VALIDATE_ATOM(atom, hw_dirty) \
if (i915->hardware_dirty & hw_dirty) { \
validate_##atom(i915, &tmp); \
*batch_space += tmp; \
}
#endif
VALIDATE_ATOM(flush, I915_HW_FLUSH);
VALIDATE_ATOM(immediate, I915_HW_IMMEDIATE);
@ -498,7 +484,7 @@ static int counter_total = 0;
/* Push the state into the sarea and/or texture memory.
*/
void
i915_emit_hardware_state(struct i915_context *i915 )
i915_emit_hardware_state(struct i915_context *i915)
{
unsigned batch_space;
uintptr_t save_ptr;
@ -513,7 +499,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
assert(i915_validate_state(i915, &batch_space));
}
if(!BEGIN_BATCH(batch_space)) {
if (!BEGIN_BATCH(batch_space)) {
FLUSH_BATCH(NULL, I915_FLUSH_ASYNC);
assert(i915_validate_state(i915, &batch_space));
assert(BEGIN_BATCH(batch_space));
@ -521,8 +507,8 @@ i915_emit_hardware_state(struct i915_context *i915 )
save_ptr = (uintptr_t)i915->batch->ptr;
#define EMIT_ATOM(atom, hw_dirty) \
if (i915->hardware_dirty & hw_dirty) \
#define EMIT_ATOM(atom, hw_dirty) \
if (i915->hardware_dirty & hw_dirty) \
emit_##atom(i915);
EMIT_ATOM(flush, I915_HW_FLUSH);
EMIT_ATOM(invariant, I915_HW_INVARIANT);
@ -537,8 +523,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
#undef EMIT_ATOM
I915_DBG(DBG_EMIT, "%s: used %d dwords, %d dwords reserved\n", __FUNCTION__,
((uintptr_t)i915->batch->ptr - save_ptr) / 4,
batch_space);
((uintptr_t)i915->batch->ptr - save_ptr) / 4, batch_space);
assert(((uintptr_t)i915->batch->ptr - save_ptr) / 4 == batch_space);
i915->hardware_dirty = 0;

25
src/gallium/drivers/i915/i915_state_fpc.c
View File

@ -23,37 +23,28 @@
*
**************************************************************************/
#include "i915_reg.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_state.h"
/***********************************************************************
*/
static void update_hw_constants(struct i915_context *i915)
static void
update_hw_constants(struct i915_context *i915)
{
i915->hardware_dirty |= I915_HW_CONSTANTS;
}
struct i915_tracked_state i915_hw_constants = {
"hw_constants",
update_hw_constants,
I915_NEW_FS_CONSTANTS | I915_NEW_FS
};
"hw_constants", update_hw_constants, I915_NEW_FS_CONSTANTS | I915_NEW_FS};
/***********************************************************************
*/
static void update_fs(struct i915_context *i915)
static void
update_fs(struct i915_context *i915)
{
i915->hardware_dirty |= I915_HW_PROGRAM;
}
struct i915_tracked_state i915_hw_fs = {
"fs",
update_fs,
I915_NEW_FS | I915_NEW_COLOR_SWIZZLE
};
struct i915_tracked_state i915_hw_fs = {"fs", update_fs,
I915_NEW_FS | I915_NEW_COLOR_SWIZZLE};

99
src/gallium/drivers/i915/i915_state_immediate.c
View File

@ -24,24 +24,22 @@
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
*/
/*
* Authors:
* Keith Whitwell <keithw@vmware.com>
*/
#include "i915_state_inlines.h"
#include "i915_context.h"
#include "i915_state.h"
#include "i915_reg.h"
#include "util/u_memory.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_state.h"
#include "i915_state_inlines.h"
/* Convinience function to check immediate state.
*/
static inline void set_immediate(struct i915_context *i915,
unsigned offset,
const unsigned state)
static inline void
set_immediate(struct i915_context *i915, unsigned offset, const unsigned state)
{
if (i915->current.immediate[offset] == state)
return;
@ -51,12 +49,11 @@ static inline void set_immediate(struct i915_context *i915,
i915->hardware_dirty |= I915_HW_IMMEDIATE;
}
/***********************************************************************
* S0,S1: Vertex buffer state.
*/
static void upload_S0S1(struct i915_context *i915)
static void
upload_S0S1(struct i915_context *i915)
{
unsigned LIS0, LIS1;
@ -75,8 +72,7 @@ static void upload_S0S1(struct i915_context *i915)
{
unsigned vertex_size = i915->current.vertex_info.size;
LIS1 = ((vertex_size << 24) |
(vertex_size << 16));
LIS1 = ((vertex_size << 24) | (vertex_size << 16));
}
set_immediate(i915, I915_IMMEDIATE_S0, LIS0);
@ -84,17 +80,13 @@ static void upload_S0S1(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_S0S1 = {
"imm S0 S1",
upload_S0S1,
I915_NEW_VBO | I915_NEW_VERTEX_FORMAT
};
"imm S0 S1", upload_S0S1, I915_NEW_VBO | I915_NEW_VERTEX_FORMAT};
/***********************************************************************
* S4: Vertex format, rasterization state
*/
static void upload_S2S4(struct i915_context *i915)
static void
upload_S2S4(struct i915_context *i915)
{
unsigned LIS2, LIS4;
@ -113,23 +105,20 @@ static void upload_S2S4(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_S2S4 = {
"imm S2 S4",
upload_S2S4,
I915_NEW_RASTERIZER | I915_NEW_VERTEX_FORMAT
};
"imm S2 S4", upload_S2S4, I915_NEW_RASTERIZER | I915_NEW_VERTEX_FORMAT};
/***********************************************************************
*/
static void upload_S5(struct i915_context *i915)
static void
upload_S5(struct i915_context *i915)
{
unsigned LIS5 = 0;
/* I915_NEW_DEPTH_STENCIL
*/
LIS5 |= i915->depth_stencil->stencil_LIS5;
/* hope it's safe to set stencil ref value even if stencil test is disabled? */
/* hope it's safe to set stencil ref value even if stencil test is disabled?
*/
LIS5 |= i915->stencil_ref.ref_value[0] << S5_STENCIL_REF_SHIFT;
/* I915_NEW_BLEND
@ -148,16 +137,13 @@ static void upload_S5(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_S5 = {
"imm S5",
upload_S5,
I915_NEW_DEPTH_STENCIL | I915_NEW_BLEND | I915_NEW_RASTERIZER
};
"imm S5", upload_S5,
I915_NEW_DEPTH_STENCIL | I915_NEW_BLEND | I915_NEW_RASTERIZER};
/***********************************************************************
*/
static void upload_S6(struct i915_context *i915)
static void
upload_S6(struct i915_context *i915)
{
unsigned LIS6 = 0;
@ -190,16 +176,14 @@ static void upload_S6(struct i915_context *i915)
}
const struct i915_tracked_state i915_upload_S6 = {
"imm S6",
upload_S6,
I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL | I915_NEW_FRAMEBUFFER | I915_NEW_RASTERIZER
};
"imm S6", upload_S6,
I915_NEW_BLEND | I915_NEW_DEPTH_STENCIL | I915_NEW_FRAMEBUFFER |
I915_NEW_RASTERIZER};
/***********************************************************************
*/
static void upload_S7(struct i915_context *i915)
static void
upload_S7(struct i915_context *i915)
{
#if 0
unsigned LIS7;
@ -212,25 +196,17 @@ static void upload_S7(struct i915_context *i915)
#endif
}
const struct i915_tracked_state i915_upload_S7 = {
"imm S7",
upload_S7,
I915_NEW_RASTERIZER
};
const struct i915_tracked_state i915_upload_S7 = {"imm S7", upload_S7,
I915_NEW_RASTERIZER};
/***********************************************************************
*/
static const struct i915_tracked_state *atoms[] = {
&i915_upload_S0S1,
&i915_upload_S2S4,
&i915_upload_S5,
&i915_upload_S6,
&i915_upload_S7
};
&i915_upload_S0S1, &i915_upload_S2S4, &i915_upload_S5, &i915_upload_S6,
&i915_upload_S7};
static void update_immediate(struct i915_context *i915)
static void
update_immediate(struct i915_context *i915)
{
int i;
@ -240,7 +216,6 @@ static void update_immediate(struct i915_context *i915)
}
struct i915_tracked_state i915_hw_immediate = {
"immediate",
update_immediate,
"immediate", update_immediate,
~0 /* all state atoms, because we do internal checking */
};

17
src/gallium/drivers/i915/i915_state_inlines.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_STATE_INLINES_H
@ -33,7 +33,6 @@
#include "util/u_debug.h"
#include "i915_reg.h"
static inline unsigned
i915_translate_compare_func(unsigned func)
{
@ -167,7 +166,6 @@ i915_translate_blend_func(unsigned mode)
}
}
static inline unsigned
i915_translate_logic_op(unsigned opcode)
{
@ -209,9 +207,8 @@ i915_translate_logic_op(unsigned opcode)
}
}
static inline boolean i915_validate_vertices( unsigned hw_prim, unsigned nr )
static inline boolean
i915_validate_vertices(unsigned hw_prim, unsigned nr)
{
boolean ok;

222
src/gallium/drivers/i915/i915_state_sampler.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,18 +22,17 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "pipe/p_context.h"
#include "pipe/p_state.h"
#include "i915_state_inlines.h"
#include "i915_context.h"
#include "i915_reg.h"
#include "i915_state.h"
#include "i915_resource.h"
#include "i915_state.h"
#include "i915_state_inlines.h"
/*
* A note about min_lod & max_lod.
@ -58,14 +57,10 @@
* changes.
*/
static void update_map(struct i915_context *i915,
uint unit,
static void update_map(struct i915_context *i915, uint unit,
const struct i915_texture *tex,
const struct i915_sampler_state *sampler,
const struct pipe_sampler_view* view,
uint state[3]);
const struct pipe_sampler_view *view, uint state[3]);
/***********************************************************************
* Samplers
@ -79,11 +74,10 @@ static void update_map(struct i915_context *i915,
* something which is understandable and reliable.
* \param state returns the 3 words of compute state
*/
static void update_sampler(struct i915_context *i915,
uint unit,
const struct i915_sampler_state *sampler,
const struct i915_texture *tex,
unsigned state[3])
static void
update_sampler(struct i915_context *i915, uint unit,
const struct i915_sampler_state *sampler,
const struct i915_texture *tex, unsigned state[3])
{
const struct pipe_resource *pt = &tex->b;
unsigned minlod, lastlod;
@ -92,24 +86,23 @@ static void update_sampler(struct i915_context *i915,
state[1] = sampler->state[1];
state[2] = sampler->state[2];
if (pt->format == PIPE_FORMAT_UYVY ||
pt->format == PIPE_FORMAT_YUYV)
if (pt->format == PIPE_FORMAT_UYVY || pt->format == PIPE_FORMAT_YUYV)
state[0] |= SS2_COLORSPACE_CONVERSION;
if (pt->format == PIPE_FORMAT_B8G8R8A8_SRGB ||
pt->format == PIPE_FORMAT_L8_SRGB )
pt->format == PIPE_FORMAT_L8_SRGB)
state[0] |= SS2_REVERSE_GAMMA_ENABLE;
/* 3D textures don't seem to respect the border color.
* Fallback if there's ever a danger that they might refer to
* it.
*
* Effectively this means fallback on 3D clamp or
* clamp_to_border.
*
* XXX: Check if this is true on i945.
* XXX: Check if this bug got fixed in release silicon.
*/
/* 3D textures don't seem to respect the border color.
* Fallback if there's ever a danger that they might refer to
* it.
*
* Effectively this means fallback on 3D clamp or
* clamp_to_border.
*
* XXX: Check if this is true on i945.
* XXX: Check if this bug got fixed in release silicon.
*/
#if 0
{
const unsigned ws = sampler->templ->wrap_s;
@ -145,31 +138,31 @@ static void update_sampler(struct i915_context *i915,
state[1] |= (unit << SS3_TEXTUREMAP_INDEX_SHIFT);
}
static void update_samplers(struct i915_context *i915)
static void
update_samplers(struct i915_context *i915)
{
uint unit;
i915->current.sampler_enable_nr = 0;
i915->current.sampler_enable_flags = 0x0;
for (unit = 0; unit < i915->num_fragment_sampler_views && unit < i915->num_samplers;
for (unit = 0;
unit < i915->num_fragment_sampler_views && unit < i915->num_samplers;
unit++) {
/* determine unit enable/disable by looking for a bound texture */
/* could also examine the fragment program? */
if (i915->fragment_sampler_views[unit]) {
struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
struct i915_texture *texture =
i915_texture(i915->fragment_sampler_views[unit]->texture);
update_sampler(i915,
unit,
i915->fragment_sampler[unit], /* sampler state */
texture, /* texture */
i915->current.sampler[unit]); /* the result */
update_map(i915,
unit,
texture, /* texture */
i915->fragment_sampler[unit], /* sampler state */
i915->fragment_sampler_views[unit], /* sampler view */
i915->current.texbuffer[unit]); /* the result */
update_sampler(i915, unit,
i915->fragment_sampler[unit], /* sampler state */
texture, /* texture */
i915->current.sampler[unit]); /* the result */
update_map(i915, unit, texture, /* texture */
i915->fragment_sampler[unit], /* sampler state */
i915->fragment_sampler_views[unit], /* sampler view */
i915->current.texbuffer[unit]); /* the result */
i915->current.sampler_enable_nr++;
i915->current.sampler_enable_flags |= (1 << unit);
@ -180,26 +173,24 @@ static void update_samplers(struct i915_context *i915)
}
struct i915_tracked_state i915_hw_samplers = {
"samplers",
update_samplers,
I915_NEW_SAMPLER | I915_NEW_SAMPLER_VIEW
};
"samplers", update_samplers, I915_NEW_SAMPLER | I915_NEW_SAMPLER_VIEW};
/***********************************************************************
* Sampler views
*/
static uint translate_texture_format(enum pipe_format pipeFormat,
const struct pipe_sampler_view* view)
static uint
translate_texture_format(enum pipe_format pipeFormat,
const struct pipe_sampler_view *view)
{
if ( (view->swizzle_r != PIPE_SWIZZLE_X ||
view->swizzle_g != PIPE_SWIZZLE_Y ||
view->swizzle_b != PIPE_SWIZZLE_Z ||
view->swizzle_a != PIPE_SWIZZLE_W ) &&
pipeFormat != PIPE_FORMAT_Z24_UNORM_S8_UINT &&
pipeFormat != PIPE_FORMAT_Z24X8_UNORM )
debug_printf("i915: unsupported texture swizzle for format %d\n", pipeFormat);
if ((view->swizzle_r != PIPE_SWIZZLE_X ||
view->swizzle_g != PIPE_SWIZZLE_Y ||
view->swizzle_b != PIPE_SWIZZLE_Z ||
view->swizzle_a != PIPE_SWIZZLE_W) &&
pipeFormat != PIPE_FORMAT_Z24_UNORM_S8_UINT &&
pipeFormat != PIPE_FORMAT_Z24X8_UNORM)
debug_printf("i915: unsupported texture swizzle for format %d\n",
pipeFormat);
switch (pipeFormat) {
case PIPE_FORMAT_L8_UNORM:
@ -246,30 +237,27 @@ static uint translate_texture_format(enum pipe_format pipeFormat,
case PIPE_FORMAT_DXT5_RGBA:
return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5);
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
case PIPE_FORMAT_Z24X8_UNORM:
{
if ( view->swizzle_r == PIPE_SWIZZLE_X &&
view->swizzle_g == PIPE_SWIZZLE_X &&
view->swizzle_b == PIPE_SWIZZLE_X &&
view->swizzle_a == PIPE_SWIZZLE_1)
return (MAPSURF_32BIT | MT_32BIT_xL824);
if ( view->swizzle_r == PIPE_SWIZZLE_X &&
view->swizzle_g == PIPE_SWIZZLE_X &&
view->swizzle_b == PIPE_SWIZZLE_X &&
view->swizzle_a == PIPE_SWIZZLE_X)
return (MAPSURF_32BIT | MT_32BIT_xI824);
if ( view->swizzle_r == PIPE_SWIZZLE_0 &&
view->swizzle_g == PIPE_SWIZZLE_0 &&
view->swizzle_b == PIPE_SWIZZLE_0 &&
view->swizzle_a == PIPE_SWIZZLE_X)
return (MAPSURF_32BIT | MT_32BIT_xA824);
debug_printf("i915: unsupported depth swizzle %d %d %d %d\n",
view->swizzle_r,
view->swizzle_g,
view->swizzle_b,
view->swizzle_a);
case PIPE_FORMAT_Z24X8_UNORM: {
if (view->swizzle_r == PIPE_SWIZZLE_X &&
view->swizzle_g == PIPE_SWIZZLE_X &&
view->swizzle_b == PIPE_SWIZZLE_X &&
view->swizzle_a == PIPE_SWIZZLE_1)
return (MAPSURF_32BIT | MT_32BIT_xL824);
}
if (view->swizzle_r == PIPE_SWIZZLE_X &&
view->swizzle_g == PIPE_SWIZZLE_X &&
view->swizzle_b == PIPE_SWIZZLE_X &&
view->swizzle_a == PIPE_SWIZZLE_X)
return (MAPSURF_32BIT | MT_32BIT_xI824);
if (view->swizzle_r == PIPE_SWIZZLE_0 &&
view->swizzle_g == PIPE_SWIZZLE_0 &&
view->swizzle_b == PIPE_SWIZZLE_0 &&
view->swizzle_a == PIPE_SWIZZLE_X)
return (MAPSURF_32BIT | MT_32BIT_xA824);
debug_printf("i915: unsupported depth swizzle %d %d %d %d\n",
view->swizzle_r, view->swizzle_g, view->swizzle_b,
view->swizzle_a);
return (MAPSURF_32BIT | MT_32BIT_xL824);
}
default:
debug_printf("i915: translate_texture_format() bad image format %x\n",
pipeFormat);
@ -281,28 +269,26 @@ static uint translate_texture_format(enum pipe_format pipeFormat,
static inline uint32_t
ms3_tiling_bits(enum i915_winsys_buffer_tile tiling)
{
uint32_t tiling_bits = 0;
uint32_t tiling_bits = 0;
switch (tiling) {
case I915_TILE_Y:
tiling_bits |= MS3_TILE_WALK_Y;
FALLTHROUGH;
case I915_TILE_X:
tiling_bits |= MS3_TILED_SURFACE;
FALLTHROUGH;
case I915_TILE_NONE:
break;
}
switch (tiling) {
case I915_TILE_Y:
tiling_bits |= MS3_TILE_WALK_Y;
FALLTHROUGH;
case I915_TILE_X:
tiling_bits |= MS3_TILED_SURFACE;
FALLTHROUGH;
case I915_TILE_NONE:
break;
}
return tiling_bits;
return tiling_bits;
}
static void update_map(struct i915_context *i915,
uint unit,
const struct i915_texture *tex,
const struct i915_sampler_state *sampler,
const struct pipe_sampler_view* view,
uint state[3])
static void
update_map(struct i915_context *i915, uint unit, const struct i915_texture *tex,
const struct i915_sampler_state *sampler,
const struct pipe_sampler_view *view, uint state[3])
{
const struct pipe_resource *pt = &tex->b;
uint width = pt->width0, height = pt->height0, depth = pt->depth0;
@ -336,10 +322,8 @@ static void update_map(struct i915_context *i915,
/* MS3 state */
state[0] =
(((height - 1) << MS3_HEIGHT_SHIFT)
| ((width - 1) << MS3_WIDTH_SHIFT)
| format
| ms3_tiling_bits(tex->tiling));
(((height - 1) << MS3_HEIGHT_SHIFT) | ((width - 1) << MS3_WIDTH_SHIFT) |
format | ms3_tiling_bits(tex->tiling));
/*
* XXX When min_filter != mag_filter and there's just one mipmap level,
@ -351,11 +335,9 @@ static void update_map(struct i915_context *i915,
max_lod = sampler->maxlod >> 2;
/* MS4 state */
state[1] =
((((pitch / 4) - 1) << MS4_PITCH_SHIFT)
| MS4_CUBE_FACE_ENA_MASK
| ((max_lod) << MS4_MAX_LOD_SHIFT)
| ((depth - 1) << MS4_VOLUME_DEPTH_SHIFT));
state[1] = ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) | MS4_CUBE_FACE_ENA_MASK |
((max_lod) << MS4_MAX_LOD_SHIFT) |
((depth - 1) << MS4_VOLUME_DEPTH_SHIFT));
if (is_npot)
state[2] = i915_texture_offset(tex, first_level, 0);
@ -363,20 +345,21 @@ static void update_map(struct i915_context *i915,
state[2] = 0;
}
static void update_maps(struct i915_context *i915)
static void
update_maps(struct i915_context *i915)
{
uint unit;
for (unit = 0; unit < i915->num_fragment_sampler_views && unit < i915->num_samplers;
for (unit = 0;
unit < i915->num_fragment_sampler_views && unit < i915->num_samplers;
unit++) {
/* determine unit enable/disable by looking for a bound texture */
/* could also examine the fragment program? */
if (i915->fragment_sampler_views[unit]) {
struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
struct i915_texture *texture =
i915_texture(i915->fragment_sampler_views[unit]->texture);
update_map(i915,
unit,
texture, /* texture */
update_map(i915, unit, texture, /* texture */
i915->fragment_sampler[unit], /* sampler state */
i915->fragment_sampler_views[unit], /* sampler view */
i915->current.texbuffer[unit]);
@ -386,8 +369,5 @@ static void update_maps(struct i915_context *i915)
i915->hardware_dirty |= I915_HW_MAP;
}
struct i915_tracked_state i915_hw_sampler_views = {
"sampler_views",
update_maps,
I915_NEW_SAMPLER_VIEW
};
struct i915_tracked_state i915_hw_sampler_views = {"sampler_views", update_maps,
I915_NEW_SAMPLER_VIEW};

40
src/gallium/drivers/i915/i915_state_static.c
View File

@ -23,18 +23,17 @@
*
**************************************************************************/
#include "i915_reg.h"
#include "i915_context.h"
#include "i915_state.h"
#include "i915_reg.h"
#include "i915_resource.h"
#include "i915_screen.h"
#include "i915_state.h"
/***********************************************************************
* Update framebuffer state
*/
static unsigned translate_format(enum pipe_format format)
static unsigned
translate_format(enum pipe_format format)
{
switch (format) {
case PIPE_FORMAT_B8G8R8A8_UNORM:
@ -61,7 +60,8 @@ static unsigned translate_format(enum pipe_format format)
}
}
static unsigned translate_depth_format(enum pipe_format zformat)
static unsigned
translate_depth_format(enum pipe_format zformat)
{
switch (zformat) {
case PIPE_FORMAT_Z24X8_UNORM:
@ -75,7 +75,8 @@ static unsigned translate_depth_format(enum pipe_format zformat)
}
}
static void update_framebuffer(struct i915_context *i915)
static void
update_framebuffer(struct i915_context *i915)
{
struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
@ -110,7 +111,7 @@ static void update_framebuffer(struct i915_context *i915)
depth_surface->u.tex.first_layer);
assert(tex);
if (offset != 0)
debug_printf("Depth offset is %d\n",offset);
debug_printf("Depth offset is %d\n", offset);
i915->current.depth_bo = tex->buffer;
i915->current.depth_flags = surf->buf_info;
@ -139,12 +140,10 @@ static void update_framebuffer(struct i915_context *i915)
}
struct i915_tracked_state i915_hw_framebuffer = {
"framebuffer",
update_framebuffer,
I915_NEW_FRAMEBUFFER
};
"framebuffer", update_framebuffer, I915_NEW_FRAMEBUFFER};
static void update_dst_buf_vars(struct i915_context *i915)
static void
update_dst_buf_vars(struct i915_context *i915)
{
struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
@ -163,18 +162,15 @@ static void update_dst_buf_vars(struct i915_context *i915)
zformat = translate_depth_format(depth_surface->format);
if (is->is_i945 && tex->tiling != I915_TILE_NONE
&& (i915->fs && !i915->fs->info.writes_z))
if (is->is_i945 && tex->tiling != I915_TILE_NONE &&
(i915->fs && !i915->fs->info.writes_z))
early_z = CLASSIC_EARLY_DEPTH;
} else
zformat = 0;
dst_buf_vars = DSTORG_HORT_BIAS(0x8) | /* .5 */
DSTORG_VERT_BIAS(0x8) | /* .5 */
LOD_PRECLAMP_OGL |
TEX_DEFAULT_COLOR_OGL |
cformat |
zformat |
LOD_PRECLAMP_OGL | TEX_DEFAULT_COLOR_OGL | cformat | zformat |
early_z;
if (i915->current.dst_buf_vars != dst_buf_vars) {
@ -185,11 +181,7 @@ static void update_dst_buf_vars(struct i915_context *i915)
i915->static_dirty |= I915_DST_VARS;
i915->hardware_dirty |= I915_HW_STATIC;
}
}
struct i915_tracked_state i915_hw_dst_buf_vars = {
"dst buf vars",
update_dst_buf_vars,
I915_NEW_FRAMEBUFFER | I915_NEW_FS
};
"dst buf vars", update_dst_buf_vars, I915_NEW_FRAMEBUFFER | I915_NEW_FS};

213
src/gallium/drivers/i915/i915_surface.c
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,29 +22,27 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#include "i915_surface.h"
#include "i915_resource.h"
#include "i915_state.h"
#include "i915_blit.h"
#include "i915_reg.h"
#include "i915_screen.h"
#include "pipe/p_defines.h"
#include "util/format/u_format.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "util/format/u_format.h"
#include "util/u_memory.h"
#include "util/u_pack_color.h"
#include "util/u_surface.h"
#include "i915_blit.h"
#include "i915_reg.h"
#include "i915_resource.h"
#include "i915_screen.h"
#include "i915_state.h"
static struct pipe_surface *
i915_create_surface_custom(struct pipe_context *ctx,
struct pipe_resource *pt,
i915_create_surface_custom(struct pipe_context *ctx, struct pipe_resource *pt,
const struct pipe_surface *surf_tmpl,
unsigned width0,
unsigned height0);
unsigned width0, unsigned height0);
/*
* surface functions using the render engine
*/
@ -53,7 +51,8 @@ static void
i915_util_blitter_save_states(struct i915_context *i915)
{
util_blitter_save_blend(i915->blitter, (void *)i915->blend);
util_blitter_save_depth_stencil_alpha(i915->blitter, (void *)i915->depth_stencil);
util_blitter_save_depth_stencil_alpha(i915->blitter,
(void *)i915->depth_stencil);
util_blitter_save_stencil_ref(i915->blitter, &i915->stencil_ref);
util_blitter_save_rasterizer(i915->blitter, (void *)i915->rasterizer);
util_blitter_save_fragment_shader(i915->blitter, i915->fs);
@ -61,25 +60,22 @@ i915_util_blitter_save_states(struct i915_context *i915)
util_blitter_save_viewport(i915->blitter, &i915->viewport);
util_blitter_save_scissor(i915->blitter, &i915->scissor);
util_blitter_save_vertex_elements(i915->blitter, i915->velems);
util_blitter_save_vertex_buffer_slot(i915->blitter,
i915->vertex_buffers);
util_blitter_save_vertex_buffer_slot(i915->blitter, i915->vertex_buffers);
util_blitter_save_framebuffer(i915->blitter, &i915->framebuffer);
util_blitter_save_fragment_sampler_states(i915->blitter,
i915->num_samplers,
(void**)i915->fragment_sampler);
util_blitter_save_fragment_sampler_states(i915->blitter, i915->num_samplers,
(void **)i915->fragment_sampler);
util_blitter_save_fragment_sampler_views(i915->blitter,
i915->num_fragment_sampler_views,
i915->fragment_sampler_views);
}
static void
i915_surface_copy_render(struct pipe_context *pipe,
struct pipe_resource *dst, unsigned dst_level,
unsigned dstx, unsigned dsty, unsigned dstz,
struct pipe_resource *src, unsigned src_level,
const struct pipe_box *src_box)
i915_surface_copy_render(struct pipe_context *pipe, struct pipe_resource *dst,
unsigned dst_level, unsigned dstx, unsigned dsty,
unsigned dstz, struct pipe_resource *src,
unsigned src_level, const struct pipe_box *src_box)
{
struct i915_context *i915 = i915_context(pipe);
unsigned src_width0 = src->width0;
@ -112,30 +108,30 @@ i915_surface_copy_render(struct pipe_context *pipe,
i915_util_blitter_save_states(i915);
dst_view = i915_create_surface_custom(pipe, dst, &dst_templ, dst_width0, dst_height0);
src_view = i915_create_sampler_view_custom(pipe, src, &src_templ, src_width0, src_height0);
dst_view = i915_create_surface_custom(pipe, dst, &dst_templ, dst_width0,
dst_height0);
src_view = i915_create_sampler_view_custom(pipe, src, &src_templ, src_width0,
src_height0);
u_box_3d(dstx, dsty, dstz, abs(src_box->width), abs(src_box->height),
abs(src_box->depth), &dstbox);
util_blitter_blit_generic(i915->blitter, dst_view, &dstbox,
src_view, src_box, src_width0, src_height0,
PIPE_MASK_RGBAZS, PIPE_TEX_FILTER_NEAREST, NULL,
FALSE);
util_blitter_blit_generic(i915->blitter, dst_view, &dstbox, src_view,
src_box, src_width0, src_height0, PIPE_MASK_RGBAZS,
PIPE_TEX_FILTER_NEAREST, NULL, FALSE);
return;
fallback:
util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz,
src, src_level, src_box);
util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz, src,
src_level, src_box);
}
static void
i915_clear_render_target_render(struct pipe_context *pipe,
struct pipe_surface *dst,
const union pipe_color_union *color,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height,
bool render_condition_enabled)
unsigned dstx, unsigned dsty, unsigned width,
unsigned height, bool render_condition_enabled)
{
struct i915_context *i915 = i915_context(pipe);
struct pipe_framebuffer_state fb_state;
@ -152,8 +148,8 @@ i915_clear_render_target_render(struct pipe_context *pipe,
if (i915->dirty)
i915_update_derived(i915);
i915_clear_emit(pipe, PIPE_CLEAR_COLOR, color, 0.0, 0x0,
dstx, dsty, width, height);
i915_clear_emit(pipe, PIPE_CLEAR_COLOR, color, 0.0, 0x0, dstx, dsty, width,
height);
pipe->set_framebuffer_state(pipe, &i915->blitter->saved_fb_state);
util_unreference_framebuffer_state(&i915->blitter->saved_fb_state);
@ -162,12 +158,9 @@ i915_clear_render_target_render(struct pipe_context *pipe,
static void
i915_clear_depth_stencil_render(struct pipe_context *pipe,
struct pipe_surface *dst,
unsigned clear_flags,
double depth,
unsigned stencil,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height,
struct pipe_surface *dst, unsigned clear_flags,
double depth, unsigned stencil, unsigned dstx,
unsigned dsty, unsigned width, unsigned height,
bool render_condition_enabled)
{
struct i915_context *i915 = i915_context(pipe);
@ -184,9 +177,8 @@ i915_clear_depth_stencil_render(struct pipe_context *pipe,
if (i915->dirty)
i915_update_derived(i915);
i915_clear_emit(pipe, clear_flags & PIPE_CLEAR_DEPTHSTENCIL,
NULL, depth, stencil,
dstx, dsty, width, height);
i915_clear_emit(pipe, clear_flags & PIPE_CLEAR_DEPTHSTENCIL, NULL, depth,
stencil, dstx, dsty, width, height);
pipe->set_framebuffer_state(pipe, &i915->blitter->saved_fb_state);
util_unreference_framebuffer_state(&i915->blitter->saved_fb_state);
@ -201,16 +193,15 @@ i915_clear_depth_stencil_render(struct pipe_context *pipe,
* do it higher up if required.
*/
static void
i915_surface_copy_blitter(struct pipe_context *pipe,
struct pipe_resource *dst, unsigned dst_level,
unsigned dstx, unsigned dsty, unsigned dstz,
struct pipe_resource *src, unsigned src_level,
const struct pipe_box *src_box)
i915_surface_copy_blitter(struct pipe_context *pipe, struct pipe_resource *dst,
unsigned dst_level, unsigned dstx, unsigned dsty,
unsigned dstz, struct pipe_resource *src,
unsigned src_level, const struct pipe_box *src_box)
{
/* Fallback for buffers. */
if (dst->target == PIPE_BUFFER && src->target == PIPE_BUFFER) {
util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz,
src, src_level, src_box);
util_resource_copy_region(pipe, dst, dst_level, dstx, dsty, dstz, src,
src_level, src_box);
return;
}
@ -218,32 +209,32 @@ i915_surface_copy_blitter(struct pipe_context *pipe,
struct i915_texture *src_tex = i915_texture(src);
struct pipe_resource *dpt = &dst_tex->b;
struct pipe_resource *spt = &src_tex->b;
unsigned dst_offset, src_offset; /* in bytes */
unsigned dst_offset, src_offset; /* in bytes */
/* XXX cannot copy 3d regions at this time */
assert(src_box->depth == 1);
if (dst->target != PIPE_TEXTURE_CUBE &&
dst->target != PIPE_TEXTURE_3D)
if (dst->target != PIPE_TEXTURE_CUBE && dst->target != PIPE_TEXTURE_3D)
assert(dstz == 0);
dst_offset = i915_texture_offset(dst_tex, dst_level, dstz);
if (src->target != PIPE_TEXTURE_CUBE &&
src->target != PIPE_TEXTURE_3D)
if (src->target != PIPE_TEXTURE_CUBE && src->target != PIPE_TEXTURE_3D)
assert(src_box->z == 0);
src_offset = i915_texture_offset(src_tex, src_level, src_box->z);
assert( util_format_get_blocksize(dpt->format) == util_format_get_blocksize(spt->format) );
assert( util_format_get_blockwidth(dpt->format) == util_format_get_blockwidth(spt->format) );
assert( util_format_get_blockheight(dpt->format) == util_format_get_blockheight(spt->format) );
assert( util_format_get_blockwidth(dpt->format) == 1 );
assert( util_format_get_blockheight(dpt->format) == 1 );
assert(util_format_get_blocksize(dpt->format) ==
util_format_get_blocksize(spt->format));
assert(util_format_get_blockwidth(dpt->format) ==
util_format_get_blockwidth(spt->format));
assert(util_format_get_blockheight(dpt->format) ==
util_format_get_blockheight(spt->format));
assert(util_format_get_blockwidth(dpt->format) == 1);
assert(util_format_get_blockheight(dpt->format) == 1);
i915_copy_blit( i915_context(pipe),
util_format_get_blocksize(dpt->format),
(unsigned short) src_tex->stride, src_tex->buffer, src_offset,
(unsigned short) dst_tex->stride, dst_tex->buffer, dst_offset,
(short) src_box->x, (short) src_box->y, (short) dstx, (short) dsty,
(short) src_box->width, (short) src_box->height );
i915_copy_blit(i915_context(pipe), util_format_get_blocksize(dpt->format),
(unsigned short)src_tex->stride, src_tex->buffer, src_offset,
(unsigned short)dst_tex->stride, dst_tex->buffer, dst_offset,
(short)src_box->x, (short)src_box->y, (short)dstx,
(short)dsty, (short)src_box->width, (short)src_box->height);
}
static void
@ -282,44 +273,38 @@ static void
i915_clear_render_target_blitter(struct pipe_context *pipe,
struct pipe_surface *dst,
const union pipe_color_union *color,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height,
bool render_condition_enabled)
unsigned dstx, unsigned dsty, unsigned width,
unsigned height, bool render_condition_enabled)
{
struct i915_texture *tex = i915_texture(dst->texture);
struct pipe_resource *pt = &tex->b;
union util_color uc;
unsigned offset = i915_texture_offset(tex, dst->u.tex.level, dst->u.tex.first_layer);
unsigned offset =
i915_texture_offset(tex, dst->u.tex.level, dst->u.tex.first_layer);
assert(util_format_get_blockwidth(pt->format) == 1);
assert(util_format_get_blockheight(pt->format) == 1);
util_pack_color(color->f, dst->format, &uc);
i915_fill_blit( i915_context(pipe),
util_format_get_blocksize(pt->format),
XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB,
(unsigned short) tex->stride,
tex->buffer, offset,
(short) dstx, (short) dsty,
(short) width, (short) height,
uc.ui[0] );
i915_fill_blit(i915_context(pipe), util_format_get_blocksize(pt->format),
XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB,
(unsigned short)tex->stride, tex->buffer, offset, (short)dstx,
(short)dsty, (short)width, (short)height, uc.ui[0]);
}
static void
i915_clear_depth_stencil_blitter(struct pipe_context *pipe,
struct pipe_surface *dst,
unsigned clear_flags,
double depth,
unsigned stencil,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height,
struct pipe_surface *dst, unsigned clear_flags,
double depth, unsigned stencil, unsigned dstx,
unsigned dsty, unsigned width, unsigned height,
bool render_condition_enabled)
{
struct i915_texture *tex = i915_texture(dst->texture);
struct pipe_resource *pt = &tex->b;
unsigned packedds;
unsigned mask = 0;
unsigned offset = i915_texture_offset(tex, dst->u.tex.level, dst->u.tex.first_layer);
unsigned offset =
i915_texture_offset(tex, dst->u.tex.level, dst->u.tex.first_layer);
assert(util_format_get_blockwidth(pt->format) == 1);
assert(util_format_get_blockheight(pt->format) == 1);
@ -335,21 +320,18 @@ i915_clear_depth_stencil_blitter(struct pipe_context *pipe,
(dst->format != PIPE_FORMAT_Z24_UNORM_S8_UINT))
mask |= XY_COLOR_BLT_WRITE_ALPHA;
i915_fill_blit( i915_context(pipe),
util_format_get_blocksize(pt->format),
mask,
(unsigned short) tex->stride,
tex->buffer, offset,
(short) dstx, (short) dsty,
(short) width, (short) height,
packedds );
i915_fill_blit(i915_context(pipe), util_format_get_blocksize(pt->format),
mask, (unsigned short)tex->stride, tex->buffer, offset,
(short)dstx, (short)dsty, (short)width, (short)height,
packedds);
}
/*
* Screen surface functions
*/
static void i915_set_color_surface_swizzle(struct i915_surface *surf)
static void
i915_set_color_surface_swizzle(struct i915_surface *surf)
{
enum pipe_format format = surf->templ.format;
@ -358,15 +340,15 @@ static void i915_set_color_surface_swizzle(struct i915_surface *surf)
uint8_t color_swizzle[4];
uint32_t oc_swizzle;
} fixup_formats[] = {
{ PIPE_FORMAT_R8G8B8A8_UNORM, {2, 1, 0, 3 }, 0x21030000 /* BGRA */},
{ PIPE_FORMAT_R8G8B8X8_UNORM, {2, 1, 0, 3 }, 0x21030000 /* BGRX */},
{PIPE_FORMAT_R8G8B8A8_UNORM, {2, 1, 0, 3}, 0x21030000 /* BGRA */},
{PIPE_FORMAT_R8G8B8X8_UNORM, {2, 1, 0, 3}, 0x21030000 /* BGRX */},
/* These are rendered to using COLORBUF_8BIT, where the G channel written
* by shader (and output by blending) is used.
*/
{ PIPE_FORMAT_L8_UNORM, {0, 0, 0, 0 }, 0x00030000 /* RRRA */},
{ PIPE_FORMAT_I8_UNORM, {0, 0, 0, 0 }, 0x00030000 /* RRRA */},
{ PIPE_FORMAT_A8_UNORM, {3, 3, 3, 3 }, 0x33330000 /* AAAA */},
{PIPE_FORMAT_L8_UNORM, {0, 0, 0, 0}, 0x00030000 /* RRRA */},
{PIPE_FORMAT_I8_UNORM, {0, 0, 0, 0}, 0x00030000 /* RRRA */},
{PIPE_FORMAT_A8_UNORM, {3, 3, 3, 3}, 0x33330000 /* AAAA */},
};
if (format == PIPE_FORMAT_A8_UNORM)
@ -376,7 +358,8 @@ static void i915_set_color_surface_swizzle(struct i915_surface *surf)
for (int i = 0; i < ARRAY_SIZE(fixup_formats); i++) {
if (fixup_formats[i].format == format) {
memcpy(surf->color_swizzle, fixup_formats[i].color_swizzle, sizeof(surf->color_swizzle));
memcpy(surf->color_swizzle, fixup_formats[i].color_swizzle,
sizeof(surf->color_swizzle));
surf->oc_swizzle = fixup_formats[i].oc_swizzle;
return;
}
@ -387,18 +370,15 @@ static void i915_set_color_surface_swizzle(struct i915_surface *surf)
}
static struct pipe_surface *
i915_create_surface_custom(struct pipe_context *ctx,
struct pipe_resource *pt,
i915_create_surface_custom(struct pipe_context *ctx, struct pipe_resource *pt,
const struct pipe_surface *surf_tmpl,
unsigned width0,
unsigned height0)
unsigned width0, unsigned height0)
{
struct i915_texture *tex = i915_texture(pt);
struct i915_surface *surf;
assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
if (pt->target != PIPE_TEXTURE_CUBE &&
pt->target != PIPE_TEXTURE_3D)
if (pt->target != PIPE_TEXTURE_CUBE && pt->target != PIPE_TEXTURE_3D)
assert(surf_tmpl->u.tex.first_layer == 0);
surf = CALLOC_STRUCT(i915_surface);
@ -442,23 +422,20 @@ i915_create_surface_custom(struct pipe_context *ctx,
}
static struct pipe_surface *
i915_create_surface(struct pipe_context *ctx,
struct pipe_resource *pt,
i915_create_surface(struct pipe_context *ctx, struct pipe_resource *pt,
const struct pipe_surface *surf_tmpl)
{
return i915_create_surface_custom(ctx, pt, surf_tmpl,
pt->width0, pt->height0);
return i915_create_surface_custom(ctx, pt, surf_tmpl, pt->width0,
pt->height0);
}
static void
i915_surface_destroy(struct pipe_context *ctx,
struct pipe_surface *surf)
i915_surface_destroy(struct pipe_context *ctx, struct pipe_surface *surf)
{
pipe_resource_reference(&surf->texture, NULL);
FREE(surf);
}
void
i915_init_surface_functions(struct i915_context *i915)
{

13
src/gallium/drivers/i915/i915_surface.h
View File

@ -1,8 +1,8 @@
/**************************************************************************
*
*
* Copyright 2008 VMware, Inc.
* All Rights Reserved.
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
@ -22,7 +22,7 @@
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*
**************************************************************************/
#ifndef I915_SURFACE_H
@ -31,7 +31,6 @@
struct i915_context;
struct i915_screen;
void i915_init_surface_functions( struct i915_context *i915 );
void i915_init_surface_functions(struct i915_context *i915);
#endif /* I915_SCREEN_H */

70
src/gallium/drivers/i915/i915_winsys.h
View File

@ -35,34 +35,26 @@ struct pipe_resource;
struct pipe_fence_handle;
struct winsys_handle;
enum i915_winsys_buffer_usage
{
enum i915_winsys_buffer_usage {
/* use on textures */
I915_USAGE_RENDER = 0x01,
I915_USAGE_SAMPLER = 0x02,
I915_USAGE_RENDER = 0x01,
I915_USAGE_SAMPLER = 0x02,
I915_USAGE_2D_TARGET = 0x04,
I915_USAGE_2D_SOURCE = 0x08,
/* use on vertex */
I915_USAGE_VERTEX = 0x10
I915_USAGE_VERTEX = 0x10
};
enum i915_winsys_buffer_type
{
enum i915_winsys_buffer_type {
I915_NEW_TEXTURE,
I915_NEW_SCANOUT, /**< a texture used for scanning out from */
I915_NEW_VERTEX
};
/* These need to be in sync with the definitions of libdrm-intel! */
enum i915_winsys_buffer_tile
{
I915_TILE_NONE,
I915_TILE_X,
I915_TILE_Y
};
enum i915_winsys_buffer_tile { I915_TILE_NONE, I915_TILE_X, I915_TILE_Y };
enum i915_winsys_flush_flags
{
enum i915_winsys_flush_flags {
I915_FLUSH_ASYNC = 0,
I915_FLUSH_END_OF_FRAME = 1
};
@ -96,8 +88,8 @@ struct i915_winsys {
/**
* Create a new batchbuffer.
*/
struct i915_winsys_batchbuffer *
(*batchbuffer_create)(struct i915_winsys *iws);
struct i915_winsys_batchbuffer *(*batchbuffer_create)(
struct i915_winsys *iws);
/**
* Validate buffers for usage in this batchbuffer.
@ -108,8 +100,8 @@ struct i915_winsys {
* @num_of_buffers size of the passed array
*/
boolean (*validate_buffers)(struct i915_winsys_batchbuffer *batch,
struct i915_winsys_buffer **buffers,
int num_of_buffers);
struct i915_winsys_buffer **buffers,
int num_of_buffers);
/**
* Emit a relocation to a buffer.
@ -140,7 +132,6 @@ struct i915_winsys {
void (*batchbuffer_destroy)(struct i915_winsys_batchbuffer *batch);
/*@}*/
/**
* Buffer functions.
*/
@ -148,10 +139,9 @@ struct i915_winsys {
/**
* Create a buffer.
*/
struct i915_winsys_buffer *
(*buffer_create)(struct i915_winsys *iws,
unsigned size,
enum i915_winsys_buffer_type type);
struct i915_winsys_buffer *(*buffer_create)(
struct i915_winsys *iws, unsigned size,
enum i915_winsys_buffer_type type);
/**
* Create a tiled buffer.
@ -161,11 +151,9 @@ struct i915_winsys {
* be set to I915_TILE_NONE. The calculated stride (incorporateing hw/kernel
* requirements) is always returned in *stride.
*/
struct i915_winsys_buffer *
(*buffer_create_tiled)(struct i915_winsys *iws,
unsigned *stride, unsigned height,
enum i915_winsys_buffer_tile *tiling,
enum i915_winsys_buffer_type type);
struct i915_winsys_buffer *(*buffer_create_tiled)(
struct i915_winsys *iws, unsigned *stride, unsigned height,
enum i915_winsys_buffer_tile *tiling, enum i915_winsys_buffer_type type);
/**
* Creates a buffer from a handle.
@ -173,12 +161,9 @@ struct i915_winsys {
* Also provides the stride information needed for the
* texture via the stride argument.
*/
struct i915_winsys_buffer *
(*buffer_from_handle)(struct i915_winsys *iws,
struct winsys_handle *whandle,
unsigned height,
enum i915_winsys_buffer_tile *tiling,
unsigned *stride);
struct i915_winsys_buffer *(*buffer_from_handle)(
struct i915_winsys *iws, struct winsys_handle *whandle, unsigned height,
enum i915_winsys_buffer_tile *tiling, unsigned *stride);
/**
* Used to implement pipe_screen::resource_get_handle.
@ -186,15 +171,13 @@ struct i915_winsys {
*/
boolean (*buffer_get_handle)(struct i915_winsys *iws,
struct i915_winsys_buffer *buffer,
struct winsys_handle *whandle,
unsigned stride);
struct winsys_handle *whandle, unsigned stride);
/**
* Map a buffer.
*/
void *(*buffer_map)(struct i915_winsys *iws,
struct i915_winsys_buffer *buffer,
boolean write);
struct i915_winsys_buffer *buffer, boolean write);
/**
* Unmap a buffer.
@ -207,11 +190,8 @@ struct i915_winsys {
*
* Arguments follows pipe_buffer_write.
*/
int (*buffer_write)(struct i915_winsys *iws,
struct i915_winsys_buffer *dst,
size_t offset,
size_t size,
const void *data);
int (*buffer_write)(struct i915_winsys *iws, struct i915_winsys_buffer *dst,
size_t offset, size_t size, const void *data);
void (*buffer_destroy)(struct i915_winsys *iws,
struct i915_winsys_buffer *buffer);
@ -223,7 +203,6 @@ struct i915_winsys {
struct i915_winsys_buffer *buffer);
/*@}*/
/**
* Fence functions.
*/
@ -253,7 +232,6 @@ struct i915_winsys {
*/
int (*aperture_size)(struct i915_winsys *iws);
/**
* Destroy the winsys.
*/