i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
These were for debugging in bringup. Now that relatively complicated apps are working, they haven't helped debug anything in quite a while.
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@ -515,8 +515,6 @@ static void upload_invarient_state( struct brw_context *brw )
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if (intel->gen >= 6) {
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int i;
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intel_batchbuffer_emit_mi_flush(intel->batch);
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BEGIN_BATCH(3);
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OUT_BATCH(CMD_3D_MULTISAMPLE << 16 | (3 - 2));
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OUT_BATCH(MS_PIXEL_LOCATION_CENTER |
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@ -271,8 +271,6 @@ static void upload_cc_state_pointers(struct brw_context *brw)
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OUT_RELOC(brw->cc.depth_stencil_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
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OUT_RELOC(brw->cc.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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@ -61,8 +61,6 @@ upload_clip_state(struct brw_context *brw)
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provoking);
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OUT_BATCH(GEN6_CLIP_FORCE_ZERO_RTAINDEX);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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const struct brw_tracked_state gen6_clip_state = {
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@ -44,8 +44,6 @@ upload_gs_state(struct brw_context *brw)
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OUT_BATCH(0);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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if (brw->gs.prog_bo) {
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BEGIN_BATCH(7);
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OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
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@ -49,8 +49,6 @@ upload_sampler_state_pointers(struct brw_context *brw)
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OUT_BATCH(0);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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@ -187,8 +187,6 @@ upload_sf_state(struct brw_context *brw)
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OUT_BATCH(0); /* wrapshortest enables 0-7 */
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OUT_BATCH(0); /* wrapshortest enables 8-15 */
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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const struct brw_tracked_state gen6_sf_state = {
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@ -59,8 +59,6 @@ upload_urb(struct brw_context *brw)
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/* GS requirement */
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assert(!brw->gs.prog_bo || brw->urb.vs_size < 5);
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intel_batchbuffer_emit_mi_flush(intel->batch);
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BEGIN_BATCH(3);
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OUT_BATCH(CMD_URB << 16 | (3 - 2));
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OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
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@ -68,8 +66,6 @@ upload_urb(struct brw_context *brw)
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OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
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((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT));
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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const struct brw_tracked_state gen6_urb = {
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@ -125,8 +125,6 @@ static void upload_viewport_state_pointers(struct brw_context *brw)
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OUT_RELOC(brw->sf.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
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OUT_RELOC(brw->cc.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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const struct brw_tracked_state gen6_viewport_state = {
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@ -88,8 +88,6 @@ upload_vs_state(struct brw_context *brw)
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drm_intel_bo_unreference(constant_bo);
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}
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intel_batchbuffer_emit_mi_flush(intel->batch);
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BEGIN_BATCH(6);
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OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
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OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
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@ -103,8 +101,6 @@ upload_vs_state(struct brw_context *brw)
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GEN6_VS_STATISTICS_ENABLE |
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GEN6_VS_ENABLE);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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const struct brw_tracked_state gen6_vs_state = {
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@ -109,8 +109,6 @@ upload_wm_state(struct brw_context *brw)
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ADVANCE_BATCH();
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}
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intel_batchbuffer_emit_mi_flush(intel->batch);
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dw2 = dw4 = dw5 = dw6 = 0;
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dw4 |= GEN6_WM_STATISTICS_ENABLE;
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dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
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@ -167,8 +165,6 @@ upload_wm_state(struct brw_context *brw)
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OUT_BATCH(0); /* kernel 1 pointer */
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OUT_BATCH(0); /* kernel 2 pointer */
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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}
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const struct brw_tracked_state gen6_wm_state = {
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