pan/mdg: Limit int64 vectorization
Previously, nir_opt_vectorize was sometimes vectorizing 64-bit load_const instructions to vec4. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>
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@ -229,6 +229,29 @@ mdg_is_64(const nir_instr *instr, const void *_unused)
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}
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}
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}
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}
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/* Only vectorize int64 up to vec2 */
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static bool
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midgard_vectorize_filter(const nir_instr *instr, void *data)
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{
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if (instr->type != nir_instr_type_alu)
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return true;
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const nir_alu_instr *alu = nir_instr_as_alu(instr);
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unsigned num_components = alu->dest.dest.ssa.num_components;
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int src_bit_size = nir_src_bit_size(alu->src[0].src);
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int dst_bit_size = nir_dest_bit_size(alu->dest.dest);
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if (src_bit_size == 64 || dst_bit_size == 64) {
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if (num_components > 1)
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return false;
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}
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return true;
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}
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/* Flushes undefined values to zero */
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/* Flushes undefined values to zero */
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static void
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static void
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@ -308,7 +331,8 @@ optimise_nir(nir_shader *nir, unsigned quirks, bool is_blend)
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nir_var_shader_out |
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nir_var_shader_out |
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nir_var_function_temp);
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nir_var_function_temp);
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NIR_PASS(progress, nir, nir_opt_vectorize, NULL, NULL);
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NIR_PASS(progress, nir, nir_opt_vectorize,
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midgard_vectorize_filter, NULL);
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} while (progress);
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} while (progress);
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NIR_PASS_V(nir, nir_lower_alu_to_scalar, mdg_is_64, NULL);
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NIR_PASS_V(nir, nir_lower_alu_to_scalar, mdg_is_64, NULL);
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