intel/vulkan: Hard code CS scratch_ids_per_subslice for Cherryview
Ken suggested that we might be underallocating scratch space on HD 400. Allocating scratch space as though there was actually 8 EUs seems to help with a GPU hang seen on synmark CSDof. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -1097,24 +1097,35 @@ anv_scratch_pool_alloc(struct anv_device *device, struct anv_scratch_pool *pool,
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&device->instance->physicalDevice;
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const struct gen_device_info *devinfo = &physical_device->info;
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/* WaCSScratchSize:hsw
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*
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* Haswell's scratch space address calculation appears to be sparse
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* rather than tightly packed. The Thread ID has bits indicating which
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* subslice, EU within a subslice, and thread within an EU it is.
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* There's a maximum of two slices and two subslices, so these can be
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* stored with a single bit. Even though there are only 10 EUs per
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* subslice, this is stored in 4 bits, so there's an effective maximum
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* value of 16 EUs. Similarly, although there are only 7 threads per EU,
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* this is stored in a 3 bit number, giving an effective maximum value
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* of 8 threads per EU.
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*
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* This means that we need to use 16 * 8 instead of 10 * 7 for the
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* number of threads per subslice.
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*/
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const unsigned subslices = MAX2(physical_device->subslice_total, 1);
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const unsigned scratch_ids_per_subslice =
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device->info.is_haswell ? 16 * 8 : devinfo->max_cs_threads;
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unsigned scratch_ids_per_subslice;
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if (devinfo->is_haswell) {
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/* WaCSScratchSize:hsw
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*
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* Haswell's scratch space address calculation appears to be sparse
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* rather than tightly packed. The Thread ID has bits indicating
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* which subslice, EU within a subslice, and thread within an EU it
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* is. There's a maximum of two slices and two subslices, so these
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* can be stored with a single bit. Even though there are only 10 EUs
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* per subslice, this is stored in 4 bits, so there's an effective
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* maximum value of 16 EUs. Similarly, although there are only 7
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* threads per EU, this is stored in a 3 bit number, giving an
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* effective maximum value of 8 threads per EU.
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*
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* This means that we need to use 16 * 8 instead of 10 * 7 for the
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* number of threads per subslice.
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*/
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scratch_ids_per_subslice = 16 * 8;
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} else if (devinfo->is_cherryview) {
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/* Cherryview devices have either 6 or 8 EUs per subslice, and each EU
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* has 7 threads. The 6 EU devices appear to calculate thread IDs as if
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* it had 8 EUs.
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*/
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scratch_ids_per_subslice = 8 * 7;
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} else {
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scratch_ids_per_subslice = devinfo->max_cs_threads;
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}
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uint32_t max_threads[] = {
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[MESA_SHADER_VERTEX] = devinfo->max_vs_threads,
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