zink: handle 0 as valid pipeline hash value
xxhash can return 0 as a valid hash so it needs to be handled Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8201>
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fc34f684d6
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2472f52e73
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@ -481,7 +481,7 @@ zink_set_vertex_buffers(struct pipe_context *pctx,
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res->needs_xfb_barrier = false;
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res->needs_xfb_barrier = false;
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}
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}
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}
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}
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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}
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}
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util_set_vertex_buffers_mask(ctx->buffers, &ctx->buffers_enabled_mask,
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util_set_vertex_buffers_mask(ctx->buffers, &ctx->buffers_enabled_mask,
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@ -509,7 +509,7 @@ zink_set_viewport_states(struct pipe_context *pctx,
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ctx->viewports[start_slot + i] = viewport;
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ctx->viewports[start_slot + i] = viewport;
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}
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}
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if (ctx->gfx_pipeline_state.num_viewports != start_slot + num_viewports)
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if (ctx->gfx_pipeline_state.num_viewports != start_slot + num_viewports)
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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ctx->gfx_pipeline_state.num_viewports = start_slot + num_viewports;
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ctx->gfx_pipeline_state.num_viewports = start_slot + num_viewports;
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}
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}
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@ -804,7 +804,7 @@ zink_set_framebuffer_state(struct pipe_context *pctx,
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ctx->dirty_shader_stages |= 1 << PIPE_SHADER_FRAGMENT;
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ctx->dirty_shader_stages |= 1 << PIPE_SHADER_FRAGMENT;
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ctx->gfx_pipeline_state.rast_samples = rast_samples;
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ctx->gfx_pipeline_state.rast_samples = rast_samples;
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ctx->gfx_pipeline_state.num_attachments = state->nr_cbufs;
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ctx->gfx_pipeline_state.num_attachments = state->nr_cbufs;
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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struct zink_batch *batch = zink_batch_no_rp(ctx);
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struct zink_batch *batch = zink_batch_no_rp(ctx);
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@ -824,7 +824,7 @@ zink_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
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{
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{
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struct zink_context *ctx = zink_context(pctx);
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struct zink_context *ctx = zink_context(pctx);
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ctx->gfx_pipeline_state.sample_mask = sample_mask;
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ctx->gfx_pipeline_state.sample_mask = sample_mask;
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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}
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}
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static VkAccessFlags
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static VkAccessFlags
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@ -1265,7 +1265,7 @@ zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
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if (!ctx)
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if (!ctx)
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goto fail;
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goto fail;
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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ctx->base.screen = pscreen;
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ctx->base.screen = pscreen;
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ctx->base.priv = priv;
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ctx->base.priv = priv;
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@ -249,7 +249,7 @@ zink_draw_vbo(struct pipe_context *pctx,
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return;
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return;
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if (ctx->gfx_pipeline_state.primitive_restart != !!dinfo->primitive_restart)
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if (ctx->gfx_pipeline_state.primitive_restart != !!dinfo->primitive_restart)
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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ctx->gfx_pipeline_state.primitive_restart = !!dinfo->primitive_restart;
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ctx->gfx_pipeline_state.primitive_restart = !!dinfo->primitive_restart;
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VkPipeline pipeline = zink_get_gfx_pipeline(screen, gfx_program,
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VkPipeline pipeline = zink_get_gfx_pipeline(screen, gfx_program,
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@ -64,6 +64,7 @@ struct zink_gfx_pipeline_state {
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/* Pre-hashed value for table lookup, invalid when zero.
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/* Pre-hashed value for table lookup, invalid when zero.
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* Members after this point are not included in pipeline state hash key */
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* Members after this point are not included in pipeline state hash key */
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uint32_t hash;
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uint32_t hash;
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bool dirty;
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};
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};
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VkPipeline
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VkPipeline
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@ -334,7 +334,7 @@ update_shader_modules(struct zink_context *ctx, struct zink_shader *stages[ZINK_
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zm = get_shader_module_for_stage(ctx, dirty[i], prog);
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zm = get_shader_module_for_stage(ctx, dirty[i], prog);
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zink_shader_module_reference(zink_screen(ctx->base.screen), &prog->modules[type], zm);
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zink_shader_module_reference(zink_screen(ctx->base.screen), &prog->modules[type], zm);
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/* we probably need a new pipeline when we switch shader modules */
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/* we probably need a new pipeline when we switch shader modules */
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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} else if (stages[type] && !disallow_reuse) /* reuse existing shader module */
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} else if (stages[type] && !disallow_reuse) /* reuse existing shader module */
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zink_shader_module_reference(zink_screen(ctx->base.screen), &prog->modules[type], ctx->curr_program->modules[type]);
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zink_shader_module_reference(zink_screen(ctx->base.screen), &prog->modules[type], ctx->curr_program->modules[type]);
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prog->shaders[type] = stages[type];
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prog->shaders[type] = stages[type];
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@ -559,14 +559,12 @@ zink_get_gfx_pipeline(struct zink_screen *screen,
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struct hash_entry *entry = NULL;
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struct hash_entry *entry = NULL;
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if (!state->hash) {
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if (state->dirty) {
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for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++)
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for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++)
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state->modules[i] = prog->modules[i] ? prog->modules[i]->shader : VK_NULL_HANDLE;
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state->modules[i] = prog->modules[i] ? prog->modules[i]->shader : VK_NULL_HANDLE;
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state->hash = hash_gfx_pipeline_state(state);
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state->hash = hash_gfx_pipeline_state(state);
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/* make sure the hash is not zero, as we take it as invalid.
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state->dirty = false;
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* TODO: rework this using a separate dirty-bit */
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assert(state->hash != 0);
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}
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}
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entry = _mesa_hash_table_search_pre_hashed(prog->pipelines[vkmode], state->hash, state);
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entry = _mesa_hash_table_search_pre_hashed(prog->pipelines[vkmode], state->hash, state);
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@ -583,7 +581,6 @@ zink_get_gfx_pipeline(struct zink_screen *screen,
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memcpy(&pc_entry->state, state, sizeof(*state));
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memcpy(&pc_entry->state, state, sizeof(*state));
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pc_entry->pipeline = pipeline;
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pc_entry->pipeline = pipeline;
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assert(state->hash);
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entry = _mesa_hash_table_insert_pre_hashed(prog->pipelines[vkmode], state->hash, state, pc_entry);
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entry = _mesa_hash_table_insert_pre_hashed(prog->pipelines[vkmode], state->hash, state, pc_entry);
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assert(entry);
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assert(entry);
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@ -84,7 +84,7 @@ zink_bind_vertex_elements_state(struct pipe_context *pctx,
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struct zink_context *ctx = zink_context(pctx);
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struct zink_context *ctx = zink_context(pctx);
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struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
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struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
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ctx->element_state = cso;
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ctx->element_state = cso;
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state->hash = 0;
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state->dirty = true;
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state->divisors_present = 0;
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state->divisors_present = 0;
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if (cso) {
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if (cso) {
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state->element_state = &ctx->element_state->hw_state;
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state->element_state = &ctx->element_state->hw_state;
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@ -270,7 +270,7 @@ zink_bind_blend_state(struct pipe_context *pctx, void *cso)
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if (state->blend_state != cso) {
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if (state->blend_state != cso) {
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state->blend_state = cso;
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state->blend_state = cso;
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state->hash = 0;
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state->dirty = true;
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}
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}
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}
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}
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@ -373,7 +373,7 @@ zink_bind_depth_stencil_alpha_state(struct pipe_context *pctx, void *cso)
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struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
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struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
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if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) {
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if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) {
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state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state;
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state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state;
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state->hash = 0;
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state->dirty = true;
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}
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}
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}
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}
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}
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}
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@ -452,12 +452,12 @@ zink_bind_rasterizer_state(struct pipe_context *pctx, void *cso)
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if (ctx->rast_state) {
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if (ctx->rast_state) {
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if (ctx->gfx_pipeline_state.rast_state != &ctx->rast_state->hw_state) {
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if (ctx->gfx_pipeline_state.rast_state != &ctx->rast_state->hw_state) {
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ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state;
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ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state;
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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}
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}
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if (ctx->line_width != ctx->rast_state->line_width) {
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if (ctx->line_width != ctx->rast_state->line_width) {
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ctx->line_width = ctx->rast_state->line_width;
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ctx->line_width = ctx->rast_state->line_width;
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ctx->gfx_pipeline_state.hash = 0;
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ctx->gfx_pipeline_state.dirty = true;
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}
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}
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}
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}
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}
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}
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