zink: handle 0 as valid pipeline hash value

xxhash can return 0 as a valid hash so it needs to be handled

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8201>

src/gallium/drivers/zink/zink_context.c

@@ -481,7 +481,7 @@ zink_set_vertex_buffers(struct pipe_context *pctx,
             res->needs_xfb_barrier = false;
          }
       }
-      ctx->gfx_pipeline_state.hash = 0;
+      ctx->gfx_pipeline_state.dirty = true;
    }
 
    util_set_vertex_buffers_mask(ctx->buffers, &ctx->buffers_enabled_mask,
@@ -509,7 +509,7 @@ zink_set_viewport_states(struct pipe_context *pctx,
       ctx->viewports[start_slot + i] = viewport;
    }
    if (ctx->gfx_pipeline_state.num_viewports != start_slot + num_viewports)
-      ctx->gfx_pipeline_state.hash = 0;
+      ctx->gfx_pipeline_state.dirty = true;
    ctx->gfx_pipeline_state.num_viewports = start_slot + num_viewports;
 }
 
@@ -804,7 +804,7 @@ zink_set_framebuffer_state(struct pipe_context *pctx,
       ctx->dirty_shader_stages |= 1 << PIPE_SHADER_FRAGMENT;
    ctx->gfx_pipeline_state.rast_samples = rast_samples;
    ctx->gfx_pipeline_state.num_attachments = state->nr_cbufs;
-   ctx->gfx_pipeline_state.hash = 0;
+   ctx->gfx_pipeline_state.dirty = true;
 
    struct zink_batch *batch = zink_batch_no_rp(ctx);
 
@@ -824,7 +824,7 @@ zink_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
 {
    struct zink_context *ctx = zink_context(pctx);
    ctx->gfx_pipeline_state.sample_mask = sample_mask;
-   ctx->gfx_pipeline_state.hash = 0;
+   ctx->gfx_pipeline_state.dirty = true;
 }
 
 static VkAccessFlags
@@ -1265,7 +1265,7 @@ zink_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
    if (!ctx)
       goto fail;
 
-   ctx->gfx_pipeline_state.hash = 0;
+   ctx->gfx_pipeline_state.dirty = true;
 
    ctx->base.screen = pscreen;
    ctx->base.priv = priv;

src/gallium/drivers/zink/zink_draw.c

@@ -249,7 +249,7 @@ zink_draw_vbo(struct pipe_context *pctx,
       return;
 
    if (ctx->gfx_pipeline_state.primitive_restart != !!dinfo->primitive_restart)
-      ctx->gfx_pipeline_state.hash = 0;
+      ctx->gfx_pipeline_state.dirty = true;
    ctx->gfx_pipeline_state.primitive_restart = !!dinfo->primitive_restart;
 
    VkPipeline pipeline = zink_get_gfx_pipeline(screen, gfx_program,

src/gallium/drivers/zink/zink_pipeline.h

@@ -64,6 +64,7 @@ struct zink_gfx_pipeline_state {
    /* Pre-hashed value for table lookup, invalid when zero.
     * Members after this point are not included in pipeline state hash key */
    uint32_t hash;
+   bool dirty;
 };
 
 VkPipeline

src/gallium/drivers/zink/zink_program.c

@@ -334,7 +334,7 @@ update_shader_modules(struct zink_context *ctx, struct zink_shader *stages[ZINK_
          zm = get_shader_module_for_stage(ctx, dirty[i], prog);
          zink_shader_module_reference(zink_screen(ctx->base.screen), &prog->modules[type], zm);
          /* we probably need a new pipeline when we switch shader modules */
-         ctx->gfx_pipeline_state.hash = 0;
+         ctx->gfx_pipeline_state.dirty = true;
       } else if (stages[type] && !disallow_reuse) /* reuse existing shader module */
          zink_shader_module_reference(zink_screen(ctx->base.screen), &prog->modules[type], ctx->curr_program->modules[type]);
       prog->shaders[type] = stages[type];
@@ -559,14 +559,12 @@ zink_get_gfx_pipeline(struct zink_screen *screen,
 
    struct hash_entry *entry = NULL;
    
-   if (!state->hash) {
+   if (state->dirty) {
       for (unsigned i = 0; i < ZINK_SHADER_COUNT; i++)
          state->modules[i] = prog->modules[i] ? prog->modules[i]->shader : VK_NULL_HANDLE;
 
       state->hash = hash_gfx_pipeline_state(state);
-      /* make sure the hash is not zero, as we take it as invalid.
-       * TODO: rework this using a separate dirty-bit */
-      assert(state->hash != 0);
+      state->dirty = false;
    }
    entry = _mesa_hash_table_search_pre_hashed(prog->pipelines[vkmode], state->hash, state);
 
@@ -583,7 +581,6 @@ zink_get_gfx_pipeline(struct zink_screen *screen,
       memcpy(&pc_entry->state, state, sizeof(*state));
       pc_entry->pipeline = pipeline;
 
-      assert(state->hash);
       entry = _mesa_hash_table_insert_pre_hashed(prog->pipelines[vkmode], state->hash, state, pc_entry);
       assert(entry);
 

src/gallium/drivers/zink/zink_state.c

@@ -84,7 +84,7 @@ zink_bind_vertex_elements_state(struct pipe_context *pctx,
    struct zink_context *ctx = zink_context(pctx);
    struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
    ctx->element_state = cso;
-   state->hash = 0;
+   state->dirty = true;
    state->divisors_present = 0;
    if (cso) {
       state->element_state = &ctx->element_state->hw_state;
@@ -270,7 +270,7 @@ zink_bind_blend_state(struct pipe_context *pctx, void *cso)
 
    if (state->blend_state != cso) {
       state->blend_state = cso;
-      state->hash = 0;
+      state->dirty = true;
    }
 }
 
@@ -373,7 +373,7 @@ zink_bind_depth_stencil_alpha_state(struct pipe_context *pctx, void *cso)
       struct zink_gfx_pipeline_state *state = &ctx->gfx_pipeline_state;
       if (state->depth_stencil_alpha_state != &ctx->dsa_state->hw_state) {
          state->depth_stencil_alpha_state = &ctx->dsa_state->hw_state;
-         state->hash = 0;
+         state->dirty = true;
       }
    }
 }
@@ -452,12 +452,12 @@ zink_bind_rasterizer_state(struct pipe_context *pctx, void *cso)
    if (ctx->rast_state) {
       if (ctx->gfx_pipeline_state.rast_state != &ctx->rast_state->hw_state) {
          ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state;
-         ctx->gfx_pipeline_state.hash = 0;
+         ctx->gfx_pipeline_state.dirty = true;
       }
 
       if (ctx->line_width != ctx->rast_state->line_width) {
          ctx->line_width = ctx->rast_state->line_width;
-         ctx->gfx_pipeline_state.hash = 0;
+         ctx->gfx_pipeline_state.dirty = true;
       }
    }
 }