From 2301705dee6324634520559b27ac6728ebb02191 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Wed, 24 Aug 2016 17:14:11 -0700 Subject: [PATCH] anv: Include the pipeline layout in the shader hash MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pipeline layout affects shader compilation because it is what determines binding table locations as well as whether or not a particular buffer has dynamic offsets. Since this affects the generated shader, it needs to be in the hash. This fixes a bunch of CTS tests now that the CTS is using a pipeline cache. Signed-off-by: Jason Ekstrand Reviewed-by: Kristian Høgsberg Cc: "12.0" --- src/intel/vulkan/anv_descriptor_set.c | 24 ++++++++++++++++++++++++ src/intel/vulkan/anv_pipeline.c | 12 ++++++++---- src/intel/vulkan/anv_pipeline_cache.c | 5 +++++ src/intel/vulkan/anv_private.h | 3 +++ 4 files changed, 40 insertions(+), 4 deletions(-) diff --git a/src/intel/vulkan/anv_descriptor_set.c b/src/intel/vulkan/anv_descriptor_set.c index bd3ebed6610..cf1fe15d3c2 100644 --- a/src/intel/vulkan/anv_descriptor_set.c +++ b/src/intel/vulkan/anv_descriptor_set.c @@ -27,6 +27,8 @@ #include #include +#include "util/mesa-sha1.h" + #include "anv_private.h" /* @@ -202,6 +204,15 @@ void anv_DestroyDescriptorSetLayout( anv_free2(&device->alloc, pAllocator, set_layout); } +static void +sha1_update_descriptor_set_layout(struct mesa_sha1 *ctx, + const struct anv_descriptor_set_layout *layout) +{ + size_t size = sizeof(*layout) + + sizeof(layout->binding[0]) * layout->binding_count; + _mesa_sha1_update(ctx, layout, size); +} + /* * Pipeline layouts. These have nothing to do with the pipeline. They are * just muttiple descriptor set layouts pasted together @@ -246,6 +257,19 @@ VkResult anv_CreatePipelineLayout( } } + struct mesa_sha1 *ctx = _mesa_sha1_init(); + for (unsigned s = 0; s < layout->num_sets; s++) { + sha1_update_descriptor_set_layout(ctx, layout->set[s].layout); + _mesa_sha1_update(ctx, &layout->set[s].dynamic_offset_start, + sizeof(layout->set[s].dynamic_offset_start)); + } + _mesa_sha1_update(ctx, &layout->num_sets, sizeof(layout->num_sets)); + for (unsigned s = 0; s < MESA_SHADER_STAGES; s++) { + _mesa_sha1_update(ctx, &layout->stage[s].has_dynamic_offsets, + sizeof(layout->stage[s].has_dynamic_offsets)); + } + _mesa_sha1_final(ctx, layout->sha1); + *pPipelineLayout = anv_pipeline_layout_to_handle(layout); return VK_SUCCESS; diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 57e1bddd44f..48d267b9181 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -423,7 +423,8 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline, populate_vs_prog_key(&pipeline->device->info, &key); if (module->size > 0) { - anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, spec_info); + anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, + pipeline->layout, spec_info); kernel = anv_pipeline_cache_search(cache, sha1, &stage_prog_data, &map); } @@ -511,7 +512,8 @@ anv_pipeline_compile_gs(struct anv_pipeline *pipeline, populate_gs_prog_key(&pipeline->device->info, &key); if (module->size > 0) { - anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, spec_info); + anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, + pipeline->layout, spec_info); kernel = anv_pipeline_cache_search(cache, sha1, &stage_prog_data, &map); } @@ -590,7 +592,8 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline, populate_wm_prog_key(&pipeline->device->info, info, extra, &key); if (module->size > 0) { - anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, spec_info); + anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, + pipeline->layout, spec_info); pipeline->ps_ksp0 = anv_pipeline_cache_search(cache, sha1, &stage_prog_data, &map); } @@ -720,7 +723,8 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline, populate_cs_prog_key(&pipeline->device->info, &key); if (module->size > 0) { - anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, spec_info); + anv_hash_shader(sha1, &key, sizeof(key), module, entrypoint, + pipeline->layout, spec_info); kernel = anv_pipeline_cache_search(cache, sha1, &stage_prog_data, &map); } diff --git a/src/intel/vulkan/anv_pipeline_cache.c b/src/intel/vulkan/anv_pipeline_cache.c index 6af15d440c4..3f111a1e4b7 100644 --- a/src/intel/vulkan/anv_pipeline_cache.c +++ b/src/intel/vulkan/anv_pipeline_cache.c @@ -104,6 +104,7 @@ void anv_hash_shader(unsigned char *hash, const void *key, size_t key_size, struct anv_shader_module *module, const char *entrypoint, + const struct anv_pipeline_layout *pipeline_layout, const VkSpecializationInfo *spec_info) { struct mesa_sha1 *ctx; @@ -112,6 +113,10 @@ anv_hash_shader(unsigned char *hash, const void *key, size_t key_size, _mesa_sha1_update(ctx, key, key_size); _mesa_sha1_update(ctx, module->sha1, sizeof(module->sha1)); _mesa_sha1_update(ctx, entrypoint, strlen(entrypoint)); + if (pipeline_layout) { + _mesa_sha1_update(ctx, pipeline_layout->sha1, + sizeof(pipeline_layout->sha1)); + } /* hash in shader stage, pipeline layout? */ if (spec_info) { _mesa_sha1_update(ctx, spec_info->pMapEntries, diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index d8a9d8782fe..f03dba04a2a 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1063,6 +1063,8 @@ struct anv_pipeline_layout { struct { bool has_dynamic_offsets; } stage[MESA_SHADER_STAGES]; + + unsigned char sha1[20]; }; struct anv_buffer { @@ -1428,6 +1430,7 @@ struct anv_shader_module { void anv_hash_shader(unsigned char *hash, const void *key, size_t key_size, struct anv_shader_module *module, const char *entrypoint, + const struct anv_pipeline_layout *pipeline_layout, const VkSpecializationInfo *spec_info); static inline gl_shader_stage