radeonsi: emit TGSI_OPCODE_CLOCK
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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@ -3157,6 +3157,25 @@ static void membar_emit(
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emit_waitcnt(ctx, waitcnt);
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emit_waitcnt(ctx, waitcnt);
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}
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}
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static void clock_emit(
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const struct lp_build_tgsi_action *action,
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struct lp_build_tgsi_context *bld_base,
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struct lp_build_emit_data *emit_data)
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{
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct gallivm_state *gallivm = &ctx->gallivm;
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LLVMValueRef tmp;
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tmp = lp_build_intrinsic(gallivm->builder, "llvm.readcyclecounter",
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ctx->i64, NULL, 0, 0);
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tmp = LLVMBuildBitCast(gallivm->builder, tmp, ctx->v2i32, "");
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emit_data->output[0] =
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LLVMBuildExtractElement(gallivm->builder, tmp, ctx->i32_0, "");
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emit_data->output[1] =
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LLVMBuildExtractElement(gallivm->builder, tmp, ctx->i32_1, "");
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}
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static LLVMValueRef
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static LLVMValueRef
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shader_buffer_fetch_rsrc(struct si_shader_context *ctx,
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shader_buffer_fetch_rsrc(struct si_shader_context *ctx,
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const struct tgsi_full_src_register *reg)
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const struct tgsi_full_src_register *reg)
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@ -6548,6 +6567,8 @@ static void si_init_shader_ctx(struct si_shader_context *ctx,
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bld_base->op_actions[TGSI_OPCODE_MEMBAR].emit = membar_emit;
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bld_base->op_actions[TGSI_OPCODE_MEMBAR].emit = membar_emit;
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bld_base->op_actions[TGSI_OPCODE_CLOCK].emit = clock_emit;
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bld_base->op_actions[TGSI_OPCODE_DDX].emit = si_llvm_emit_ddxy;
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bld_base->op_actions[TGSI_OPCODE_DDX].emit = si_llvm_emit_ddxy;
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bld_base->op_actions[TGSI_OPCODE_DDY].emit = si_llvm_emit_ddxy;
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bld_base->op_actions[TGSI_OPCODE_DDY].emit = si_llvm_emit_ddxy;
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bld_base->op_actions[TGSI_OPCODE_DDX_FINE].emit = si_llvm_emit_ddxy;
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bld_base->op_actions[TGSI_OPCODE_DDX_FINE].emit = si_llvm_emit_ddxy;
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