radv/ac: add initial pre-pass for shader info gathering
There is some radv specific info we need to gather from shaders before we get into converting nir->llvm, so we can make better decisions especially around user sgpr allocation. This is just an initial placeholder to gather if sample positions are required in the frag shader. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -45,6 +45,8 @@ AMD_COMPILER_FILES = \
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common/ac_llvm_build.c \
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common/ac_llvm_build.h \
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common/ac_llvm_helper.cpp \
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common/ac_shader_info.c \
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common/ac_shader_info.h \
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common/ac_llvm_util.c \
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common/ac_llvm_util.h
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@ -30,7 +30,7 @@
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#include "../vulkan/radv_descriptor_set.h"
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#include "util/bitscan.h"
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#include <llvm-c/Transforms/Scalar.h>
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#include "ac_shader_info.h"
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enum radeon_llvm_calling_convention {
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RADEON_LLVM_AMDGPU_VS = 87,
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RADEON_LLVM_AMDGPU_GS = 88,
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@ -680,7 +680,8 @@ static void create_function(struct nir_to_llvm_context *ctx)
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arg_types[arg_idx++] = ctx->i32; // GS instance id
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break;
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case MESA_SHADER_FRAGMENT:
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arg_types[arg_idx++] = ctx->i32; /* sample position offset */
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if (ctx->shader_info->info.ps.needs_sample_positions)
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arg_types[arg_idx++] = ctx->i32; /* sample position offset */
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user_sgpr_count = arg_idx;
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arg_types[arg_idx++] = ctx->i32; /* prim mask */
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sgpr_count = arg_idx;
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@ -845,9 +846,11 @@ static void create_function(struct nir_to_llvm_context *ctx)
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ctx->gs_invocation_id = LLVMGetParam(ctx->main_function, arg_idx++);
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break;
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case MESA_SHADER_FRAGMENT:
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set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS_OFFSET, user_sgpr_idx, 1);
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user_sgpr_idx += 1;
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ctx->sample_pos_offset = LLVMGetParam(ctx->main_function, arg_idx++);
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if (ctx->shader_info->info.ps.needs_sample_positions) {
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set_userdata_location_shader(ctx, AC_UD_PS_SAMPLE_POS_OFFSET, user_sgpr_idx, 1);
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user_sgpr_idx += 1;
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ctx->sample_pos_offset = LLVMGetParam(ctx->main_function, arg_idx++);
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}
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ctx->prim_mask = LLVMGetParam(ctx->main_function, arg_idx++);
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ctx->persp_sample = LLVMGetParam(ctx->main_function, arg_idx++);
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ctx->persp_center = LLVMGetParam(ctx->main_function, arg_idx++);
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@ -3528,7 +3531,6 @@ static LLVMValueRef load_sample_position(struct nir_to_llvm_context *ctx,
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sample_id = LLVMBuildAdd(ctx->builder, sample_id, ctx->sample_pos_offset, "");
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result = ac_build_indexed_load(&ctx->ac, ptr, sample_id, false);
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ctx->shader_info->fs.uses_sample_positions = true;
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return result;
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}
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@ -5703,6 +5705,8 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
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memset(shader_info, 0, sizeof(*shader_info));
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ac_nir_shader_info_pass(nir, options, &shader_info->info);
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LLVMSetTarget(ctx.module, options->supports_spill ? "amdgcn-mesa-mesa3d" : "amdgcn--");
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LLVMTargetDataRef data_layout = LLVMCreateTargetDataLayout(tm);
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@ -29,7 +29,7 @@
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#include "llvm-c/TargetMachine.h"
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#include "amd_family.h"
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#include "../vulkan/radv_descriptor_set.h"
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#include "ac_shader_info.h"
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#include "shader_enums.h"
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struct ac_shader_binary;
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struct ac_shader_config;
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@ -138,6 +138,7 @@ struct ac_es_output_info {
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struct ac_shader_variant_info {
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struct ac_userdata_locations user_sgprs_locs;
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struct ac_shader_info info;
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unsigned num_user_sgprs;
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unsigned num_input_sgprs;
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unsigned num_input_vgprs;
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@ -166,7 +167,6 @@ struct ac_shader_variant_info {
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bool force_persample;
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bool prim_id_input;
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bool layer_input;
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bool uses_sample_positions;
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} fs;
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struct {
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unsigned block_size[3];
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@ -0,0 +1,61 @@
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/*
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* Copyright © 2017 Red Hat
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "ac_shader_info.h"
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#include "ac_nir_to_llvm.h"
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static void
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gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info)
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{
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switch (instr->intrinsic) {
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case nir_intrinsic_interp_var_at_sample:
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info->ps.needs_sample_positions = true;
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break;
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default:
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break;
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}
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}
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static void
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gather_info_block(nir_block *block, struct ac_shader_info *info)
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{
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nir_foreach_instr(instr, block) {
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switch (instr->type) {
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case nir_instr_type_intrinsic:
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gather_intrinsic_info(nir_instr_as_intrinsic(instr), info);
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break;
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default:
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break;
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}
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}
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}
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void
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ac_nir_shader_info_pass(struct nir_shader *nir,
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const struct ac_nir_compiler_options *options,
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struct ac_shader_info *info)
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{
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struct nir_function *func = (struct nir_function *)exec_list_get_head(&nir->functions);
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nir_foreach_block(block, func->impl) {
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gather_info_block(block, info);
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}
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}
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@ -0,0 +1,40 @@
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/*
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* Copyright © 2017 Red Hat
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef AC_SHADER_INFO_H
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#define AC_SHADER_INFO_H
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struct nir_shader;
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struct ac_nir_compiler_options;
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/* a NIR pass to gather all the info needed to optimise the alloction patterns for the RADV user sgprs */
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struct ac_shader_info {
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struct {
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bool needs_sample_positions;
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} ps;
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};
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void
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ac_nir_shader_info_pass(struct nir_shader *nir,
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const struct ac_nir_compiler_options *options,
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struct ac_shader_info *info);
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#endif
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@ -454,7 +454,7 @@ radv_update_multisample_state(struct radv_cmd_buffer *cmd_buffer,
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radv_cayman_emit_msaa_sample_locs(cmd_buffer->cs, num_samples);
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if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.uses_sample_positions) {
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if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.needs_sample_positions) {
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uint32_t offset;
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struct ac_userdata_info *loc = radv_lookup_user_sgpr(pipeline, MESA_SHADER_FRAGMENT, AC_UD_PS_SAMPLE_POS_OFFSET);
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uint32_t base_reg = shader_stage_to_user_data_0(MESA_SHADER_FRAGMENT, radv_pipeline_has_gs(pipeline), radv_pipeline_has_tess(pipeline));
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