etnaviv: avoid using RS for 64bpp formats
At the same time, this change allows using BLT for 8bpp formats Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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@ -351,17 +351,13 @@ etna_resource_create(struct pipe_screen *pscreen,
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* and a texture-compatible base buffer in other cases
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* and a texture-compatible base buffer in other cases
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*
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*
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*/
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*/
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if (templat->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_DEPTH_STENCIL)) {
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if (templat->bind & (PIPE_BIND_SCANOUT | PIPE_BIND_DEPTH_STENCIL)) {
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if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
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if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
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layout |= ETNA_LAYOUT_BIT_MULTI;
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layout |= ETNA_LAYOUT_BIT_MULTI;
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if (screen->specs.can_supertile)
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if (screen->specs.can_supertile)
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layout |= ETNA_LAYOUT_BIT_SUPER;
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layout |= ETNA_LAYOUT_BIT_SUPER;
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} else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&
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} else if (VIV_FEATURE(screen, chipMinorFeatures2, SUPERTILED_TEXTURE) &&
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/* RS can't tile 1 byte per pixel formats, will have to CPU tile,
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etna_resource_hw_tileable(screen->specs.use_blt, templat)) {
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* which doesn't support super-tiling
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*/
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util_format_get_blocksize(templat->format) > 1) {
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layout |= ETNA_LAYOUT_BIT_SUPER;
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layout |= ETNA_LAYOUT_BIT_SUPER;
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}
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}
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@ -30,6 +30,7 @@
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#include "etnaviv_internal.h"
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#include "etnaviv_internal.h"
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#include "etnaviv_tiling.h"
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#include "etnaviv_tiling.h"
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#include "pipe/p_state.h"
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#include "pipe/p_state.h"
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#include "util/format/u_format.h"
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#include "util/list.h"
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#include "util/list.h"
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#include "util/set.h"
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#include "util/set.h"
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#include "util/u_helpers.h"
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#include "util/u_helpers.h"
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@ -132,6 +133,17 @@ etna_resource_sampler_only(const struct pipe_resource *pres)
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PIPE_BIND_SAMPLER_VIEW;
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PIPE_BIND_SAMPLER_VIEW;
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}
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}
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static inline bool
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etna_resource_hw_tileable(bool use_blt, const struct pipe_resource *pres)
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{
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if (use_blt)
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return true;
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/* RS can only tile 16bpp or 32bpp formats */
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return util_format_get_blocksize(pres->format) == 2 ||
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util_format_get_blocksize(pres->format) == 4;
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}
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static inline struct etna_resource *
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static inline struct etna_resource *
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etna_resource(struct pipe_resource *p)
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etna_resource(struct pipe_resource *p)
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{
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{
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@ -247,7 +247,7 @@ etna_transfer_map(struct pipe_context *pctx, struct pipe_resource *prsc,
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rsc = etna_resource(rsc->texture);
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rsc = etna_resource(rsc->texture);
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} else if (rsc->ts_bo ||
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} else if (rsc->ts_bo ||
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(rsc->layout != ETNA_LAYOUT_LINEAR &&
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(rsc->layout != ETNA_LAYOUT_LINEAR &&
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util_format_get_blocksize(format) > 1 &&
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etna_resource_hw_tileable(ctx->specs.use_blt, prsc) &&
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/* HALIGN 4 resources are incompatible with the resolve engine,
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/* HALIGN 4 resources are incompatible with the resolve engine,
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* so fall back to using software to detile this resource. */
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* so fall back to using software to detile this resource. */
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rsc->halign != TEXTURE_HALIGN_FOUR)) {
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rsc->halign != TEXTURE_HALIGN_FOUR)) {
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