intel/clc: fixup shared memory offsets

We're running the io lowering twice so need to reset some fields so
the offset don't go over what is really needed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15486>
This commit is contained in:
Lionel Landwerlin 2022-02-03 17:31:06 +02:00 committed by Marge Bot
parent de9c2312ea
commit 21aa1d3de1
1 changed files with 2 additions and 0 deletions

View File

@ -397,7 +397,9 @@ brw_kernel_from_spirv(struct brw_compiler *compiler,
/* Lower again, this time after dead-variables to get more compact variable
* layouts.
*/
nir->global_mem_size = 0;
nir->scratch_size = 0;
nir->info.shared_size = 0;
NIR_PASS_V(nir, nir_lower_vars_to_explicit_types,
nir_var_shader_temp | nir_var_function_temp |
nir_var_mem_shared | nir_var_mem_global | nir_var_mem_constant,