KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ilo: use shorter names for dirty flags 

The new names match those of ilo_context's members respectively, and are
shorter.
This commit is contained in:
Chia-I Wu 2013-06-27 15:17:08 +08:00
parent cabc7b44c0
commit 20c691b936
7 changed files with 138 additions and 141 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/ilo/ilo_3d.c
View File

@ -386,10 +386,10 @@ draw_vbo(struct ilo_3d *hw3d, const struct ilo_context *ilo,
* happens in the middle of a batch buffer, we need to insert manual
* flushes.
*/
need_flush = (ilo->dirty & ILO_DIRTY_FRAMEBUFFER);
need_flush = (ilo->dirty & ILO_DIRTY_FB);
/* same to SO target changes */
need_flush |= (ilo->dirty & ILO_DIRTY_STREAM_OUTPUT_TARGETS);
need_flush |= (ilo->dirty & ILO_DIRTY_SO);
}
/* make sure there is enough room first */

2
src/gallium/drivers/ilo/ilo_3d_pipeline.c
View File

@ -153,7 +153,7 @@ ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
{
bool success;
if (ilo->dirty & ILO_DIRTY_STREAM_OUTPUT_TARGETS &&
if (ilo->dirty & ILO_DIRTY_SO &&
ilo->so.enabled && !ilo->so.append_bitmask) {
/*
* We keep track of the SVBI in the driver, so that we can restore it

51
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
View File

@ -263,7 +263,7 @@ gen6_pipeline_common_urb(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_URB */
if (DIRTY(VERTEX_ELEMENTS) || DIRTY(VS) || DIRTY(GS)) {
if (DIRTY(VE) || DIRTY(VS) || DIRTY(GS)) {
const bool gs_active = (ilo->gs || (ilo->vs &&
ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_VS_GEN6_SO)));
int vs_entry_size, gs_entry_size;
@ -399,21 +399,20 @@ gen6_pipeline_vf(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_INDEX_BUFFER */
if (DIRTY(INDEX_BUFFER) || session->primitive_restart_changed ||
if (DIRTY(IB) || session->primitive_restart_changed ||
session->batch_bo_changed) {
p->gen6_3DSTATE_INDEX_BUFFER(p->dev,
&ilo->ib, ilo->draw->primitive_restart, p->cp);
}
/* 3DSTATE_VERTEX_BUFFERS */
if (DIRTY(VERTEX_BUFFERS) || DIRTY(VERTEX_ELEMENTS) ||
session->batch_bo_changed) {
if (DIRTY(VB) || DIRTY(VE) || session->batch_bo_changed) {
p->gen6_3DSTATE_VERTEX_BUFFERS(p->dev,
ilo->vb.states, ilo->vb.enabled_mask, ilo->ve, p->cp);
}
/* 3DSTATE_VERTEX_ELEMENTS */
if (DIRTY(VERTEX_ELEMENTS) || DIRTY(VS)) {
if (DIRTY(VE) || DIRTY(VS)) {
const struct ilo_ve_state *ve = ilo->ve;
bool last_velement_edgeflag = false;
bool prepend_generate_ids = false;
@ -465,7 +464,7 @@ gen6_pipeline_vs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
struct gen6_pipeline_session *session)
{
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(VERTEX_SAMPLERS) ||
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS) ||
session->kernel_bo_changed);
const bool emit_3dstate_constant_vs = session->pcb_state_vs_changed;
@ -518,7 +517,7 @@ gen6_pipeline_update_max_svbi(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
struct gen6_pipeline_session *session)
{
if (DIRTY(VS) || DIRTY(GS) || DIRTY(STREAM_OUTPUT_TARGETS)) {
if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
const struct pipe_stream_output_info *so_info =
(ilo->gs) ? ilo_shader_get_kernel_so_info(ilo->gs) :
(ilo->vs) ? ilo_shader_get_kernel_so_info(ilo->vs) : NULL;
@ -599,8 +598,7 @@ gen6_pipeline_clip(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CLIP */
if (DIRTY(RASTERIZER) || DIRTY(FS) ||
DIRTY(VIEWPORT) || DIRTY(FRAMEBUFFER)) {
if (DIRTY(RASTERIZER) || DIRTY(FS) || DIRTY(VIEWPORT) || DIRTY(FB)) {
bool enable_guardband = true;
unsigned i;
@ -641,7 +639,7 @@ gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_DRAWING_RECTANGLE */
if (DIRTY(FRAMEBUFFER)) {
if (DIRTY(FB)) {
if (p->dev->gen == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
@ -660,8 +658,7 @@ gen6_pipeline_wm(struct ilo_3d_pipeline *p,
p->gen6_3DSTATE_CONSTANT_PS(p->dev, NULL, NULL, 0, p->cp);
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(FRAGMENT_SAMPLERS) ||
DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) || DIRTY(DSA) ||
DIRTY(RASTERIZER) || session->kernel_bo_changed) {
const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = ilo->blend->dual_blend;
@ -682,7 +679,7 @@ gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
if (DIRTY(SAMPLE_MASK) || DIRTY(FRAMEBUFFER)) {
if (DIRTY(SAMPLE_MASK) || DIRTY(FB)) {
const uint32_t *packed_sample_pos;
packed_sample_pos = (ilo->fb.num_samples > 1) ?
@ -708,7 +705,7 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
if (DIRTY(FRAMEBUFFER) || session->batch_bo_changed) {
if (DIRTY(FB) || session->batch_bo_changed) {
const struct ilo_zs_surface *zs;
if (ilo->fb.state.zsbuf) {
@ -806,7 +803,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* BLEND_STATE */
if (DIRTY(BLEND) || DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA)) {
if (DIRTY(BLEND) || DIRTY(FB) || DIRTY(DSA)) {
p->state.BLEND_STATE = p->gen6_BLEND_STATE(p->dev,
ilo->blend, &ilo->fb, &ilo->dsa->alpha, p->cp);
@ -814,7 +811,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
}
/* COLOR_CALC_STATE */
if (DIRTY(DEPTH_STENCIL_ALPHA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
if (DIRTY(DSA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
p->state.COLOR_CALC_STATE =
p->gen6_COLOR_CALC_STATE(p->dev, &ilo->stencil_ref,
ilo->dsa->alpha.ref_value, &ilo->blend_color, p->cp);
@ -823,7 +820,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
}
/* DEPTH_STENCIL_STATE */
if (DIRTY(DEPTH_STENCIL_ALPHA)) {
if (DIRTY(DSA)) {
p->state.DEPTH_STENCIL_STATE =
p->gen6_DEPTH_STENCIL_STATE(p->dev, ilo->dsa, p->cp);
@ -852,7 +849,7 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* SURFACE_STATEs for render targets */
if (DIRTY(FRAMEBUFFER)) {
if (DIRTY(FB)) {
const int offset = ILO_WM_DRAW_SURFACE(0);
uint32_t *surface_state = &p->state.wm.SURFACE_STATE[offset];
int i;
@ -905,7 +902,7 @@ gen6_pipeline_state_surfaces_so(struct ilo_3d_pipeline *p,
return;
/* SURFACE_STATEs for stream output targets */
if (DIRTY(VS) || DIRTY(GS) || DIRTY(STREAM_OUTPUT_TARGETS)) {
if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
const struct pipe_stream_output_info *so_info =
(ilo->gs) ? ilo_shader_get_kernel_so_info(ilo->gs) :
(ilo->vs) ? ilo_shader_get_kernel_so_info(ilo->vs) : NULL;
@ -952,7 +949,7 @@ gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
/* SURFACE_STATEs for sampler views */
switch (shader_type) {
case PIPE_SHADER_VERTEX:
if (DIRTY(VERTEX_SAMPLER_VIEWS)) {
if (DIRTY(VIEW_VS)) {
offset = ILO_VS_TEXTURE_SURFACE(0);
surface_state = &p->state.vs.SURFACE_STATE[offset];
@ -963,7 +960,7 @@ gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
}
break;
case PIPE_SHADER_FRAGMENT:
if (DIRTY(FRAGMENT_SAMPLER_VIEWS)) {
if (DIRTY(VIEW_FS)) {
offset = ILO_WM_TEXTURE_SURFACE(0);
surface_state = &p->state.wm.SURFACE_STATE[offset];
@ -1015,7 +1012,7 @@ gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
/* SURFACE_STATEs for constant buffers */
switch (shader_type) {
case PIPE_SHADER_VERTEX:
if (DIRTY(CONSTANT_BUFFER)) {
if (DIRTY(CBUF)) {
offset = ILO_VS_CONST_SURFACE(0);
surface_state = &p->state.vs.SURFACE_STATE[offset];
@ -1026,7 +1023,7 @@ gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
}
break;
case PIPE_SHADER_FRAGMENT:
if (DIRTY(CONSTANT_BUFFER)) {
if (DIRTY(CBUF)) {
offset = ILO_WM_CONST_SURFACE(0);
surface_state = &p->state.wm.SURFACE_STATE[offset];
@ -1140,11 +1137,11 @@ gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
/* SAMPLER_BORDER_COLOR_STATE and SAMPLER_STATE */
switch (shader_type) {
case PIPE_SHADER_VERTEX:
if (DIRTY(VERTEX_SAMPLERS) || DIRTY(VERTEX_SAMPLER_VIEWS)) {
if (DIRTY(SAMPLER_VS) || DIRTY(VIEW_VS)) {
sampler_state = &p->state.vs.SAMPLER_STATE;
border_color_state = p->state.vs.SAMPLER_BORDER_COLOR_STATE;
if (DIRTY(VERTEX_SAMPLERS))
if (DIRTY(SAMPLER_VS))
emit_border_color = true;
session->sampler_state_vs_changed = true;
@ -1154,11 +1151,11 @@ gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
}
break;
case PIPE_SHADER_FRAGMENT:
if (DIRTY(FRAGMENT_SAMPLERS) || DIRTY(FRAGMENT_SAMPLER_VIEWS)) {
if (DIRTY(SAMPLER_FS) || DIRTY(VIEW_FS)) {
sampler_state = &p->state.wm.SAMPLER_STATE;
border_color_state = p->state.wm.SAMPLER_BORDER_COLOR_STATE;
if (DIRTY(FRAGMENT_SAMPLERS))
if (DIRTY(SAMPLER_FS))
emit_border_color = true;
session->sampler_state_fs_changed = true;

31
src/gallium/drivers/ilo/ilo_3d_pipeline_gen7.c
View File

@ -186,7 +186,7 @@ gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_URB_{VS,GS,HS,DS} */
if (DIRTY(VERTEX_ELEMENTS) || DIRTY(VS)) {
if (DIRTY(VE) || DIRTY(VS)) {
/* the first 16KB are reserved for VS and PS PCBs */
const int offset = 16 * 1024;
int vs_entry_size, vs_total_size;
@ -288,7 +288,7 @@ gen7_pipeline_vs(struct ilo_3d_pipeline *p,
const bool emit_3dstate_sampler_state = session->sampler_state_vs_changed;
/* see gen6_pipeline_vs() */
const bool emit_3dstate_constant_vs = session->pcb_state_vs_changed;
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(VERTEX_SAMPLERS));
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS));
/* emit depth stall before any of the VS commands */
if (emit_3dstate_binding_table || emit_3dstate_sampler_state ||
@ -394,8 +394,8 @@ gen7_pipeline_sol(struct ilo_3d_pipeline *p,
gen6_pipeline_update_max_svbi(p, ilo, session);
/* 3DSTATE_SO_BUFFER */
if ((DIRTY(STREAM_OUTPUT_TARGETS) || dirty_sh ||
session->batch_bo_changed) && ilo->so.enabled) {
if ((DIRTY(SO) || dirty_sh || session->batch_bo_changed) &&
ilo->so.enabled) {
int i;
for (i = 0; i < ilo->so.count; i++) {
@ -421,7 +421,7 @@ gen7_pipeline_sol(struct ilo_3d_pipeline *p,
p->gen7_3DSTATE_SO_DECL_LIST(p->dev, so_info, p->cp);
/* 3DSTATE_STREAMOUT */
if (DIRTY(STREAM_OUTPUT_TARGETS) || DIRTY(RASTERIZER) || dirty_sh) {
if (DIRTY(SO) || DIRTY(RASTERIZER) || dirty_sh) {
const unsigned buffer_mask = (1 << ilo->so.count) - 1;
const int output_count = ilo_shader_get_kernel_param(shader,
ILO_KERNEL_OUTPUT_COUNT);
@ -443,7 +443,7 @@ gen7_pipeline_sf(struct ilo_3d_pipeline *p,
}
/* 3DSTATE_SF */
if (DIRTY(RASTERIZER) || DIRTY(FRAMEBUFFER)) {
if (DIRTY(RASTERIZER) || DIRTY(FB)) {
gen7_wa_pipe_control_cs_stall(p, true, true);
p->gen7_3DSTATE_SF(p->dev, ilo->rasterizer, ilo->fb.state.zsbuf, p->cp);
}
@ -455,8 +455,7 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
DIRTY(RASTERIZER)) {
if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DSA) || DIRTY(RASTERIZER)) {
const bool cc_may_kill = (ilo->dsa->alpha.enabled ||
ilo->blend->alpha_to_coverage);
@ -484,8 +483,8 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
p->gen6_3DSTATE_CONSTANT_PS(p->dev, NULL, NULL, 0, p->cp);
/* 3DSTATE_PS */
if (DIRTY(FS) || DIRTY(FRAGMENT_SAMPLERS) ||
DIRTY(BLEND) || session->kernel_bo_changed) {
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) ||
session->kernel_bo_changed) {
const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = ilo->blend->dual_blend;
@ -500,12 +499,10 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
/* XXX what is the best way to know if this workaround is needed? */
{
const bool emit_3dstate_ps = (DIRTY(FS) ||
DIRTY(FRAGMENT_SAMPLERS) ||
DIRTY(BLEND));
const bool emit_3dstate_ps =
(DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND));
const bool emit_3dstate_depth_buffer =
(DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA) ||
session->state_bo_changed);
(DIRTY(FB) || DIRTY(DSA) || session->state_bo_changed);
if (emit_3dstate_ps ||
emit_3dstate_depth_buffer ||
@ -520,7 +517,7 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
}
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
if (DIRTY(FRAMEBUFFER) || session->batch_bo_changed) {
if (DIRTY(FB) || session->batch_bo_changed) {
const struct ilo_zs_surface *zs;
if (ilo->fb.state.zsbuf) {
@ -549,7 +546,7 @@ gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
if (DIRTY(SAMPLE_MASK) || DIRTY(FRAMEBUFFER)) {
if (DIRTY(SAMPLE_MASK) || DIRTY(FB)) {
const uint32_t *packed_sample_pos;
gen7_wa_pipe_control_cs_stall(p, true, true);

8
src/gallium/drivers/ilo/ilo_shader.c
View File

@ -746,7 +746,7 @@ ilo_shader_create_vs(const struct ilo_dev_info *dev,
shader = ilo_shader_state_create(precompile, PIPE_SHADER_VERTEX, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VERTEX_SAMPLER_VIEWS |
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_VS |
ILO_DIRTY_RASTERIZER;
return shader;
@ -762,7 +762,7 @@ ilo_shader_create_gs(const struct ilo_dev_info *dev,
shader = ilo_shader_state_create(precompile, PIPE_SHADER_GEOMETRY, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_GEOMETRY_SAMPLER_VIEWS |
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_GS |
ILO_DIRTY_VS |
ILO_DIRTY_RASTERIZER;
@ -779,9 +779,9 @@ ilo_shader_create_fs(const struct ilo_dev_info *dev,
shader = ilo_shader_state_create(precompile, PIPE_SHADER_FRAGMENT, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_FRAGMENT_SAMPLER_VIEWS |
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_FS |
ILO_DIRTY_RASTERIZER |
ILO_DIRTY_FRAMEBUFFER;
ILO_DIRTY_FB;
return shader;
}

64
src/gallium/drivers/ilo/ilo_state.c
View File

@ -89,7 +89,7 @@ finalize_constant_buffers(struct ilo_context *ilo)
{
int sh;
if (!(ilo->dirty & ILO_DIRTY_CONSTANT_BUFFER))
if (!(ilo->dirty & ILO_DIRTY_CBUF))
return;
/* TODO push constants? */
@ -161,7 +161,7 @@ finalize_index_buffer(struct ilo_context *ilo)
/* could be negative */
ilo->ib.draw_start_offset -= ilo->draw->start;
ilo->dirty |= ILO_DIRTY_INDEX_BUFFER;
ilo->dirty |= ILO_DIRTY_IB;
}
}
@ -284,7 +284,7 @@ ilo_bind_fragment_sampler_states(struct pipe_context *pipe,
struct ilo_context *ilo = ilo_context(pipe);
bind_samplers(ilo, PIPE_SHADER_FRAGMENT, 0, num_samplers, samplers, true);
ilo->dirty |= ILO_DIRTY_FRAGMENT_SAMPLERS;
ilo->dirty |= ILO_DIRTY_SAMPLER_FS;
}
static void
@ -295,7 +295,7 @@ ilo_bind_vertex_sampler_states(struct pipe_context *pipe,
struct ilo_context *ilo = ilo_context(pipe);
bind_samplers(ilo, PIPE_SHADER_VERTEX, 0, num_samplers, samplers, true);
ilo->dirty |= ILO_DIRTY_VERTEX_SAMPLERS;
ilo->dirty |= ILO_DIRTY_SAMPLER_VS;
}
static void
@ -306,7 +306,7 @@ ilo_bind_geometry_sampler_states(struct pipe_context *pipe,
struct ilo_context *ilo = ilo_context(pipe);
bind_samplers(ilo, PIPE_SHADER_GEOMETRY, 0, num_samplers, samplers, true);
ilo->dirty |= ILO_DIRTY_GEOMETRY_SAMPLERS;
ilo->dirty |= ILO_DIRTY_SAMPLER_GS;
}
static void
@ -319,7 +319,7 @@ ilo_bind_compute_sampler_states(struct pipe_context *pipe,
bind_samplers(ilo, PIPE_SHADER_COMPUTE,
start_slot, num_samplers, samplers, false);
ilo->dirty |= ILO_DIRTY_COMPUTE_SAMPLERS;
ilo->dirty |= ILO_DIRTY_SAMPLER_CS;
}
static void
@ -382,7 +382,7 @@ ilo_bind_depth_stencil_alpha_state(struct pipe_context *pipe, void *state)
ilo->dsa = state;
ilo->dirty |= ILO_DIRTY_DEPTH_STENCIL_ALPHA;
ilo->dirty |= ILO_DIRTY_DSA;
}
static void
@ -519,7 +519,7 @@ ilo_bind_vertex_elements_state(struct pipe_context *pipe, void *state)
ilo->ve = state;
ilo->dirty |= ILO_DIRTY_VERTEX_ELEMENTS;
ilo->dirty |= ILO_DIRTY_VE;
}
static void
@ -624,7 +624,7 @@ ilo_set_constant_buffer(struct pipe_context *pipe,
ilo->cbuf[shader].enabled_mask &= ~(1 << index);
}
ilo->dirty |= ILO_DIRTY_CONSTANT_BUFFER;
ilo->dirty |= ILO_DIRTY_CBUF;
}
static void
@ -645,7 +645,7 @@ ilo_set_framebuffer_state(struct pipe_context *pipe,
if (!ilo->fb.num_samples)
ilo->fb.num_samples = 1;
ilo->dirty |= ILO_DIRTY_FRAMEBUFFER;
ilo->dirty |= ILO_DIRTY_FB;
}
static void
@ -761,7 +761,7 @@ ilo_set_fragment_sampler_views(struct pipe_context *pipe,
struct ilo_context *ilo = ilo_context(pipe);
set_sampler_views(ilo, PIPE_SHADER_FRAGMENT, 0, num_views, views, true);
ilo->dirty |= ILO_DIRTY_FRAGMENT_SAMPLER_VIEWS;
ilo->dirty |= ILO_DIRTY_VIEW_FS;
}
static void
@ -772,7 +772,7 @@ ilo_set_vertex_sampler_views(struct pipe_context *pipe,
struct ilo_context *ilo = ilo_context(pipe);
set_sampler_views(ilo, PIPE_SHADER_VERTEX, 0, num_views, views, true);
ilo->dirty |= ILO_DIRTY_VERTEX_SAMPLER_VIEWS;
ilo->dirty |= ILO_DIRTY_VIEW_VS;
}
static void
@ -783,7 +783,7 @@ ilo_set_geometry_sampler_views(struct pipe_context *pipe,
struct ilo_context *ilo = ilo_context(pipe);
set_sampler_views(ilo, PIPE_SHADER_GEOMETRY, 0, num_views, views, true);
ilo->dirty |= ILO_DIRTY_GEOMETRY_SAMPLER_VIEWS;
ilo->dirty |= ILO_DIRTY_VIEW_GS;
}
static void
@ -796,7 +796,7 @@ ilo_set_compute_sampler_views(struct pipe_context *pipe,
set_sampler_views(ilo, PIPE_SHADER_COMPUTE,
start_slot, num_views, views, false);
ilo->dirty |= ILO_DIRTY_COMPUTE_SAMPLER_VIEWS;
ilo->dirty |= ILO_DIRTY_VIEW_CS;
}
static void
@ -829,7 +829,7 @@ ilo_set_shader_resources(struct pipe_context *pipe,
ilo->resource.count = count;
}
ilo->dirty |= ILO_DIRTY_SHADER_RESOURCES;
ilo->dirty |= ILO_DIRTY_RESOURCE;
}
static void
@ -849,7 +849,7 @@ ilo_set_vertex_buffers(struct pipe_context *pipe,
util_set_vertex_buffers_mask(ilo->vb.states,
&ilo->vb.enabled_mask, buffers, start_slot, num_buffers);
ilo->dirty |= ILO_DIRTY_VERTEX_BUFFERS;
ilo->dirty |= ILO_DIRTY_VB;
}
static void
@ -883,7 +883,7 @@ ilo_set_index_buffer(struct pipe_context *pipe,
ilo->ib.draw_start_offset = 0;
}
ilo->dirty |= ILO_DIRTY_INDEX_BUFFER;
ilo->dirty |= ILO_DIRTY_IB;
}
static struct pipe_stream_output_target *
@ -930,7 +930,7 @@ ilo_set_stream_output_targets(struct pipe_context *pipe,
ilo->so.enabled = (ilo->so.count > 0);
ilo->dirty |= ILO_DIRTY_STREAM_OUTPUT_TARGETS;
ilo->dirty |= ILO_DIRTY_SO;
}
static void
@ -1076,7 +1076,7 @@ ilo_bind_compute_state(struct pipe_context *pipe, void *state)
ilo->cs = state;
ilo->dirty |= ILO_DIRTY_COMPUTE;
ilo->dirty |= ILO_DIRTY_CS;
}
static void
@ -1119,7 +1119,7 @@ ilo_set_compute_resources(struct pipe_context *pipe,
ilo->cs_resource.count = count;
}
ilo->dirty |= ILO_DIRTY_COMPUTE_RESOURCES;
ilo->dirty |= ILO_DIRTY_CS_RESOURCE;
}
static void
@ -1298,17 +1298,17 @@ ilo_mark_states_with_resource_dirty(struct ilo_context *ilo,
const unsigned idx = u_bit_scan(&vb_mask);
if (ilo->vb.states[idx].buffer == res) {
states |= ILO_DIRTY_VERTEX_BUFFERS;
states |= ILO_DIRTY_VB;
break;
}
}
if (ilo->ib.state.buffer == res)
states |= ILO_DIRTY_INDEX_BUFFER;
states |= ILO_DIRTY_IB;
for (i = 0; i < ilo->so.count; i++) {
if (ilo->so.states[i]->buffer == res) {
states |= ILO_DIRTY_STREAM_OUTPUT_TARGETS;
states |= ILO_DIRTY_SO;
break;
}
}
@ -1320,10 +1320,10 @@ ilo_mark_states_with_resource_dirty(struct ilo_context *ilo,
if (view->texture == res) {
static const unsigned view_dirty_bits[PIPE_SHADER_TYPES] = {
[PIPE_SHADER_VERTEX] = ILO_DIRTY_VERTEX_SAMPLER_VIEWS,
[PIPE_SHADER_FRAGMENT] = ILO_DIRTY_FRAGMENT_SAMPLER_VIEWS,
[PIPE_SHADER_GEOMETRY] = ILO_DIRTY_GEOMETRY_SAMPLER_VIEWS,
[PIPE_SHADER_COMPUTE] = ILO_DIRTY_COMPUTE_SAMPLER_VIEWS,
[PIPE_SHADER_VERTEX] = ILO_DIRTY_VIEW_VS,
[PIPE_SHADER_FRAGMENT] = ILO_DIRTY_VIEW_FS,
[PIPE_SHADER_GEOMETRY] = ILO_DIRTY_VIEW_GS,
[PIPE_SHADER_COMPUTE] = ILO_DIRTY_VIEW_CS,
};
states |= view_dirty_bits[sh];
@ -1336,7 +1336,7 @@ ilo_mark_states_with_resource_dirty(struct ilo_context *ilo,
struct ilo_cbuf_cso *cbuf = &ilo->cbuf[sh].cso[i];
if (cbuf->resource == res) {
states |= ILO_DIRTY_CONSTANT_BUFFER;
states |= ILO_DIRTY_CBUF;
break;
}
}
@ -1345,7 +1345,7 @@ ilo_mark_states_with_resource_dirty(struct ilo_context *ilo,
for (i = 0; i < ilo->resource.count; i++) {
if (ilo->resource.states[i]->texture == res) {
states |= ILO_DIRTY_SHADER_RESOURCES;
states |= ILO_DIRTY_RESOURCE;
break;
}
}
@ -1354,19 +1354,19 @@ ilo_mark_states_with_resource_dirty(struct ilo_context *ilo,
if (res->target != PIPE_BUFFER) {
for (i = 0; i < ilo->fb.state.nr_cbufs; i++) {
if (ilo->fb.state.cbufs[i]->texture == res) {
states |= ILO_DIRTY_FRAMEBUFFER;
states |= ILO_DIRTY_FB;
break;
}
}
if (ilo->fb.state.zsbuf && ilo->fb.state.zsbuf->texture == res)
states |= ILO_DIRTY_FRAMEBUFFER;
states |= ILO_DIRTY_FB;
}
for (i = 0; i < ilo->cs_resource.count; i++) {
pipe_surface_reference(&ilo->cs_resource.states[i], NULL);
if (ilo->cs_resource.states[i]->texture == res) {
states |= ILO_DIRTY_COMPUTE_RESOURCES;
states |= ILO_DIRTY_CS_RESOURCE;
break;
}
}

119
src/gallium/drivers/ilo/ilo_state.h
View File

@ -40,36 +40,38 @@
* there are not enough bits.
*/
enum ilo_state {
ILO_STATE_BLEND,
ILO_STATE_FRAGMENT_SAMPLERS,
ILO_STATE_VERTEX_SAMPLERS,
ILO_STATE_GEOMETRY_SAMPLERS,
ILO_STATE_COMPUTE_SAMPLERS,
ILO_STATE_RASTERIZER,
ILO_STATE_DEPTH_STENCIL_ALPHA,
ILO_STATE_FS,
ILO_STATE_VB,
ILO_STATE_VE,
ILO_STATE_IB,
ILO_STATE_VS,
ILO_STATE_GS,
ILO_STATE_VERTEX_ELEMENTS,
ILO_STATE_BLEND_COLOR,
ILO_STATE_STENCIL_REF,
ILO_STATE_SAMPLE_MASK,
ILO_STATE_SO,
ILO_STATE_CLIP,
ILO_STATE_CONSTANT_BUFFER,
ILO_STATE_FRAMEBUFFER,
ILO_STATE_POLY_STIPPLE,
ILO_STATE_SCISSOR,
ILO_STATE_VIEWPORT,
ILO_STATE_FRAGMENT_SAMPLER_VIEWS,
ILO_STATE_VERTEX_SAMPLER_VIEWS,
ILO_STATE_GEOMETRY_SAMPLER_VIEWS,
ILO_STATE_COMPUTE_SAMPLER_VIEWS,
ILO_STATE_SHADER_RESOURCES,
ILO_STATE_VERTEX_BUFFERS,
ILO_STATE_INDEX_BUFFER,
ILO_STATE_STREAM_OUTPUT_TARGETS,
ILO_STATE_COMPUTE,
ILO_STATE_COMPUTE_RESOURCES,
ILO_STATE_SCISSOR,
ILO_STATE_RASTERIZER,
ILO_STATE_POLY_STIPPLE,
ILO_STATE_SAMPLE_MASK,
ILO_STATE_FS,
ILO_STATE_DSA,
ILO_STATE_STENCIL_REF,
ILO_STATE_BLEND,
ILO_STATE_BLEND_COLOR,
ILO_STATE_FB,
ILO_STATE_SAMPLER_VS,
ILO_STATE_SAMPLER_GS,
ILO_STATE_SAMPLER_FS,
ILO_STATE_SAMPLER_CS,
ILO_STATE_VIEW_VS,
ILO_STATE_VIEW_GS,
ILO_STATE_VIEW_FS,
ILO_STATE_VIEW_CS,
ILO_STATE_CBUF,
ILO_STATE_RESOURCE,
ILO_STATE_CS,
ILO_STATE_CS_RESOURCE,
ILO_STATE_GLOBAL_BINDING,
ILO_STATE_COUNT,
@ -79,40 +81,41 @@ enum ilo_state {
* Dirty flags of the states.
*/
enum ilo_dirty_flags {
ILO_DIRTY_BLEND = 1 << ILO_STATE_BLEND,
ILO_DIRTY_FRAGMENT_SAMPLERS = 1 << ILO_STATE_FRAGMENT_SAMPLERS,
ILO_DIRTY_VERTEX_SAMPLERS = 1 << ILO_STATE_VERTEX_SAMPLERS,
ILO_DIRTY_GEOMETRY_SAMPLERS = 1 << ILO_STATE_GEOMETRY_SAMPLERS,
ILO_DIRTY_COMPUTE_SAMPLERS = 1 << ILO_STATE_COMPUTE_SAMPLERS,
ILO_DIRTY_RASTERIZER = 1 << ILO_STATE_RASTERIZER,
ILO_DIRTY_DEPTH_STENCIL_ALPHA = 1 << ILO_STATE_DEPTH_STENCIL_ALPHA,
ILO_DIRTY_FS = 1 << ILO_STATE_FS,
ILO_DIRTY_VS = 1 << ILO_STATE_VS,
ILO_DIRTY_GS = 1 << ILO_STATE_GS,
ILO_DIRTY_VERTEX_ELEMENTS = 1 << ILO_STATE_VERTEX_ELEMENTS,
ILO_DIRTY_BLEND_COLOR = 1 << ILO_STATE_BLEND_COLOR,
ILO_DIRTY_STENCIL_REF = 1 << ILO_STATE_STENCIL_REF,
ILO_DIRTY_SAMPLE_MASK = 1 << ILO_STATE_SAMPLE_MASK,
ILO_DIRTY_CLIP = 1 << ILO_STATE_CLIP,
ILO_DIRTY_CONSTANT_BUFFER = 1 << ILO_STATE_CONSTANT_BUFFER,
ILO_DIRTY_FRAMEBUFFER = 1 << ILO_STATE_FRAMEBUFFER,
ILO_DIRTY_POLY_STIPPLE = 1 << ILO_STATE_POLY_STIPPLE,
ILO_DIRTY_SCISSOR = 1 << ILO_STATE_SCISSOR,
ILO_DIRTY_VIEWPORT = 1 << ILO_STATE_VIEWPORT,
ILO_DIRTY_FRAGMENT_SAMPLER_VIEWS = 1 << ILO_STATE_FRAGMENT_SAMPLER_VIEWS,
ILO_DIRTY_VERTEX_SAMPLER_VIEWS = 1 << ILO_STATE_VERTEX_SAMPLER_VIEWS,
ILO_DIRTY_GEOMETRY_SAMPLER_VIEWS = 1 << ILO_STATE_GEOMETRY_SAMPLER_VIEWS,
ILO_DIRTY_COMPUTE_SAMPLER_VIEWS = 1 << ILO_STATE_COMPUTE_SAMPLER_VIEWS,
ILO_DIRTY_SHADER_RESOURCES = 1 << ILO_STATE_SHADER_RESOURCES,
ILO_DIRTY_VERTEX_BUFFERS = 1 << ILO_STATE_VERTEX_BUFFERS,
ILO_DIRTY_INDEX_BUFFER = 1 << ILO_STATE_INDEX_BUFFER,
ILO_DIRTY_STREAM_OUTPUT_TARGETS = 1 << ILO_STATE_STREAM_OUTPUT_TARGETS,
ILO_DIRTY_COMPUTE = 1 << ILO_STATE_COMPUTE,
ILO_DIRTY_COMPUTE_RESOURCES = 1 << ILO_STATE_COMPUTE_RESOURCES,
ILO_DIRTY_GLOBAL_BINDING = 1 << ILO_STATE_GLOBAL_BINDING,
ILO_DIRTY_ALL = 0xffffffff,
ILO_DIRTY_VB = 1 << ILO_STATE_VB,
ILO_DIRTY_VE = 1 << ILO_STATE_VE,
ILO_DIRTY_IB = 1 << ILO_STATE_IB,
ILO_DIRTY_VS = 1 << ILO_STATE_VS,
ILO_DIRTY_GS = 1 << ILO_STATE_GS,
ILO_DIRTY_SO = 1 << ILO_STATE_SO,
ILO_DIRTY_CLIP = 1 << ILO_STATE_CLIP,
ILO_DIRTY_VIEWPORT = 1 << ILO_STATE_VIEWPORT,
ILO_DIRTY_SCISSOR = 1 << ILO_STATE_SCISSOR,
ILO_DIRTY_RASTERIZER = 1 << ILO_STATE_RASTERIZER,
ILO_DIRTY_POLY_STIPPLE = 1 << ILO_STATE_POLY_STIPPLE,
ILO_DIRTY_SAMPLE_MASK = 1 << ILO_STATE_SAMPLE_MASK,
ILO_DIRTY_FS = 1 << ILO_STATE_FS,
ILO_DIRTY_DSA = 1 << ILO_STATE_DSA,
ILO_DIRTY_STENCIL_REF = 1 << ILO_STATE_STENCIL_REF,
ILO_DIRTY_BLEND = 1 << ILO_STATE_BLEND,
ILO_DIRTY_BLEND_COLOR = 1 << ILO_STATE_BLEND_COLOR,
ILO_DIRTY_FB = 1 << ILO_STATE_FB,
ILO_DIRTY_SAMPLER_VS = 1 << ILO_STATE_SAMPLER_VS,
ILO_DIRTY_SAMPLER_GS = 1 << ILO_STATE_SAMPLER_GS,
ILO_DIRTY_SAMPLER_FS = 1 << ILO_STATE_SAMPLER_FS,
ILO_DIRTY_SAMPLER_CS = 1 << ILO_STATE_SAMPLER_CS,
ILO_DIRTY_VIEW_VS = 1 << ILO_STATE_VIEW_VS,
ILO_DIRTY_VIEW_GS = 1 << ILO_STATE_VIEW_GS,
ILO_DIRTY_VIEW_FS = 1 << ILO_STATE_VIEW_FS,
ILO_DIRTY_VIEW_CS = 1 << ILO_STATE_VIEW_CS,
ILO_DIRTY_CBUF = 1 << ILO_STATE_CBUF,
ILO_DIRTY_RESOURCE = 1 << ILO_STATE_RESOURCE,
ILO_DIRTY_CS = 1 << ILO_STATE_CS,
ILO_DIRTY_CS_RESOURCE = 1 << ILO_STATE_CS_RESOURCE,
ILO_DIRTY_GLOBAL_BINDING = 1 << ILO_STATE_GLOBAL_BINDING,
ILO_DIRTY_ALL = 0xffffffff,
};
struct pipe_draw_info;
struct pipe_resource;
struct ilo_context;