virgl: better support for PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
When the resource to be mapped is busy and the backing storage can be discarded, reallocate the backing storage to avoid waiting. In this new path, we allocate a new buffer, emit a state change, write, and add the transfer to the queue . In the PIPE_TRANSFER_DISCARD_RANGE path, we suballocate a staging buffer, write, and emit a copy_transfer (which may allocate, memcpy, and blit internally). The win might not always be clear. But another win comes from that the new path clears res->valid_buffer_range and does not clear res->clean_mask. This makes it much more preferable in scenarios such as access = enough_space ? GL_MAP_UNSYNCHRONIZED_BIT : GL_MAP_INVALIDATE_BUFFER_BIT; glMapBufferRange(..., GL_MAP_WRITE_BIT | access); memcpy(...); // append new data glUnmapBuffer(...); Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
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@ -47,6 +47,13 @@ static void *virgl_buffer_transfer_map(struct pipe_context *ctx,
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map_type = virgl_resource_transfer_prepare(vctx, trans);
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switch (map_type) {
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case VIRGL_TRANSFER_MAP_REALLOC:
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if (!virgl_resource_realloc(vctx, vbuf)) {
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map_addr = NULL;
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break;
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}
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vs->vws->resource_reference(vs->vws, &trans->hw_res, vbuf->hw_res);
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/* fall through */
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case VIRGL_TRANSFER_MAP_HW_RES:
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trans->hw_res_map = vs->vws->resource_map(vs->vws, vbuf->hw_res);
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if (trans->hw_res_map)
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@ -87,13 +87,9 @@ virgl_resource_transfer_prepare(struct virgl_context *vctx,
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struct virgl_winsys *vws = vs->vws;
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struct virgl_resource *res = virgl_resource(xfer->base.resource);
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enum virgl_transfer_map_type map_type = VIRGL_TRANSFER_MAP_HW_RES;
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bool unsynchronized = xfer->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED;
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bool discard = xfer->base.usage & (PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE |
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PIPE_TRANSFER_DISCARD_RANGE);
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bool flush;
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bool readback;
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bool wait;
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bool copy_transfer;
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/* there is no way to map the host storage currently */
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if (xfer->base.usage & PIPE_TRANSFER_MAP_DIRECTLY)
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@ -110,19 +106,10 @@ virgl_resource_transfer_prepare(struct virgl_context *vctx,
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flush = virgl_res_needs_flush(vctx, xfer);
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readback = virgl_res_needs_readback(vctx, res, xfer->base.usage,
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xfer->base.level);
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/* Check if we should perform a copy transfer through the transfer_uploader. */
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copy_transfer = discard &&
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!readback &&
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!unsynchronized &&
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vctx->transfer_uploader &&
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!vctx->transfer_uploader_in_use &&
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(flush || vws->resource_is_busy(vws, res->hw_res));
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/* We need to wait for all cmdbufs, current or previous, that access the
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* resource to finish unless synchronization is disabled.
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*/
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wait = !unsynchronized;
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wait = !(xfer->base.usage & PIPE_TRANSFER_UNSYNCHRONIZED);
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/* When the transfer range consists of only uninitialized data, we can
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* assume the GPU is not accessing the range and readback is unnecessary.
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@ -135,17 +122,42 @@ virgl_resource_transfer_prepare(struct virgl_context *vctx,
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flush = false;
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readback = false;
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wait = false;
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copy_transfer = false;
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}
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/* When performing a copy transfer there is no need wait for the target
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* resource. There is normally no need to flush either, unless the amount of
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* memory we are using for staging resources starts growing, in which case
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* we want to flush to keep our memory consumption in check.
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/* When the resource is busy but its content can be discarded, we can
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* replace its HW resource or use a staging buffer to avoid waiting.
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*/
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if (copy_transfer) {
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flush = (vctx->queued_staging_res_size > VIRGL_QUEUED_STAGING_RES_SIZE_LIMIT);
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wait = false;
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if (wait && (xfer->base.usage & (PIPE_TRANSFER_DISCARD_RANGE |
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PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE))) {
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const bool can_realloc =
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(xfer->base.usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) &&
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virgl_can_rebind_resource(vctx, &res->u.b);
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const bool can_staging = vctx->transfer_uploader &&
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!vctx->transfer_uploader_in_use;
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/* discard implies no readback */
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assert(!readback);
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if (can_realloc || can_staging) {
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/* Both map types have some costs. Do them only when the resource is
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* (or will be) busy for real. Otherwise, set wait to false.
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*/
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wait = (flush || vws->resource_is_busy(vws, res->hw_res));
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if (wait) {
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map_type = (can_realloc) ?
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VIRGL_TRANSFER_MAP_REALLOC :
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VIRGL_TRANSFER_MAP_STAGING;
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wait = false;
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/* There is normally no need to flush either, unless the amount of
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* memory we are using for staging resources starts growing, in
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* which case we want to flush to keep our memory consumption in
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* check.
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*/
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flush = (vctx->queued_staging_res_size >
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VIRGL_QUEUED_STAGING_RES_SIZE_LIMIT);
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}
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}
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}
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/* readback has some implications */
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@ -185,9 +197,6 @@ virgl_resource_transfer_prepare(struct virgl_context *vctx,
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if (wait)
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vws->resource_wait(vws, res->hw_res);
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if (copy_transfer)
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map_type = VIRGL_TRANSFER_MAP_STAGING;
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return map_type;
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}
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@ -598,3 +607,39 @@ void *virgl_transfer_uploader_map(struct virgl_context *vctx,
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return map_addr;
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}
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bool
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virgl_resource_realloc(struct virgl_context *vctx, struct virgl_resource *res)
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{
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struct virgl_screen *vs = virgl_screen(vctx->base.screen);
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const struct pipe_resource *templ = &res->u.b;
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unsigned vbind;
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struct virgl_hw_res *hw_res;
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vbind = pipe_to_virgl_bind(vs, templ->bind, templ->flags);
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hw_res = vs->vws->resource_create(vs->vws,
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templ->target,
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templ->format,
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vbind,
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templ->width0,
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templ->height0,
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templ->depth0,
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templ->array_size,
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templ->last_level,
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templ->nr_samples,
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res->metadata.total_size);
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if (!hw_res)
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return false;
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vs->vws->resource_reference(vs->vws, &res->hw_res, NULL);
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res->hw_res = hw_res;
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util_range_set_empty(&res->valid_buffer_range);
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/* count toward the staging resource size limit */
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vctx->queued_staging_res_size += res->metadata.total_size;
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virgl_rebind_resource(vctx, &res->u.b);
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return true;
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}
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@ -73,10 +73,14 @@ struct virgl_resource {
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enum virgl_transfer_map_type {
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VIRGL_TRANSFER_MAP_ERROR = -1,
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VIRGL_TRANSFER_MAP_HW_RES,
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/* Map a range of a staging buffer. The updated contents should be transferred
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* with a copy transfer.
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*/
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VIRGL_TRANSFER_MAP_STAGING,
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/* Reallocate the underlying virgl_hw_res. */
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VIRGL_TRANSFER_MAP_REALLOC,
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};
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struct virgl_transfer {
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@ -187,4 +191,8 @@ void virgl_resource_dirty(struct virgl_resource *res, uint32_t level);
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void *virgl_transfer_uploader_map(struct virgl_context *vctx,
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struct virgl_transfer *vtransfer);
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bool
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virgl_resource_realloc(struct virgl_context *vctx,
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struct virgl_resource *res);
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#endif
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@ -134,6 +134,13 @@ static void *texture_transfer_map_plain(struct pipe_context *ctx,
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map_type = virgl_resource_transfer_prepare(vctx, trans);
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switch (map_type) {
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case VIRGL_TRANSFER_MAP_REALLOC:
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if (!virgl_resource_realloc(vctx, vtex)) {
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map_addr = NULL;
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break;
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}
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vws->resource_reference(vws, &trans->hw_res, vtex->hw_res);
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/* fall through */
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case VIRGL_TRANSFER_MAP_HW_RES:
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trans->hw_res_map = vws->resource_map(vws, vtex->hw_res);
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if (trans->hw_res_map)
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